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[/] [openrisc/] [trunk/] [or1ksim/] [or1ksim.h] - Blame information for rev 312

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/* or1ksim.h -- Simulator library header file
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   Copyright (C) 2008 Embecosm Limited
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   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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   This file is part of OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify it
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   under the terms of the GNU General Public License as published by the Free
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   Software Foundation; either version 3 of the License, or (at your option)
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   any later version.
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   This program is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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   more details.
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   You should have received a copy of the GNU General Public License along
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   with this program.  If not, see <http://www.gnu.org/licenses/>. */
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/* Header file definining the interface to the Or1ksim library. */
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#ifndef OR1KSIM__H
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#define OR1KSIM__H
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/* The bus width */
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/* #define BUSWIDTH  32 */
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/* The return codes */
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enum  or1ksim_rc {
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  OR1KSIM_RC_OK,                /* No error */
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  OR1KSIM_RC_BADINIT,           /* Couldn't initialize */
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  OR1KSIM_RC_BRKPT,             /* Hit a breakpoint */
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  OR1KSIM_RC_HALTED             /* Hit NOP_EXIT */
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};
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/* The interface methods */
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#ifdef __cplusplus
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extern "C" {
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#endif
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int  or1ksim_init (int         argc,
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                   char       *argv[],
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                   void       *class_ptr,
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                   int       (*upr) (void              *class_ptr,
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                                     unsigned long int  addr,
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                                     unsigned char      mask[],
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                                     unsigned char      rdata[],
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                                     int                data_len),
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                   int       (*upw) (void              *class_ptr,
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                                     unsigned long int  addr,
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                                     unsigned char      mask[],
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                                     unsigned char      wdata[],
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                                     int                data_len));
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int  or1ksim_run (double  duration);
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void  or1ksim_reset_duration (double duration);
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void  or1ksim_set_time_point ();
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double  or1ksim_get_time_period ();
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int  or1ksim_is_le ();
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unsigned long int  or1ksim_clock_rate();
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/* Interrupt handling interface */
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void  or1ksim_interrupt (int  i);
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void or1ksim_interrupt_set (int  i);
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void  or1ksim_interrupt_clear (int  i);
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/* JTAG interface */
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double  or1ksim_jtag_reset ();
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double  or1ksim_jtag_shift_ir (unsigned char *jreg,
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                               int            num_bits);
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double  or1ksim_jtag_shift_dr (unsigned char *jreg,
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                               int            num_bits);
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/* Access to simulator state */
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int  or1ksim_read_mem (unsigned long int  addr,
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                       unsigned char     *buf,
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                       int                len);
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int  or1ksim_write_mem (unsigned long int  addr,
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                        unsigned char     *buf,
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                        int                len);
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int  or1ksim_read_spr (int                 sprnum,
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                       unsigned long int  *sprval_ptr);
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int  or1ksim_write_spr (int                sprnum,
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                        unsigned long int  sprval);
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int  or1ksim_read_reg (int                regnum,
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                       unsigned long int *regval_ptr);
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int  or1ksim_write_reg (int                regnum,
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                        unsigned long int  regval);
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void  or1ksim_set_stall_state (int  state);
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#ifdef __cplusplus
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}
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#endif
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#endif  /* OR1KSIM__H */

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