OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [or1ksim.h] - Blame information for rev 304

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 19 jeremybenn
/* or1ksim.h -- Simulator library header file
2
 
3
   Copyright (C) 2008 Embecosm Limited
4
 
5
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
6
 
7
   This file is part of OpenRISC 1000 Architectural Simulator.
8
 
9
   This program is free software; you can redistribute it and/or modify it
10
   under the terms of the GNU General Public License as published by the Free
11
   Software Foundation; either version 3 of the License, or (at your option)
12
   any later version.
13
 
14
   This program is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17
   more details.
18
 
19
   You should have received a copy of the GNU General Public License along
20
   with this program.  If not, see <http://www.gnu.org/licenses/>. */
21
 
22
 
23
/* Header file definining the interface to the Or1ksim library. */
24
 
25
 
26
#ifndef OR1KSIM__H
27
#define OR1KSIM__H
28
 
29
 
30
/* The bus width */
31
 
32
/* #define BUSWIDTH  32 */
33
 
34
/* The return codes */
35
 
36
enum  or1ksim_rc {
37
  OR1KSIM_RC_OK,                /* No error */
38
 
39
  OR1KSIM_RC_BADINIT,           /* Couldn't initialize */
40 143 jeremybenn
  OR1KSIM_RC_BRKPT,             /* Hit a breakpoint */
41
  OR1KSIM_RC_HALTED             /* Hit NOP_EXIT */
42 19 jeremybenn
};
43
 
44
/* The interface methods */
45
 
46
#ifdef __cplusplus
47
extern "C" {
48
#endif
49
 
50 220 jeremybenn
int  or1ksim_init (int         argc,
51
                   char       *argv[],
52 93 jeremybenn
                   void       *class_ptr,
53
                   int       (*upr) (void              *class_ptr,
54
                                     unsigned long int  addr,
55
                                     unsigned char      mask[],
56
                                     unsigned char      rdata[],
57
                                     int                data_len),
58
                   int       (*upw) (void              *class_ptr,
59
                                     unsigned long int  addr,
60
                                     unsigned char      mask[],
61
                                     unsigned char      wdata[],
62
                                     int                data_len));
63 19 jeremybenn
 
64 82 jeremybenn
int  or1ksim_run (double  duration);
65 19 jeremybenn
 
66 82 jeremybenn
void  or1ksim_reset_duration (double duration);
67 19 jeremybenn
 
68 82 jeremybenn
void  or1ksim_set_time_point ();
69 19 jeremybenn
 
70 82 jeremybenn
double  or1ksim_get_time_period ();
71 19 jeremybenn
 
72 82 jeremybenn
int  or1ksim_is_le ();
73 19 jeremybenn
 
74
unsigned long int  or1ksim_clock_rate();
75
 
76 82 jeremybenn
/* Interrupt handling interface */
77
void  or1ksim_interrupt (int  i);
78 19 jeremybenn
 
79 82 jeremybenn
void or1ksim_interrupt_set (int  i);
80 19 jeremybenn
 
81 82 jeremybenn
void  or1ksim_interrupt_clear (int  i);
82 19 jeremybenn
 
83 82 jeremybenn
/* JTAG interface */
84
double  or1ksim_jtag_reset ();
85
 
86 98 jeremybenn
double  or1ksim_jtag_shift_ir (unsigned char *jreg,
87
                               int            num_bits);
88 82 jeremybenn
 
89 98 jeremybenn
double  or1ksim_jtag_shift_dr (unsigned char *jreg,
90
                               int            num_bits);
91 82 jeremybenn
 
92 143 jeremybenn
/* Access to simulator state */
93 230 jeremybenn
int  or1ksim_read_mem (unsigned long int  addr,
94
                       unsigned char     *buf,
95
                       int                len);
96 82 jeremybenn
 
97 230 jeremybenn
int  or1ksim_write_mem (unsigned long int  addr,
98
                        unsigned char     *buf,
99
                        int                len);
100 143 jeremybenn
 
101 230 jeremybenn
int  or1ksim_read_spr (int                 sprnum,
102
                       unsigned long int  *sprval_ptr);
103 143 jeremybenn
 
104 230 jeremybenn
int  or1ksim_write_spr (int                sprnum,
105
                        unsigned long int  sprval);
106 224 jeremybenn
 
107 230 jeremybenn
int  or1ksim_read_reg (int                regnum,
108
                       unsigned long int *regval_ptr);
109 143 jeremybenn
 
110 230 jeremybenn
int  or1ksim_write_reg (int                regnum,
111
                        unsigned long int  regval);
112 143 jeremybenn
 
113 224 jeremybenn
void  or1ksim_set_stall_state (int  state);
114
 
115 19 jeremybenn
#ifdef __cplusplus
116
}
117
#endif
118
 
119
 
120
#endif  /* OR1KSIM__H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.