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[/] [openrisc/] [trunk/] [or1ksim/] [pcu/] [pcu.c] - Blame information for rev 857

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1 556 julius
/* pcu.c -- Simulation of OR1k performance counters
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   Copyright (C) 2011 Julius Baxter, julius@opencores.org
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   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify it
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   under the terms of the GNU General Public License as published by the Free
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   Software Foundation; either version 3 of the License, or (at your option)
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   any later version.
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   This program is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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   more details.
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   You should have received a copy of the GNU General Public License along
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   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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/* This program is commented throughout in a fashion suitable for processing
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   with Doxygen. */
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#include "config.h"
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#include "sim-config.h"
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#include "execute.h"
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#include "pcu.h"
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/*---------------------------------------------------------------------------*/
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/*!Increment a PCCR depending on the event
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   Check the event, see if any PCMRs are set to increment, and permissions and
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   increment the corresponding PCCR.
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   The performance counters unit relies on a call to pcu_count_event()
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   being placed a the appropriate place elsewhere in the simulator code.
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   At present only instruction fetch, LSU accesses, MMU and cache misses are
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   logged. Counts for other things such as stalls for LSU or fetch can
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   probably be done but haven't been, yet.
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   The function expects to receive the bit of the PCMR to check against for
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   incrementing. See the existing use of the function in the
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   cpu/common/abstract.c file which is where LSU accesses and instruction
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   fetches are logged.
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   @param[in] event  The event that has occurred (PCMR bit)                  */
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/*---------------------------------------------------------------------------*/
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void
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pcu_count_event(unsigned event)
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{
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  int i;
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  // Look through each PCMR, check if this event should be logged
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  for(i=0;i<8;i++)
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    if ((event & cpu_state.sprs[SPR_PCMR(i)]) &&
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        // Count in SM, and SR[SM] set
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        (((cpu_state.sprs[SPR_PCMR(i)] & SPR_PCMR_CISM) &&
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          (cpu_state.sprs[SPR_SR] & SPR_SR_SM)) ||
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         // Count in UM and SR[SM] cleared
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         ((cpu_state.sprs[SPR_PCMR(i)] & SPR_PCMR_CIUM) &&
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          !(cpu_state.sprs[SPR_SR] & SPR_SR_SM))))
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      {
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        cpu_state.sprs[SPR_PCCR(i)]++;
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      }
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}
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/*---------------------------------------------------------------------------*/
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/*!Enable or disable the performance counters unit
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   Set the corresponding field in the UPR, set present bit in all PCMRs
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   @param[in] val  The value to use
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   @param[in] dat  The config data structure (not used here)                 */
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/*---------------------------------------------------------------------------*/
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static void
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pcu_enabled (union param_val val, void *dat)
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{
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  if (val.int_val)
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    {
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      cpu_state.sprs[SPR_UPR] |= SPR_UPR_PCUP;
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      cpu_state.sprs[SPR_PCMR(0)] = SPR_PCMR_CP;
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      cpu_state.sprs[SPR_PCMR(1)] = SPR_PCMR_CP;
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      cpu_state.sprs[SPR_PCMR(2)] = SPR_PCMR_CP;
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      cpu_state.sprs[SPR_PCMR(3)] = SPR_PCMR_CP;
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      cpu_state.sprs[SPR_PCMR(4)] = SPR_PCMR_CP;
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      cpu_state.sprs[SPR_PCMR(5)] = SPR_PCMR_CP;
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      cpu_state.sprs[SPR_PCMR(6)] = SPR_PCMR_CP;
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      cpu_state.sprs[SPR_PCMR(7)] = SPR_PCMR_CP;
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    }
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  else
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    {
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      cpu_state.sprs[SPR_UPR] &= ~SPR_UPR_PCUP;
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    }
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  config.pcu.enabled = val.int_val;
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}       /* pcu_enabled() */
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/*---------------------------------------------------------------------------*/
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/*!Register the configuration functions for the performance counters unit    */
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/*---------------------------------------------------------------------------*/
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void
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reg_pcu_sec ()
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{
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  struct config_section *sec = reg_config_sec ("pcu", NULL, NULL);
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  reg_config_param (sec, "enabled",     PARAMT_INT, pcu_enabled);
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}       /* reg_pcu_sec () */

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