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jeremybenn |
/* atahost.c -- ATA Host code simulation
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Copyright (C) 2002 Richard Herveille, rherveille@opencores.org
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Copyright (C) 2008 Embecosm Limited
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3 of the License, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along
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with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This program is commented throughout in a fashion suitable for processing
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with Doxygen. */
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/* Autoconf and/or portability configuration */
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#include "config.h"
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#include "port.h"
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/* System includes */
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#include <stdlib.h>
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/* Package includes */
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#include "atahost.h"
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#include "sim-config.h"
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#include "abstract.h"
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#include "pic.h"
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#include "toplevel-support.h"
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#include "sim-cmd.h"
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/* default timing reset values */
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#define PIO_MODE0_T1 6
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#define PIO_MODE0_T2 28
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#define PIO_MODE0_T4 2
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#define PIO_MODE0_TEOC 23
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#define DMA_MODE0_TM 4
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#define DMA_MODE0_TD 21
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#define DMA_MODE0_TEOC 21
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/* reset and initialize ATA host core(s) */
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static void
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ata_reset (void *dat)
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{
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struct ata_host *ata = dat;
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// reset the core registers
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ata->regs.ctrl = 0x0001;
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ata->regs.stat = (ata->dev_id << 28) | (ata->rev << 24);
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ata->regs.pctr = (ata->pio_mode0_teoc << ATA_TEOC) |
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(ata->pio_mode0_t4 << ATA_T4) |
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(ata->pio_mode0_t2 << ATA_T2) | (ata->pio_mode0_t1 << ATA_T1);
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ata->regs.pftr0 = ata->regs.pctr;
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ata->regs.pftr1 = ata->regs.pctr;
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ata->regs.dtr0 = (ata->dma_mode0_teoc << ATA_TEOC) |
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(ata->dma_mode0_td << ATA_TD) | (ata->dma_mode0_tm << ATA_TM);
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ata->regs.dtr1 = ata->regs.dtr0;
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ata->regs.txb = 0;
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// inform simulator about new read/write delay timings
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adjust_rw_delay (ata->mem, ata_pio_delay (ata->regs.pctr),
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ata_pio_delay (ata->regs.pctr));
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/* the reset bit in the control register 'ctrl' is set, reset connect ata-devices */
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ata_devices_hw_reset (&ata->devices, 1);
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}
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/* ========================================================================= */
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/* Assert interrupt */
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void
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ata_int (void *dat)
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{
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struct ata_host *ata = dat;
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if (!(ata->regs.stat & ATA_IDEIS))
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{
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ata->regs.stat |= ATA_IDEIS;
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report_interrupt (ata->irq);
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}
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}
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/* ========================================================================= */
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/*
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Read a register
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*/
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static uint32_t
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ata_read32 (oraddr_t addr, void *dat)
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{
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struct ata_host *ata = dat;
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/* determine if ata_host or ata_device addressed */
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if (is_ata_hostadr (addr))
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{
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// Accesses to internal register take 2cycles
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adjust_rw_delay (ata->mem, 2, 2);
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switch (addr)
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{
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case ATA_CTRL:
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return ata->regs.ctrl;
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case ATA_STAT:
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return ata->regs.stat;
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case ATA_PCTR:
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return ata->regs.pctr;
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case ATA_PFTR0:
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return ata->dev_id > 1 ? ata->regs.pftr0 : 0;
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case ATA_PFTR1:
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return ata->dev_id > 1 ? ata->regs.pftr1 : 0;
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case ATA_DTR0:
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return ata->dev_id > 2 ? ata->regs.dtr0 : 0;
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case ATA_DTR1:
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return ata->dev_id > 2 ? ata->regs.dtr1 : 0;
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case ATA_RXB:
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return ata->dev_id > 2 ? ata->regs.rxb : 0;
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default:
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return 0;
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}
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}
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/* check if the controller is enabled */
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if (ata->regs.ctrl & ATA_IDE_EN)
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{
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// make sure simulator uses correct read/write delay timings
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if (((addr & 0x7f) == ATA_DR) && ata->dev_id > 1)
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{
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if (ata->dev_sel)
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adjust_rw_delay (ata->mem, ata_pio_delay (ata->regs.pftr1),
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ata_pio_delay (ata->regs.pftr1));
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else
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adjust_rw_delay (ata->mem, ata_pio_delay (ata->regs.pftr0),
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ata_pio_delay (ata->regs.pftr0));
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}
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else
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adjust_rw_delay (ata->mem, ata_pio_delay (ata->regs.pctr),
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ata_pio_delay (ata->regs.pctr));
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return ata_devices_read (&ata->devices, addr & 0x7f);
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}
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return 0;
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}
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/* ========================================================================= */
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/*
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Write a register
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*/
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static void
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ata_write32 (oraddr_t addr, uint32_t value, void *dat)
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{
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struct ata_host *ata = dat;
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/* determine if ata_host or ata_device addressed */
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if (is_ata_hostadr (addr))
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{
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// Accesses to internal register take 2cycles
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adjust_rw_delay (ata->mem, 2, 2);
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switch (addr)
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{
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case ATA_CTRL:
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ata->regs.ctrl = value;
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/* check if reset bit set, if so reset ata-devices */
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if (value & ATA_RST)
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ata_devices_hw_reset (&ata->devices, 1);
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else
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ata_devices_hw_reset (&ata->devices, 0);
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break;
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case ATA_STAT:
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if (!(value & ATA_IDEIS) && (ata->regs.stat & ATA_IDEIS))
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{
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clear_interrupt (ata->irq);
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ata->regs.stat &= ~ATA_IDEIS;
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}
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break;
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case ATA_PCTR:
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ata->regs.pctr = value;
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break;
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case ATA_PFTR0:
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ata->regs.pftr0 = value;
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break;
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case ATA_PFTR1:
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ata->regs.pftr1 = value;
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break;
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case ATA_DTR0:
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ata->regs.dtr0 = value;
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break;
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case ATA_DTR1:
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ata->regs.dtr1 = value;
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break;
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case ATA_TXB:
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ata->regs.txb = value;
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break;
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default:
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/* ERROR-macro currently only supports simple strings. */
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/*
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fprintf(stderr, "ERROR : Unknown register for OCIDEC(%1d).\n", DEV_ID );
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Tried to show some useful info here.
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But when using 'DM'-simulator-command, the screen gets filled with these messages.
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Thereby eradicating the usefulness of the message
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*/
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break;
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}
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return;
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}
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/* check if the controller is enabled */
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if (ata->regs.ctrl & ATA_IDE_EN)
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{
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// make sure simulator uses correct read/write delay timings
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if (((addr & 0x7f) == ATA_DR) && (ata->dev_id > 1))
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{
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if (ata->dev_sel)
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adjust_rw_delay (ata->mem, ata_pio_delay (ata->regs.pftr1),
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ata_pio_delay (ata->regs.pftr1));
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else
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adjust_rw_delay (ata->mem, ata_pio_delay (ata->regs.pftr0),
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ata_pio_delay (ata->regs.pftr0));
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}
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else
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adjust_rw_delay (ata->mem, ata_pio_delay (ata->regs.pctr),
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ata_pio_delay (ata->regs.pctr));
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if ((addr & 0x7f) == ATA_DHR)
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ata->dev_sel = value & ATA_DHR_DEV;
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ata_devices_write (&ata->devices, addr & 0x7f, value);
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}
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}
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/* ========================================================================= */
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/* Dump status */
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static void
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ata_status (void *dat)
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{
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struct ata_host *ata = dat;
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if (ata->baseaddr == 0)
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return;
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PRINTF ("\nOCIDEC-%1d at: 0x%" PRIxADDR "\n", ata->dev_id, ata->baseaddr);
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PRINTF ("ATA CTRL : 0x%08" PRIx32 "\n", ata->regs.ctrl);
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PRINTF ("ATA STAT : 0x%08" PRIx32 "\n", ata->regs.stat);
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PRINTF ("ATA PCTR : 0x%08" PRIx32 "n", ata->regs.pctr);
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if (ata->dev_id > 1)
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{
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PRINTF ("ATA FCTR0 : 0x%08" PRIx32 "\n", ata->regs.pftr0);
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PRINTF ("ATA FCTR1 : 0x%08" PRIx32 "\n", ata->regs.pftr1);
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}
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if (ata->dev_id > 2)
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{
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PRINTF ("ATA DTR0 : 0x%08" PRIx32 "\n", ata->regs.dtr0);
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PRINTF ("ATA DTR1 : 0x%08" PRIx32 "\n", ata->regs.dtr1);
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PRINTF ("ATA TXD : 0x%08" PRIx32 "\n", ata->regs.txb);
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PRINTF ("ATA RXD : 0x%08" PRIx32 "\n", ata->regs.rxb);
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}
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}
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/* ========================================================================= */
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/*----------------------------------------------------[ ATA Configuration ]---*/
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static unsigned int conf_dev;
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static void
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ata_baseaddr (union param_val val, void *dat)
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{
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struct ata_host *ata = dat;
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ata->baseaddr = val.addr_val;
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}
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static void
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ata_irq (union param_val val, void *dat)
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{
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struct ata_host *ata = dat;
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ata->irq = val.int_val;
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}
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static void
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ata_dev_id (union param_val val, void *dat)
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{
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struct ata_host *ata = dat;
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if (val.int_val < 1 || val.int_val > 3)
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{
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fprintf (stderr, "Peripheral ATA: Unknown device id %d, useing 1\n",
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val.int_val);
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ata->dev_id = 1;
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return;
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}
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ata->dev_id = val.int_val;
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}
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/*---------------------------------------------------------------------------*/
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/*!Set the ATA revision
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This must be in the range 0-15, to fit in the relevant field. Anything
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larger is truncated with a warning.
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@param[in] val The value to use
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@param[in] dat The config data structure */
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/*---------------------------------------------------------------------------*/
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static void
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342 |
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ata_rev (union param_val val, void *dat)
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343 |
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{
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struct ata_host *ata = dat;
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346 |
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if (val.int_val > 0xf)
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{
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348 |
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fprintf (stderr, "Warning: ATA rev > 4 bits: truncated\n");
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}
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ata->rev = val.int_val & 0xf;
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}
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static void
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ata_pio_mode0_t1 (union param_val val, void *dat)
|
356 |
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{
|
357 |
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struct ata_host *ata = dat;
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358 |
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359 |
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if (val.int_val < 0 || val.int_val > 255)
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{
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361 |
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fprintf (stderr, "Peripheral ATA: Invalid pio_mode0_t1: %d\n",
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|
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val.int_val);
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363 |
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return;
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364 |
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}
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365 |
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ata->pio_mode0_t1 = val.int_val;
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}
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368 |
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|
static void
|
370 |
|
|
ata_pio_mode0_t2 (union param_val val, void *dat)
|
371 |
|
|
{
|
372 |
|
|
struct ata_host *ata = dat;
|
373 |
|
|
|
374 |
|
|
if (val.int_val < 0 || val.int_val > 255)
|
375 |
|
|
{
|
376 |
|
|
fprintf (stderr, "Peripheral ATA: Invalid pio_mode0_t2: %d\n",
|
377 |
|
|
val.int_val);
|
378 |
|
|
return;
|
379 |
|
|
}
|
380 |
|
|
|
381 |
|
|
ata->pio_mode0_t2 = val.int_val;
|
382 |
|
|
}
|
383 |
|
|
|
384 |
|
|
static void
|
385 |
|
|
ata_pio_mode0_t4 (union param_val val, void *dat)
|
386 |
|
|
{
|
387 |
|
|
struct ata_host *ata = dat;
|
388 |
|
|
|
389 |
|
|
if (val.int_val < 0 || val.int_val > 255)
|
390 |
|
|
{
|
391 |
|
|
fprintf (stderr, "Peripheral ATA: Invalid pio_mode0_t4: %d\n",
|
392 |
|
|
val.int_val);
|
393 |
|
|
return;
|
394 |
|
|
}
|
395 |
|
|
|
396 |
|
|
ata->pio_mode0_t4 = val.int_val;
|
397 |
|
|
}
|
398 |
|
|
|
399 |
|
|
static void
|
400 |
|
|
ata_pio_mode0_teoc (union param_val val, void *dat)
|
401 |
|
|
{
|
402 |
|
|
struct ata_host *ata = dat;
|
403 |
|
|
|
404 |
|
|
if (val.int_val < 0 || val.int_val > 255)
|
405 |
|
|
{
|
406 |
|
|
fprintf (stderr, "Peripheral ATA: Invalid pio_mode0_teoc: %d\n",
|
407 |
|
|
val.int_val);
|
408 |
|
|
return;
|
409 |
|
|
}
|
410 |
|
|
|
411 |
|
|
ata->pio_mode0_teoc = val.int_val;
|
412 |
|
|
}
|
413 |
|
|
|
414 |
|
|
static void
|
415 |
|
|
ata_dma_mode0_tm (union param_val val, void *dat)
|
416 |
|
|
{
|
417 |
|
|
struct ata_host *ata = dat;
|
418 |
|
|
|
419 |
|
|
if (val.int_val < 0 || val.int_val > 255)
|
420 |
|
|
{
|
421 |
|
|
fprintf (stderr, "Peripheral ATA: Invalid dma_mode0_tm: %d\n",
|
422 |
|
|
val.int_val);
|
423 |
|
|
return;
|
424 |
|
|
}
|
425 |
|
|
|
426 |
|
|
ata->dma_mode0_tm = val.int_val;
|
427 |
|
|
}
|
428 |
|
|
|
429 |
|
|
static void
|
430 |
|
|
ata_dma_mode0_td (union param_val val, void *dat)
|
431 |
|
|
{
|
432 |
|
|
struct ata_host *ata = dat;
|
433 |
|
|
|
434 |
|
|
if (val.int_val < 0 || val.int_val > 255)
|
435 |
|
|
{
|
436 |
|
|
fprintf (stderr, "Peripheral ATA: Invalid dma_mode0_td: %d\n",
|
437 |
|
|
val.int_val);
|
438 |
|
|
return;
|
439 |
|
|
}
|
440 |
|
|
|
441 |
|
|
ata->dma_mode0_td = val.int_val;
|
442 |
|
|
}
|
443 |
|
|
|
444 |
|
|
static void
|
445 |
|
|
ata_dma_mode0_teoc (union param_val val, void *dat)
|
446 |
|
|
{
|
447 |
|
|
struct ata_host *ata = dat;
|
448 |
|
|
|
449 |
|
|
if (val.int_val < 0 || val.int_val > 255)
|
450 |
|
|
{
|
451 |
|
|
fprintf (stderr, "Peripheral ATA: Invalid dma_mode0_teoc: %d\n",
|
452 |
|
|
val.int_val);
|
453 |
|
|
return;
|
454 |
|
|
}
|
455 |
|
|
|
456 |
|
|
ata->dma_mode0_teoc = val.int_val;
|
457 |
|
|
}
|
458 |
|
|
|
459 |
|
|
static void
|
460 |
|
|
ata_type (union param_val val, void *dat)
|
461 |
|
|
{
|
462 |
|
|
struct ata_host *ata = dat;
|
463 |
|
|
if (conf_dev <= 1)
|
464 |
|
|
ata->devices.device[conf_dev].conf.type = val.int_val;
|
465 |
|
|
}
|
466 |
|
|
|
467 |
|
|
|
468 |
|
|
/*---------------------------------------------------------------------------*/
|
469 |
|
|
/*!Set the ATA file
|
470 |
|
|
|
471 |
|
|
Free any previously allocated value. Only used if device type is 1.
|
472 |
|
|
|
473 |
|
|
@param[in] val The value to use
|
474 |
|
|
@param[in] dat The config data structure */
|
475 |
|
|
/*---------------------------------------------------------------------------*/
|
476 |
|
|
static void
|
477 |
|
|
ata_file (union param_val val, void *dat)
|
478 |
|
|
{
|
479 |
|
|
struct ata_host *ata = dat;
|
480 |
|
|
|
481 |
|
|
if (conf_dev <= 1)
|
482 |
|
|
{
|
483 |
|
|
if (NULL != ata->devices.device[conf_dev].conf.file)
|
484 |
|
|
{
|
485 |
|
|
free (ata->devices.device[conf_dev].conf.file);
|
486 |
|
|
ata->devices.device[conf_dev].conf.file = NULL;
|
487 |
|
|
}
|
488 |
|
|
|
489 |
|
|
if (!(ata->devices.device[conf_dev].conf.file = strdup (val.str_val)))
|
490 |
|
|
{
|
491 |
|
|
fprintf (stderr, "Peripheral ATA: Run out of memory\n");
|
492 |
|
|
exit (-1);
|
493 |
|
|
}
|
494 |
|
|
}
|
495 |
|
|
} /* ata_file() */
|
496 |
|
|
|
497 |
|
|
|
498 |
|
|
static void
|
499 |
|
|
ata_size (union param_val val, void *dat)
|
500 |
|
|
{
|
501 |
|
|
struct ata_host *ata = dat;
|
502 |
|
|
if (conf_dev <= 1)
|
503 |
|
|
ata->devices.device[conf_dev].conf.size = val.int_val << 20;
|
504 |
|
|
}
|
505 |
|
|
|
506 |
|
|
static void
|
507 |
|
|
ata_packet (union param_val val, void *dat)
|
508 |
|
|
{
|
509 |
|
|
struct ata_host *ata = dat;
|
510 |
|
|
if (conf_dev <= 1)
|
511 |
|
|
ata->devices.device[conf_dev].conf.packet = val.int_val;
|
512 |
|
|
}
|
513 |
|
|
|
514 |
|
|
static void
|
515 |
|
|
ata_enabled (union param_val val, void *dat)
|
516 |
|
|
{
|
517 |
|
|
struct ata_host *ata = dat;
|
518 |
|
|
ata->enabled = val.int_val;
|
519 |
|
|
}
|
520 |
|
|
|
521 |
|
|
static void
|
522 |
|
|
ata_heads (union param_val val, void *dat)
|
523 |
|
|
{
|
524 |
|
|
struct ata_host *ata = dat;
|
525 |
|
|
if (conf_dev <= 1)
|
526 |
|
|
ata->devices.device[conf_dev].conf.heads = val.int_val;
|
527 |
|
|
}
|
528 |
|
|
|
529 |
|
|
static void
|
530 |
|
|
ata_sectors (union param_val val, void *dat)
|
531 |
|
|
{
|
532 |
|
|
struct ata_host *ata = dat;
|
533 |
|
|
if (conf_dev <= 1)
|
534 |
|
|
ata->devices.device[conf_dev].conf.sectors = val.int_val;
|
535 |
|
|
}
|
536 |
|
|
|
537 |
|
|
static void
|
538 |
|
|
ata_firmware (union param_val val, void *dat)
|
539 |
|
|
{
|
540 |
|
|
struct ata_host *ata = dat;
|
541 |
|
|
if (conf_dev <= 1)
|
542 |
|
|
if (!(ata->devices.device[conf_dev].conf.firmware = strdup (val.str_val)))
|
543 |
|
|
{
|
544 |
|
|
fprintf (stderr, "Peripheral ATA: Run out of memory\n");
|
545 |
|
|
exit (-1);
|
546 |
|
|
}
|
547 |
|
|
}
|
548 |
|
|
|
549 |
|
|
|
550 |
|
|
/*---------------------------------------------------------------------------*/
|
551 |
|
|
/*!Set the ATA multi-word DMA mode
|
552 |
|
|
|
553 |
|
|
Must be -1, 0, 1 or 2.
|
554 |
|
|
|
555 |
|
|
@param[in] val The value to use
|
556 |
|
|
@param[in] dat The config data structure */
|
557 |
|
|
/*---------------------------------------------------------------------------*/
|
558 |
|
|
static void
|
559 |
|
|
ata_mwdma (union param_val val,
|
560 |
|
|
void *dat)
|
561 |
|
|
{
|
562 |
|
|
struct ata_host *ata = dat;
|
563 |
|
|
|
564 |
|
|
if ((val.int_val >= -1) && (val.int_val <= 2))
|
565 |
|
|
{
|
566 |
|
|
ata->devices.device[conf_dev].conf.mwdma = val.int_val;
|
567 |
|
|
}
|
568 |
|
|
else
|
569 |
|
|
{
|
570 |
|
|
fprintf (stderr, "Warning: invalid ATA multi-word DMA mode: ignored\n");
|
571 |
|
|
}
|
572 |
|
|
} /* ata_mwdma() */
|
573 |
|
|
|
574 |
|
|
|
575 |
|
|
/*---------------------------------------------------------------------------*/
|
576 |
|
|
/*!Set the ATA programmed I/O mode
|
577 |
|
|
|
578 |
|
|
Must be 0, 1, 2, 3 or 4.
|
579 |
|
|
|
580 |
|
|
@param[in] val The value to use
|
581 |
|
|
@param[in] dat The config data structure */
|
582 |
|
|
/*---------------------------------------------------------------------------*/
|
583 |
|
|
static void
|
584 |
|
|
ata_pio (union param_val val,
|
585 |
|
|
void *dat)
|
586 |
|
|
{
|
587 |
|
|
struct ata_host *ata = dat;
|
588 |
|
|
|
589 |
|
|
if ((val.int_val >= 0) && (val.int_val <= 4))
|
590 |
|
|
{
|
591 |
|
|
ata->devices.device[conf_dev].conf.pio = val.int_val;
|
592 |
|
|
}
|
593 |
|
|
else
|
594 |
|
|
{
|
595 |
|
|
fprintf (stderr, "Warning: invalid ATA programmed I/O mode: ignored\n");
|
596 |
|
|
}
|
597 |
|
|
} /* ata_pio() */
|
598 |
|
|
|
599 |
|
|
|
600 |
|
|
static void
|
601 |
|
|
ata_start_device (union param_val val, void *dat)
|
602 |
|
|
{
|
603 |
|
|
conf_dev = val.int_val;
|
604 |
|
|
|
605 |
|
|
if (conf_dev > 1)
|
606 |
|
|
fprintf (stderr, "Device %d out-of-range\n", conf_dev);
|
607 |
|
|
}
|
608 |
|
|
|
609 |
|
|
static void
|
610 |
|
|
ata_enddevice (union param_val val, void *dat)
|
611 |
|
|
{
|
612 |
|
|
conf_dev = 2;
|
613 |
|
|
}
|
614 |
|
|
|
615 |
|
|
/*---------------------------------------------------------------------------*/
|
616 |
|
|
/*!Initialize a new ATA configuration
|
617 |
|
|
|
618 |
|
|
ALL parameters are set explicitly to default values. */
|
619 |
|
|
/*---------------------------------------------------------------------------*/
|
620 |
|
|
static void *
|
621 |
|
|
ata_sec_start (void)
|
622 |
|
|
{
|
623 |
|
|
struct ata_host *new = malloc (sizeof (struct ata_host));
|
624 |
|
|
|
625 |
|
|
if (!new)
|
626 |
|
|
{
|
627 |
|
|
fprintf (stderr, "Peripheral ATA: Run out of memory\n");
|
628 |
|
|
exit (-1);
|
629 |
|
|
}
|
630 |
|
|
|
631 |
|
|
memset (new, 0, sizeof (struct ata_host));
|
632 |
|
|
|
633 |
|
|
new->enabled = 1;
|
634 |
|
|
new->baseaddr = 0;
|
635 |
|
|
new->irq = 0;
|
636 |
|
|
new->dev_id = 1;
|
637 |
|
|
new->rev = 0;
|
638 |
|
|
|
639 |
|
|
new->pio_mode0_t1 = PIO_MODE0_T1;
|
640 |
|
|
new->pio_mode0_t2 = PIO_MODE0_T2;
|
641 |
|
|
new->pio_mode0_t4 = PIO_MODE0_T4;
|
642 |
|
|
new->pio_mode0_teoc = PIO_MODE0_TEOC;
|
643 |
|
|
|
644 |
|
|
new->dma_mode0_tm = DMA_MODE0_TM;
|
645 |
|
|
new->dma_mode0_td = DMA_MODE0_TD;
|
646 |
|
|
new->dma_mode0_teoc = DMA_MODE0_TEOC;
|
647 |
|
|
|
648 |
|
|
new->devices.device[0].conf.type = 0;
|
649 |
|
|
new->devices.device[0].conf.file = strdup ("ata_file0");
|
650 |
|
|
new->devices.device[0].conf.size = 0;
|
651 |
|
|
new->devices.device[0].conf.packet = 0;
|
652 |
|
|
new->devices.device[0].conf.heads = 7;
|
653 |
|
|
new->devices.device[0].conf.sectors = 32;
|
654 |
|
|
new->devices.device[0].conf.firmware = "02207031";
|
655 |
|
|
new->devices.device[0].conf.mwdma = 2;
|
656 |
|
|
new->devices.device[0].conf.pio = 4;
|
657 |
|
|
|
658 |
|
|
new->devices.device[1].conf.type = 0;
|
659 |
|
|
new->devices.device[1].conf.file = strdup ("ata_file1");
|
660 |
|
|
new->devices.device[1].conf.size = 0;
|
661 |
|
|
new->devices.device[1].conf.packet = 0;
|
662 |
|
|
new->devices.device[1].conf.heads = 7;
|
663 |
|
|
new->devices.device[1].conf.sectors = 32;
|
664 |
|
|
new->devices.device[1].conf.firmware = "02207031";
|
665 |
|
|
new->devices.device[1].conf.mwdma = 2;
|
666 |
|
|
new->devices.device[1].conf.pio = 4;
|
667 |
|
|
|
668 |
|
|
return new;
|
669 |
|
|
|
670 |
|
|
} /* ata_sec_start() */
|
671 |
|
|
|
672 |
|
|
|
673 |
|
|
static void
|
674 |
|
|
ata_sec_end (void *dat)
|
675 |
|
|
{
|
676 |
|
|
struct ata_host *ata = dat;
|
677 |
|
|
struct mem_ops ops;
|
678 |
|
|
|
679 |
|
|
if (!ata->enabled)
|
680 |
|
|
{
|
681 |
|
|
free (dat);
|
682 |
|
|
return;
|
683 |
|
|
}
|
684 |
|
|
|
685 |
|
|
/* Connect ata_devices. */
|
686 |
|
|
ata_devices_init (&ata->devices);
|
687 |
|
|
ata->devices.device[0].internals.host = ata;
|
688 |
|
|
ata->devices.device[1].internals.host = ata;
|
689 |
|
|
|
690 |
|
|
memset (&ops, 0, sizeof (struct mem_ops));
|
691 |
|
|
|
692 |
|
|
ops.readfunc32 = ata_read32;
|
693 |
|
|
ops.read_dat32 = dat;
|
694 |
|
|
ops.writefunc32 = ata_write32;
|
695 |
|
|
ops.write_dat32 = dat;
|
696 |
|
|
|
697 |
|
|
/* Delays will be readjusted later */
|
698 |
|
|
ops.delayr = 2;
|
699 |
|
|
ops.delayw = 2;
|
700 |
|
|
|
701 |
|
|
ata->mem = reg_mem_area (ata->baseaddr, ATA_ADDR_SPACE, 0, &ops);
|
702 |
|
|
|
703 |
|
|
reg_sim_reset (ata_reset, dat);
|
704 |
|
|
reg_sim_stat (ata_status, dat);
|
705 |
|
|
}
|
706 |
|
|
|
707 |
|
|
void
|
708 |
|
|
reg_ata_sec ()
|
709 |
|
|
{
|
710 |
|
|
struct config_section *sec =
|
711 |
|
|
reg_config_sec ("ata", ata_sec_start, ata_sec_end);
|
712 |
|
|
|
713 |
|
|
reg_config_param (sec, "enabled", paramt_int, ata_enabled);
|
714 |
|
|
reg_config_param (sec, "baseaddr", paramt_addr, ata_baseaddr);
|
715 |
|
|
reg_config_param (sec, "irq", paramt_int, ata_irq);
|
716 |
|
|
reg_config_param (sec, "dev_id", paramt_int, ata_dev_id);
|
717 |
|
|
reg_config_param (sec, "rev", paramt_int, ata_rev);
|
718 |
|
|
|
719 |
|
|
reg_config_param (sec, "pio_mode0_t1", paramt_int, ata_pio_mode0_t1);
|
720 |
|
|
reg_config_param (sec, "pio_mode0_t2", paramt_int, ata_pio_mode0_t2);
|
721 |
|
|
reg_config_param (sec, "pio_mode0_t4", paramt_int, ata_pio_mode0_t4);
|
722 |
|
|
reg_config_param (sec, "pio_mode0_teoc", paramt_int, ata_pio_mode0_teoc);
|
723 |
|
|
|
724 |
|
|
reg_config_param (sec, "dma_mode0_tm", paramt_int, ata_dma_mode0_tm);
|
725 |
|
|
reg_config_param (sec, "dma_mode0_td", paramt_int, ata_dma_mode0_td);
|
726 |
|
|
reg_config_param (sec, "dma_mode0_teoc", paramt_int, ata_dma_mode0_teoc);
|
727 |
|
|
|
728 |
|
|
reg_config_param (sec, "device", paramt_int, ata_start_device);
|
729 |
|
|
reg_config_param (sec, "enddevice", paramt_int, ata_enddevice);
|
730 |
|
|
|
731 |
|
|
reg_config_param (sec, "type", paramt_int, ata_type);
|
732 |
|
|
reg_config_param (sec, "file", paramt_str, ata_file);
|
733 |
|
|
reg_config_param (sec, "size", paramt_int, ata_size);
|
734 |
|
|
reg_config_param (sec, "packet", paramt_int, ata_packet);
|
735 |
|
|
reg_config_param (sec, "heads", paramt_int, ata_heads);
|
736 |
|
|
reg_config_param (sec, "sectors", paramt_int, ata_sectors);
|
737 |
|
|
reg_config_param (sec, "firmware", paramt_str, ata_firmware);
|
738 |
|
|
reg_config_param (sec, "mwdma", paramt_int, ata_mwdma);
|
739 |
|
|
reg_config_param (sec, "pio", paramt_int, ata_pio);
|
740 |
|
|
}
|