OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [eth.h] - Blame information for rev 228

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 19 jeremybenn
/* eth.h -- Simulation of Ethernet MAC header
2
 
3
   Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
4
   Copyright (C) 2008 Embecosm Limited
5
 
6
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
7
 
8
   This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
9
 
10
   This program is free software; you can redistribute it and/or modify it
11
   under the terms of the GNU General Public License as published by the Free
12
   Software Foundation; either version 3 of the License, or (at your option)
13
   any later version.
14
 
15
   This program is distributed in the hope that it will be useful, but WITHOUT
16
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
18
   more details.
19
 
20
   You should have received a copy of the GNU General Public License along
21
   with this program.  If not, see <http://www.gnu.org/licenses/>.  */
22
 
23
/* This program is commented throughout in a fashion suitable for processing
24
   with Doxygen. */
25
 
26
 
27
#ifndef ETH__H
28
#define ETH__H
29
 
30 82 jeremybenn
#if HAVE_ETH_PHY
31
#include <netpacket/packet.h>
32
#endif /* HAVE_ETH_PHY */
33
 
34
#if HAVE_NET_ETHERNET_H
35
# include <net/ethernet.h>
36
#elif defined(HAVE_SYS_ETHERNET_H)
37
# include <sys/ethernet.h>
38
#else /* !HAVE_NET_ETHERNET_H && !HAVE_SYS_ETHERNET_H - */
39
#include <sys/types.h>
40
#endif
41
 
42
/* Address space required by one Ethernet MAC */
43
#define ETH_ADDR_SPACE 0x1000
44
 
45
/* Relative Register Addresses */
46
#define ETH_MODER       (4 * 0x00)
47
#define ETH_INT_SOURCE  (4 * 0x01)
48
#define ETH_INT_MASK    (4 * 0x02)
49
#define ETH_IPGT        (4 * 0x03)
50
#define ETH_IPGR1       (4 * 0x04)
51
#define ETH_IPGR2       (4 * 0x05)
52
#define ETH_PACKETLEN   (4 * 0x06)
53
#define ETH_COLLCONF    (4 * 0x07)
54
#define ETH_TX_BD_NUM   (4 * 0x08)
55
#define ETH_CTRLMODER   (4 * 0x09)
56
#define ETH_MIIMODER    (4 * 0x0A)
57
#define ETH_MIICOMMAND  (4 * 0x0B)
58
#define ETH_MIIADDRESS  (4 * 0x0C)
59
#define ETH_MIITX_DATA  (4 * 0x0D)
60
#define ETH_MIIRX_DATA  (4 * 0x0E)
61
#define ETH_MIISTATUS   (4 * 0x0F)
62
#define ETH_MAC_ADDR0   (4 * 0x10)
63
#define ETH_MAC_ADDR1   (4 * 0x11)
64
#define ETH_HASH0       (4 * 0x12)
65
#define ETH_HASH1       (4 * 0x13)
66
 
67
/* Where BD's are stored */
68
#define ETH_BD_BASE        0x400
69
#define ETH_BD_COUNT       0x100
70
#define ETH_BD_SPACE       (4 * ETH_BD_COUNT)
71
 
72
/* Where to point DMA to transmit/receive */
73
#define ETH_DMA_RX_TX      0x800
74
 
75
/* Field definitions for MODER */
76
#define ETH_MODER_DMAEN_OFFSET     17
77
#define ETH_MODER_RECSMALL_OFFSET  16
78
#define ETH_MODER_PAD_OFFSET       15
79
#define ETH_MODER_HUGEN_OFFSET     14
80
#define ETH_MODER_CRCEN_OFFSET     13
81
#define ETH_MODER_DLYCRCEN_OFFSET  12
82
#define ETH_MODER_RST_OFFSET       11
83
#define ETH_MODER_FULLD_OFFSET     10
84
#define ETH_MODER_EXDFREN_OFFSET   9
85
#define ETH_MODER_NOBCKOF_OFFSET   8
86
#define ETH_MODER_LOOPBCK_OFFSET   7
87
#define ETH_MODER_IFG_OFFSET       6
88
#define ETH_MODER_PRO_OFFSET       5
89
#define ETH_MODER_IAM_OFFSET       4
90
#define ETH_MODER_BRO_OFFSET       3
91
#define ETH_MODER_NOPRE_OFFSET     2
92
#define ETH_MODER_TXEN_OFFSET      1
93
#define ETH_MODER_RXEN_OFFSET      0
94
 
95
/* Field definitions for INT_SOURCE */
96
#define ETH_INT_SOURCE_RXC_OFFSET  6
97
#define ETH_INT_SOURCE_TXC_OFFSET  5
98
#define ETH_INT_SOURCE_BUSY_OFFSET 4
99
#define ETH_INT_SOURCE_RXE_OFFSET  3
100
#define ETH_INT_SOURCE_RXB_OFFSET  2
101
#define ETH_INT_SOURCE_TXE_OFFSET  1
102
#define ETH_INT_SOURCE_TXB_OFFSET  0
103
 
104
/* Field definitions for INT_MASK */
105
#define ETH_INT_MASK_RXC_M_OFFSET  6
106
#define ETH_INT_MASK_TXC_M_OFFSET  5
107
#define ETH_INT_MASK_BUSY_M_OFFSET 4
108
#define ETH_INT_MASK_RXE_M_OFFSET  3
109
#define ETH_INT_MASK_RXB_M_OFFSET  2
110
#define ETH_INT_MASK_TXE_M_OFFSET  1
111
#define ETH_INT_MASK_TXB_M_OFFSET  0
112
 
113
/* Field definitions for PACKETLEN */
114
#define ETH_PACKETLEN_MINFL_OFFSET 16
115
#define ETH_PACKETLEN_MINFL_WIDTH  16
116
#define ETH_PACKETLEN_MAXFL_OFFSET 0
117
#define ETH_PACKETLEN_MAXFL_WIDTH  16
118
 
119
/* Field definitions for COLLCONF */
120
#define ETH_COLLCONF_MAXRET_OFFSET 16
121
#define ETH_COLLCONF_MAXRET_WIDTH  4
122
#define ETH_COLLCONF_COLLVALID_OFFSET 0
123
#define ETH_COLLCONF_COLLVALID_WIDTH  6
124
 
125
/* Field definitions for CTRLMODER */
126
#define ETH_CMODER_TXFLOW_OFFSET   2
127
#define ETH_CMODER_RXFLOW_OFFSET   1
128
#define ETH_CMODER_PASSALL_OFFSET  0
129
 
130
/* Field definitions for MIIMODER */
131
#define ETH_MIIMODER_MRST_OFFSET   9
132
#define ETH_MIIMODER_NOPRE_OFFSET  8
133
#define ETH_MIIMODER_CLKDIV_OFFSET 0
134
#define ETH_MIIMODER_CLKDIV_WIDTH  8
135
 
136
/* Field definitions for MIICOMMAND */
137
#define ETH_MIICOMM_WCDATA_OFFSET  2
138
#define ETH_MIICOMM_RSTAT_OFFSET   1
139
#define ETH_MIICOMM_SCANS_OFFSET   0
140
 
141
/* Field definitions for MIIADDRESS */
142
#define ETH_MIIADDR_RGAD_OFFSET    8
143
#define ETH_MIIADDR_RGAD_WIDTH     5
144
#define ETH_MIIADDR_FIAD_OFFSET    0
145
#define ETH_MIIADDR_FIAD_WIDTH     5
146
 
147
/* Field definitions for MIISTATUS */
148
#define ETH_MIISTAT_NVALID_OFFSET  1
149
#define ETH_MIISTAT_BUSY_OFFSET    1
150
#define ETH_MIISTAT_FAIL_OFFSET    0
151
 
152
/* Field definitions for TX buffer descriptors */
153
#define ETH_TX_BD_LENGTH_OFFSET        16
154
#define ETH_TX_BD_LENGTH_WIDTH         16
155
#define ETH_TX_BD_READY_OFFSET         15
156
#define ETH_TX_BD_IRQ_OFFSET           14
157
#define ETH_TX_BD_WRAP_OFFSET          13
158
#define ETH_TX_BD_PAD_OFFSET           12
159
#define ETH_TX_BD_CRC_OFFSET           11
160
#define ETH_TX_BD_LAST_OFFSET          10
161
#define ETH_TX_BD_PAUSE_OFFSET         9
162
#define ETH_TX_BD_UNDERRUN_OFFSET      8
163
#define ETH_TX_BD_RETRY_OFFSET         4
164
#define ETH_TX_BD_RETRY_WIDTH          4
165
#define ETH_TX_BD_RETRANSMIT_OFFSET    3
166
#define ETH_TX_BD_COLLISION_OFFSET     2
167
#define ETH_TX_BD_DEFER_OFFSET         1
168
#define ETH_TX_BD_NO_CARRIER_OFFSET    0
169
 
170
 
171
/* Field definitions for RX buffer descriptors */
172
#define ETH_RX_BD_LENGTH_OFFSET        16
173
#define ETH_RX_BD_LENGTH_WIDTH         16
174
#define ETH_RX_BD_READY_OFFSET         15
175
#define ETH_RX_BD_IRQ_OFFSET           14
176
#define ETH_RX_BD_WRAP_OFFSET          13
177
#define ETH_RX_BD_MISS_OFFSET          7
178
#define ETH_RX_BD_UVERRUN_OFFSET       6
179
#define ETH_RX_BD_INVALID_OFFSET       5
180
#define ETH_RX_BD_DRIBBLE_OFFSET       4
181
#define ETH_RX_BD_TOOBIG_OFFSET        3
182
#define ETH_RX_BD_TOOSHORT_OFFSET      2
183
#define ETH_RX_BD_CRC_OFFSET           1
184
#define ETH_RX_BD_COLLISION_OFFSET     0
185
 
186
/*
187
 * Ethernet protocol definitions
188
 */
189
#ifdef HAVE_NET_ETHERNET_H
190
#elif defined(HAVE_SYS_ETHERNET_H)
191
#ifndef ETHER_ADDR_LEN
192
#define ETHER_ADDR_LEN ETHERADDRL
193
#endif
194
#ifndef ETHER_HDR_LEN
195
#define ETHER_HDR_LEN sizeof(struct ether_header)
196
#endif
197
#else /* !HAVE_NET_ETHERNET_H && !HAVE_SYS_ETHERNET_H - */
198
#ifdef __CYGWIN__
199
/* define some missing cygwin defines.
200
 *
201
 * NOTE! there is no nonblocking socket option implemented in cygwin.dll
202
 *       so defining MSG_DONTWAIT is just (temporary) workaround !!!
203
 */
204
#define MSG_DONTWAIT  0x40
205
#define ETH_HLEN      14
206
#endif /* __CYGWIN__ */
207
 
208
#define ETH_ALEN    6
209
 
210
struct ether_addr
211
{
212
  u_int8_t ether_addr_octet[ETH_ALEN];
213
};
214
 
215
struct ether_header
216
{
217
  u_int8_t ether_dhost[ETH_ALEN];       /* destination eth addr */
218
  u_int8_t ether_shost[ETH_ALEN];       /* source ether addr    */
219
  u_int16_t ether_type;         /* packet type ID field */
220
};
221
 
222
/* Ethernet protocol ID's */
223
#define ETHERTYPE_PUP           0x0200  /* Xerox PUP */
224
#define ETHERTYPE_IP            0x0800  /* IP */
225
#define ETHERTYPE_ARP           0x0806  /* Address resolution */
226
#define ETHERTYPE_REVARP        0x8035  /* Reverse ARP */
227
 
228
#define ETHER_ADDR_LEN  ETH_ALEN        /* size of ethernet addr */
229
#define ETHER_TYPE_LEN  2       /* bytes in type field */
230
#define ETHER_CRC_LEN   4       /* bytes in CRC field */
231
#define ETHER_HDR_LEN   ETH_HLEN        /* total octets in header */
232
#define ETHER_MIN_LEN   (ETH_ZLEN + ETHER_CRC_LEN)      /* min packet length */
233
#define ETHER_MAX_LEN   (ETH_FRAME_LEN + ETHER_CRC_LEN) /* max packet length */
234
 
235
/* make sure ethenet length is valid */
236
#define ETHER_IS_VALID_LEN(foo) \
237
        ((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN)
238
 
239
/*
240
 * The ETHERTYPE_NTRAILER packet types starting at ETHERTYPE_TRAIL have
241
 * (type-ETHERTYPE_TRAIL)*512 bytes of data followed
242
 * by an ETHER type (as given above) and then the (variable-length) header.
243
 */
244
#define ETHERTYPE_TRAIL         0x1000  /* Trailer packet */
245
#define ETHERTYPE_NTRAILER      16
246
 
247
#define ETHERMTU        ETH_DATA_LEN
248
#define ETHERMIN        (ETHER_MIN_LEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
249
 
250
#endif /* HAVE_NET_ETHERNET_H */
251
 
252
/*
253
 * Implementatino of Ethernet MAC Registers and State
254
 */
255
#define ETH_TXSTATE_IDLE        0
256
#define ETH_TXSTATE_WAIT4BD     10
257
#define ETH_TXSTATE_READFIFO    20
258
#define ETH_TXSTATE_TRANSMIT    30
259
 
260
#define ETH_RXSTATE_IDLE        0
261
#define ETH_RXSTATE_WAIT4BD     10
262
#define ETH_RXSTATE_RECV        20
263
#define ETH_RXSTATE_WRITEFIFO   30
264
 
265
#define ETH_RTX_FILE    0
266
#define ETH_RTX_SOCK    1
267
#define ETH_RTX_VAPI    2
268
 
269
#define ETH_MAXPL   0x10000
270
 
271
enum
272
{ ETH_VAPI_DATA = 0,
273
  ETH_VAPI_CTRL,
274
  ETH_NUM_VAPI_IDS
275
};
276
 
277
 
278 19 jeremybenn
/* Prototypes for external use */
279
extern void  reg_ethernet_sec ();
280
 
281
#endif /* ETH__H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.