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[/] [openrisc/] [trunk/] [or1ksim/] [sim-config.h] - Blame information for rev 864

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Line No. Rev Author Line
1 19 jeremybenn
/* sim-config.h -- Simulator configuration header file
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   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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   Copyright (C) 2008 Embecosm Limited
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   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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   This file is part of OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify it
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   under the terms of the GNU General Public License as published by the Free
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   Software Foundation; either version 3 of the License, or (at your option)
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   any later version.
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   This program is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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   more details.
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   You should have received a copy of the GNU General Public License along
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   with this program.  If not, see <http://www.gnu.org/licenses/>. */
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/* This program is commented throughout in a fashion suitable for processing
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   with Doxygen. */
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#ifndef SIM_CONFIG_H
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#define SIM_CONFIG_H
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/* System includes */
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#include <stdio.h>
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/* Package includes */
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#include "arch.h"
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/* Simulator configuration macros. Eventually this one will be a lot bigger. */
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#define MAX_SBUF_LEN     256    /* Max. length of store buffer */
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#define EXE_LOG_HARDWARE   0    /* Print out RTL states */
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#define EXE_LOG_SIMPLE     1    /* Executed log prints out dissasembly */
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#define EXE_LOG_SOFTWARE   2    /* Simple with some register output */
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#define STR_SIZE         256
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/* Number of cycles between checks to runtime.sim.iprompt */
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#define CHECK_INT_TIME 100000
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49 220 jeremybenn
/* Print to the defined output stream */
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#define PRINTF(x...) fprintf (runtime.sim.fout, x)
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/* Print only if we are not running silently */
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#define PRINTFQ(x...) if (!config.sim.quiet) { fprintf (runtime.sim.fout, x); }
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/*! Data structure for configuration data */
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struct config
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{
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  struct
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  {                             /* External linkage for SystemC */
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    void  *class_ptr;
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    int  (*read_up) (void              *class_ptr,
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                     unsigned long int  addr,
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                     unsigned char      mask[],
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                     unsigned char      rdata[],
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                     int                data_len);
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    int  (*write_up) (void              *class_ptr,
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                      unsigned long int  addr,
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                      unsigned char      mask[],
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                      unsigned char      wdata[],
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                      int                data_len);
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  } ext;
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  struct
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  {
75 143 jeremybenn
    int is_library;             /* Library operation */
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    int debug;                  /* Simulator debugging */
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    int verbose;                /* Force verbose output */
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    int profile;                /* Is profiler running */
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    char *prof_fn;              /* Profiler filename */
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    int mprofile;               /* Is memory profiler running */
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    char *mprof_fn;             /* Memory profiler filename */
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    int history;                /* instruction stream history analysis */
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    int exe_log;                /* Print out RTL states? */
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    int exe_log_type;           /* Type of log */
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    long long int exe_log_start;        /* First instruction to log */
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    long long int exe_log_end;  /* Last instr to log, -1 if continuous */
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    int exe_log_marker;         /* If nonzero, place markers before */
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    /* each exe_log_marker instructions */
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    char *exe_log_fn;           /* RTL state comparison filename */
93 202 julius
    int exe_bin_insn_log;       /* Binary dump log of exec. instructions */
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    char* exe_bin_insn_log_fn;  /* Binary dump log of exec. instructions name */
95 19 jeremybenn
    long clkcycle_ps;           /* Clock duration in ps */
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    int strict_npc;             /* JPB. NPC flushes pipeline when changed */
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    int  quiet;                 /* Minimize message output */
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    int  report_mem_errs;       /* Report out of memory accesses */
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  } sim;
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  struct
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  {                             /* Verification API */
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    int enabled;                /* Whether is VAPI module enabled */
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    int server_port;            /* user specified port for services */
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    int log_enabled;            /* Whether to log the vapi requests */
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    int hide_device_id;         /* Whether to log dev ID each request */
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    char *vapi_fn;              /* vapi log filename */
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  } vapi;
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  struct
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  {
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    char *timings_fn;           /* Filename of the timing table */
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    int memory_order;           /* Memory access stricness */
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    int calling_convention;     /* Do funcs follow std calling conv? */
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    int enable_bursts;          /* Whether burst are enabled */
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    int no_multicycle;          /* Generate no multicycle paths */
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  } cuc;
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  struct
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  {
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    int superscalar;            /* superscalara analysis */
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    int hazards;                /* dependency hazards analysis */
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    int dependstats;            /* dependency statistics */
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    int sbuf_len;               /* length of store buffer, 0=disabled */
125 100 julius
    int hardfloat;      /* whether hardfloat is enabled */
126 19 jeremybenn
  } cpu;
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  struct
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  {
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    int enabled;                /* Whether data cache is enabled */
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    int nways;                  /* Number of DC ways */
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    int nsets;                  /* Number of DC sets */
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    int blocksize;              /* DC entry size */
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    int ustates;                /* number of DC usage states */
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    int store_missdelay;        /* cycles a store miss costs */
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    int store_hitdelay;         /* cycles a store hit costs */
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    int load_missdelay;         /* cycles a load miss costs */
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    int load_hitdelay;          /* cycles a load hit costs */
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  } dc;
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  struct pic
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  {
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    int enabled;                /* Is interrupt controller enabled? */
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    int edge_trigger;           /* Are interrupts edge triggered? */
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    int use_nmi;                /* Do we have non-maskable interrupts? */
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  } pic;
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  struct
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  {
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    int enabled;                /* Is power management operational? */
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  } pm;
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  struct
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  {
155 556 julius
    int enabled;                /* Are performance counters enabled? */
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  } pcu;
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  struct
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  {
160 19 jeremybenn
    int enabled;                /* branch prediction buffer analysis */
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    int sbp_bnf_fwd;            /* Static BP for l.bnf uses fwd predn */
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    int sbp_bf_fwd;             /* Static BP for l.bf uses fwd predn */
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    int btic;                   /* BP target insn cache analysis */
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    int missdelay;              /* How much cycles does the miss cost */
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    int hitdelay;               /* How much cycles does the hit cost */
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  } bpb;
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  struct
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  {
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    int enabled;                /* Is debug module enabled */
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    int rsp_enabled;            /* Is RSP debugging with GDB possible */
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    int rsp_port;               /* Port for RSP GDB connection */
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    unsigned long vapi_id;      /* "Fake" vapi dev id for JTAG proxy */
174 82 jeremybenn
    long int  jtagcycle_ps;     /* JTAG clock duration in ps */
175 19 jeremybenn
  } debug;
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};
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/*! Data structure for run time data */
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struct runtime
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{
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  struct
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  {
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    FILE *fprof;                /* Profiler file */
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    FILE *fmprof;               /* Memory profiler file */
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    FILE *fexe_log;             /* RTL state comparison file */
186 202 julius
    FILE *fexe_bin_insn_log;    /* Binary instruction dump/log file */
187 19 jeremybenn
    FILE *fout;                 /* file for standard output */
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    char *filename;             /* Original Command Simulator file (CZ) */
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    int iprompt;                /* Interactive prompt */
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    int iprompt_run;            /* Interactive prompt is running */
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    long long cycles;           /* Cycles counts fetch stages */
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    long long int end_cycles;   /* JPB. Cycles to end of quantum */
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    double time_point;          /* JPB. Time point in the simulation */
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    unsigned long int ext_int_set;      /* JPB. External interrupts to set */
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    unsigned long int ext_int_clr;      /* DXL. External interrupts ti clear */
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    int mem_cycles;             /* Each cycle has counter of mem_cycles;
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                                   this value is joined with cycles
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                                   at the end of the cycle; no sim
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                                   originated memory accesses should be
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                                   performed inbetween. */
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    int loadcycles;             /* Load and store stalls */
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    int storecycles;
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    long long reset_cycles;
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    int  hush;                  /* Is simulator to do reg dumps */
208 472 jeremybenn
    int  trace_phy;             /* Show physical instr addr when tracing */
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    int  trace_virt;            /* Show virtual instr addr when tracing */
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  } sim;
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  struct
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  {
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    unsigned int  instr;        /* Current JTAG instruction */
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    unsigned long int  mod_id;  /* Currently selected module */
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    int  write_defined_p;       /* WRITE_COMMAND has set details for GO */
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    unsigned char  acc_type;    /* Access type for GO */
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    unsigned long int  addr;    /* Address to read/write for GO */
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    unsigned long int  size;    /* Num bytes to read/write (up to 2^16) */
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  } debug;
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  struct
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  {
224 19 jeremybenn
    long long instructions;     /* Instructions executed */
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    long long reset_instructions;
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    int stalled;
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    int halted;                 /* When library hits exit. */
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    int hazardwait;             /* how many cycles were wasted because of hazards */
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    int supercycles;            /* Superscalar cycles */
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  } cpu;
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  struct
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  {                             /* Verification API, part of Adv Core Verif */
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    int enabled;                /* Whether is VAPI module enabled */
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    FILE *vapi_file;            /* vapi file */
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    int server_port;            /* A user specified port number for services */
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  } vapi;
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/* CUC configuration parameters */
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  struct
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  {
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    int mdelay[4];              /* average memory delays in cycles
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                                   {read single, read burst, write single, write burst} */
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    double cycle_duration;      /* in ns */
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  } cuc;
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};
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/*! Union of all possible paramter values */
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union param_val
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{
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  char          *str_val;
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  int            int_val;
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  long long int  longlong_val;
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  oraddr_t       addr_val;
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};
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/*! Enum of all possible paramter types */
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enum param_t
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{
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  PARAMT_NONE = 0,               /* No parameter */
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  PARAMT_STR,                   /* String parm enclosed in double quotes (") */
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  PARAMT_WORD,                  /* String parm NOT enclosed in double quotes */
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  PARAMT_INT,                   /* Integer parameter */
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  PARAMT_LONGLONG,              /* Long long int parameter */
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  PARAMT_ADDR                   /* Address parameter */
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};
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/* Generic structure for a configuration section */
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struct config_section
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{
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  char *name;
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  void *(*sec_start) (void);
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  void (*sec_end) (void *);
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  void *dat;
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  struct config_param *params;
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  struct config_section *next;
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};
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/* Externally visible data structures*/
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extern struct config          config;
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extern struct runtime         runtime;
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extern struct config_section *cur_section;
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extern int                    do_stats;
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/* Prototypes for external use */
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extern void  set_config_command (int argc, char **argv);
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extern void  init_defconfig (void);
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extern int   parse_args (int argc, char *argv[]);
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extern void  print_config (void);
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extern void  reg_config_param (struct config_section *sec,
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                               const char            *param,
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                               enum param_t           type,
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                               void (*param_cb)  (union param_val,
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                                                  void *));
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extern struct config_section *reg_config_sec (const char *section,
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                                              void *(*sec_start) (void),
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                                              void  (*sec_end) (void *));
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extern void  reg_config_secs ();
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#endif /* SIM_CONFIG_H */

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