OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [README] - Blame information for rev 104

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 82 jeremybenn
                              Or1ksim Test Suite
2
                              ==================
3
 
4
This is the Or1ksim test suite, which is now integrated with the main Or1ksim
5
development package. It operates using a standard DejaGNU framework within the
6
GNU autoconf/automake/libtool structure.
7
 
8 90 jeremybenn
A separate configuration file is needed for the OpenRISC programs used in
9
testing, since these use the OR1K tool chain, rather than the host tool
10
chain. This can be found in the "test-code-or1k" directory.
11 82 jeremybenn
 
12 90 jeremybenn
Tests are provided for the standalone simulator (or1ksim) and for the library
13
(libsim.a).
14 82 jeremybenn
 
15 104 jeremybenn
At the time of writing a total of 1,063 tests compile, run and pass. That
16
figure is broken down into 799 tests of the standalone simulator and 264 tests
17
of the library
18 90 jeremybenn
 
19 82 jeremybenn
Configuration and make files are provided for further test programs. These
20
come in three categories.
21
- Tests which compile correctly, but will not run to completion.
22
- Tests which compile, but will not run at all.
23
- Tests which will not compile correctly.
24
 
25
File Organization
26
=================
27
 
28 90 jeremybenn
Each test program has its own directory under test-code (for native tests,
29
typically of the library) or test-code-or1k (for OpenRISC code, which must use
30
the OpenRISC tool chain). This builds the test program. If necessary it copies
31
data files to the main build/testsuite directory.
32 82 jeremybenn
 
33 90 jeremybenn
Each test then has a DejaGNU expect script in or1ksim.tests (for standalone
34
tests) and libsim.tests (for library tests), which loads and runs the
35
test. Support script procedures are in lib/or1ksim.exp and lib/libsim.exp.
36 82 jeremybenn
 
37
Libraries
38
=========
39
 
40
Within the test-code there are several libraries:
41
 
42
support:    A minimal C library.
43
except:     Exception handling and startup code.
44
mc-common:  A library to support the memory controller tests.
45
 
46
Working tests
47
=============
48
 
49 104 jeremybenn
A total of 799 tests of standalone Or1ksim:
50
 
51
basic:          8 tests of a wide range of instructions and registers.
52
cache:          5 tests of the Or1ksim cache modeling
53
cbasic:        19 tests of minimal C functionality
54
cfg:           12 tests of the OR1K configuration register
55
dhry:           1 Dhrystone 2.1 benchmark using Or1ksim's timing facility.
56
dmatest:        3 tests of DMA.
57
eth:           12 tests of the Ethernet interface.
58
except-test:    7 tests of OR1K exception handling
59
exit:           1 test that C program exits correctly
60
ext:          104 tests of the sign extension (l.ext) instructions.
61
fbtest:         1 test of the frame buffer.
62
fp            337 tests of floating point functionality (Feature 413).
63
functest:      11 tests of the C function calling interface.
64
flag:           1 test of Supervision Register (SR) flag bits.
65
int-test:      86 tests of the programmable interrupt controller.
66
kbdtest:       26 tests of the PS2 keyboard interface.
67
local-global:   1 test of C local and global variables.
68
lws-test:      13 tests of the l.lws instruction (Bug 1767).
69
mem-test:      16 tests of simple memory access.
70
mmu:          110 tests of the MMU.
71
mul:            5 tests of the multiply functionality.
72
mycompress:     1 test using a compression program.
73
tick:          19 tests of the OR1K tick timer.
74
 
75 98 jeremybenn
A total of 264 tests of the libsim library:
76 82 jeremybenn
 
77 104 jeremybenn
int-edge:               6 tests of edge triggered interrupts.
78
int-level:              5 tests of level triggered interrupts.
79
lib-iftest:             1 test  of the basic library interface functions.
80 98 jeremybenn
jtag-basic:            17 tests of JTAG reset and instruction selection
81
jtag-go-command-read:  60 tests of JTAG GO_COMMAND for reading
82
jtag-go-command-write: 54 tests of JTAG GO_COMMAND for writing
83
jtag-read-command:     18 tests of JTAG READ_COMMAND
84 104 jeremybenn
jtag-read-control:      8 tests of JTAG READ_CONTROL
85 98 jeremybenn
jtag-select-module:    20 tests of JTAG module selection
86
jtag-write-command:    58 tests of JTAG WRITE_COMMAND
87
jtag-write-control:    13 tests of JTAG WRITE_CONTROL
88 104 jeremybenn
upcalls:                2 tests of the upcall interface.
89 93 jeremybenn
 
90 82 jeremybenn
Tests which build, but do not run to completion
91
===============================================
92
 
93 93 jeremybenn
The following tests of standalone Or1ksim rely on VAPI in Or1ksim, so need a
94
client to provide test data over TCP/IP.
95 82 jeremybenn
 
96
acv-gpio:  a test of the GPIO.
97
acv-uart:  a test of the UART
98
 
99
Tests which build, but do not run at all
100
========================================
101
 
102 93 jeremybenn
These tests of standalone Or1ksim (which are built by the make file), do not
103
appear to run at all. The problem is in the linker script and/or the
104
configuration for Or1ksim.
105 82 jeremybenn
 
106
mc-async:  a test of the memory controller with asynchronous memory.
107
mc-dram:   a test of the memory controller with DRAM.
108
mc-ssram:  a test of the memory controller with SSRAM.
109
mc-sync:   a test of the memory controller with synchronous memory.
110
uOS:       a microKernel.
111
 
112
Tests which do not build
113
========================
114
 
115 93 jeremybenn
The following test of standalone Or1ksim builds with a myriad of warnings.
116 82 jeremybenn
 
117
inst-set-test:  a comprehensive test of the instruction set using C.
118
 
119
 
120 93 jeremybenn
Updated by Jeremy Bennett (jeremy@jeremybennett.com)
121 104 jeremybenn
3 June 2010

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.