OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [default.ld] - Blame information for rev 867

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 90 jeremybenn
/* default.ld. Default linker script for Or1ksim test programs
2
 
3
   Copyright (C) 1999-2006 OpenCores
4
   Copyright (C) 2010 Embecosm Limited
5
 
6
   Contributors various OpenCores participants
7
   Contributor Jeremy Bennett 
8
 
9
   This file is part of OpenRISC 1000 Architectural Simulator.
10
 
11
   This program is free software; you can redistribute it and/or modify it
12
   under the terms of the GNU General Public License as published by the Free
13
   Software Foundation; either version 3 of the License, or (at your option)
14
   any later version.
15
 
16
   This program is distributed in the hope that it will be useful, but WITHOUT
17
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19
   more details.
20
 
21
   You should have received a copy of the GNU General Public License along
22
   with this program.  If not, see .  */
23
 
24
/* ----------------------------------------------------------------------------
25
   This code is commented throughout for use with Doxygen.
26
   --------------------------------------------------------------------------*/
27
 
28
MEMORY
29
        {
30
        except : ORIGIN = 0x00000000, LENGTH = 0x00002000
31
        ram    : ORIGIN = 0x00002000, LENGTH = 0x001fe000
32
        }
33
 
34
SECTIONS
35
{
36 458 julius
          /*
37
          For some reason the linker script can't see the _reset_vector symbol
38
          (even if we declare it global), so we explicitly set it. */
39
 
40
        .except :
41
        {
42
        _except_beg = .;
43
        *(.except)
44
        _reset_vector = DEFINED (_reset_vector) ? _reset_vector : 0x00000100;
45
        _except_end = .;
46
        } > except
47
 
48 90 jeremybenn
        .text :
49
        {
50 458 julius
        _src_beg = .;
51 90 jeremybenn
        *(.text)
52
        *(.rodata)
53 233 julius
        *(.rodata.*)
54 458 julius
        } > ram
55 90 jeremybenn
 
56
        .data :
57
        {
58
        _dst_beg = .;
59
        *(.data)
60
        *(.data.rel)
61
        *(.data.rel.local)
62
        _dst_end = .;
63
        } > ram
64
 
65
        .bss :
66
        {
67 458 julius
        _bstart = .;
68 90 jeremybenn
        *(.bss)
69 458 julius
        _bend = .;
70 90 jeremybenn
        } > ram
71
 
72
        .stack  ALIGN(0x10) (NOLOAD):
73
        {
74
        *(.stack)
75
        _ram_end = .;
76
        } > ram
77
}
78
 
79
ENTRY (_reset_vector)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.