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/* except.s. Exception handling support for Or1k tests
 
   Copyright (C) 1999-2006 OpenCores
   Copyright (C) 2010 Embecosm Limited
 
   Contributors various OpenCores participants
   Contributor Jeremy Bennett 
 
   This file is part of OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published by the Free
   Software Foundation; either version 3 of the License, or (at your option)
   any later version.
 
   This program is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   more details.
 
   You should have received a copy of the GNU General Public License along
   with this program.  If not, see .  */
 
/* ----------------------------------------------------------------------------
   This code is commented throughout for use with Doxygen.
   --------------------------------------------------------------------------*/
 
/* Support file for c based tests */
#include "spr-defs.h"
 
#define reset reset
 
#define REDZONE_SIZE 128
#define EXCEPT_STACK_SIZE (116 + REDZONE_SIZE)
 
        .section .stack
        .space 0x1000
stack:
 
        .extern reset_support
        .extern c_reset
        .extern excpt_buserr
        .extern excpt_dpfault
        .extern excpt_ipfault
        .extern excpt_tick
        .extern excpt_align
        .extern excpt_illinsn
        .extern excpt_int
        .extern excpt_dtlbmiss
        .extern excpt_itlbmiss
        .extern excpt_range
        .extern excpt_syscall
        .extern excpt_break
        .extern excpt_trap
 
        .section .except,"ax"
        .org    0x100
reset_vector:
        l.nop
        l.nop
        l.addi  r4,r0,0x0
        l.addi  r5,r0,0x0
        l.addi  r6,r0,0x0
        l.addi  r7,r0,0x0
        l.addi  r8,r0,0x0
        l.addi  r9,r0,0x0
        l.addi  r10,r0,0x0
        l.addi  r11,r0,0x0
        l.addi  r12,r0,0x0
        l.addi  r13,r0,0x0
        l.addi  r14,r0,0x0
        l.addi  r15,r0,0x0
        l.addi  r16,r0,0x0
        l.addi  r17,r0,0x0
        l.addi  r18,r0,0x0
        l.addi  r19,r0,0x0
        l.addi  r20,r0,0x0
        l.addi  r21,r0,0x0
        l.addi  r22,r0,0x0
        l.addi  r23,r0,0x0
        l.addi  r24,r0,0x0
        l.addi  r25,r0,0x0
        l.addi  r26,r0,0x0
        l.addi  r27,r0,0x0
        l.addi  r28,r0,0x0
        l.addi  r29,r0,0x0
        l.addi  r30,r0,0x0
        l.addi  r31,r0,0x0
        l.j     start
        l.nop
 
        .org    0x200
buserr_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_buserr)
        l.ori   r10,r10,lo(excpt_buserr)
        l.lwz   r10,0x0(r10)
        l.jr    r10
        l.nop
 
        .org    0x300
dpfault_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
 
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_dpfault)
        l.ori   r10,r10,lo(excpt_dpfault)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0x400
ipfault_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_ipfault)
        l.ori   r10,r10,lo(excpt_ipfault)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0x500
lpint_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_tick)
        l.ori   r10,r10,lo(excpt_tick)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0x600
align_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_align)
        l.ori   r10,r10,lo(excpt_align)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0x700
illinsn_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_illinsn)
        l.ori   r10,r10,lo(excpt_illinsn)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0x800
hpint_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_int)
        l.ori   r10,r10,lo(excpt_int)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0x900
dtlbmiss_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
 
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_dtlbmiss)
        l.ori   r10,r10,lo(excpt_dtlbmiss)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0xa00
itlbmiss_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_itlbmiss)
        l.ori   r10,r10,lo(excpt_itlbmiss)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0xb00
range_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_range)
        l.ori   r10,r10,lo(excpt_range)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0xc00
syscall_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_syscall)
        l.ori   r10,r10,lo(excpt_syscall)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0xd00
break_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_break)
        l.ori   r10,r10,lo(excpt_break)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .org    0xe00
trap_vector:
        l.addi  r1,r1,-EXCEPT_STACK_SIZE
        l.sw    0x18(r1),r9
        l.jal   store_regs
        l.nop
        l.movhi r9,hi(end_except)
        l.ori   r9,r9,lo(end_except)
        l.movhi r10,hi(excpt_trap)
        l.ori   r10,r10,lo(excpt_trap)
        l.lwz   r10,0(r10)
        l.jr    r10
        l.nop
 
        .section .text
 
start:  l.movhi r1,hi(stack)
        l.ori   r1,r1,lo(stack)
        l.ori   r2,r1, 0
 
        /* Call reset() function, in support library, which calls main() */
        l.movhi r4,hi(reset)
        l.ori   r4,r4,lo(reset)
        l.jr    r4
        l.nop
 
 
store_regs:
        l.sw    0x00(r1),r3
        l.sw    0x04(r1),r4
        l.sw    0x08(r1),r5
        l.sw    0x0c(r1),r6
        l.sw    0x10(r1),r7
        l.sw    0x14(r1),r8
        l.sw    0x1c(r1),r10
        l.sw    0x20(r1),r11
        l.sw    0x24(r1),r12
        l.sw    0x28(r1),r13
        l.sw    0x2c(r1),r14
        l.sw    0x30(r1),r15
        l.sw    0x34(r1),r16
        l.sw    0x38(r1),r17
        l.sw    0x3c(r1),r18
        l.sw    0x40(r1),r19
        l.sw    0x44(r1),r20
        l.sw    0x48(r1),r21
        l.sw    0x4c(r1),r22
        l.sw    0x50(r1),r23
        l.sw    0x54(r1),r24
        l.sw    0x58(r1),r25
        l.sw    0x5c(r1),r26
        l.sw    0x60(r1),r27
        l.sw    0x64(r1),r28
        l.sw    0x68(r1),r29
        l.sw    0x6c(r1),r30
        l.sw    0x70(r1),r31
        l.jr    r9
        l.nop
 
end_except:
        l.lwz   r3,0x00(r1)
        l.lwz   r4,0x04(r1)
        l.lwz   r5,0x08(r1)
        l.lwz   r6,0x0c(r1)
        l.lwz   r7,0x10(r1)
        l.lwz   r8,0x14(r1)
        l.lwz   r9,0x18(r1)
        l.lwz   r10,0x1c(r1)
        l.lwz   r11,0x20(r1)
        l.lwz   r12,0x24(r1)
        l.lwz   r13,0x28(r1)
        l.lwz   r14,0x2c(r1)
        l.lwz   r15,0x30(r1)
        l.lwz   r16,0x34(r1)
        l.lwz   r17,0x38(r1)
        l.lwz   r18,0x3c(r1)
        l.lwz   r19,0x40(r1)
        l.lwz   r20,0x44(r1)
        l.lwz   r21,0x48(r1)
        l.lwz   r22,0x4c(r1)
        l.lwz   r23,0x50(r1)
        l.lwz   r24,0x54(r1)
        l.lwz   r25,0x58(r1)
        l.lwz   r26,0x5c(r1)
        l.lwz   r27,0x60(r1)
        l.lwz   r28,0x64(r1)
        l.lwz   r29,0x68(r1)
        l.lwz   r30,0x6c(r1)
        l.lwz   r31,0x70(r1)
        l.addi  r1,r1,EXCEPT_STACK_SIZE
        l.rfe
        l.nop
 

Line No.	Rev	Author	Line
1	90	jeremybenn	`/* except.s. Exception handling support for Or1k tests`
2
3			`Copyright (C) 1999-2006 OpenCores`
4			`Copyright (C) 2010 Embecosm Limited`
5
6			`Contributors various OpenCores participants`
7			`Contributor Jeremy Bennett`
8
9			`This file is part of OpenRISC 1000 Architectural Simulator.`
10
11			`This program is free software; you can redistribute it and/or modify it`
12			`under the terms of the GNU General Public License as published by the Free`
13			`Software Foundation; either version 3 of the License, or (at your option)`
14			`any later version.`
15
16			`This program is distributed in the hope that it will be useful, but WITHOUT`
17			`ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
18			`FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for`
19			`more details.`
20
21			`You should have received a copy of the GNU General Public License along`
22			`with this program. If not, see . */`
23
24			`/* ----------------------------------------------------------------------------`
25			`This code is commented throughout for use with Doxygen.`
26			`--------------------------------------------------------------------------*/`
27
28	458	julius	`/* Support file for c based tests */`
29	90	jeremybenn	`#include "spr-defs.h"`
30
31	346	jeremybenn	`#define reset reset`
32	90	jeremybenn
33	458	julius	`#define REDZONE_SIZE 128`
34			`#define EXCEPT_STACK_SIZE (116 + REDZONE_SIZE)`
35
36	90	jeremybenn	`.section .stack`
37			`.space 0x1000`
38	346	jeremybenn	`stack:`
39	90	jeremybenn
40	346	jeremybenn	`.extern reset_support`
41			`.extern c_reset`
42			`.extern excpt_buserr`
43			`.extern excpt_dpfault`
44			`.extern excpt_ipfault`
45			`.extern excpt_tick`
46			`.extern excpt_align`
47			`.extern excpt_illinsn`
48			`.extern excpt_int`
49			`.extern excpt_dtlbmiss`
50			`.extern excpt_itlbmiss`
51			`.extern excpt_range`
52			`.extern excpt_syscall`
53			`.extern excpt_break`
54			`.extern excpt_trap`
55	90	jeremybenn
56	458	julius	`.section .except,"ax"`
57			`.org 0x100`
58			`reset_vector:`
59			`l.nop`
60			`l.nop`
61			`l.addi r4,r0,0x0`
62			`l.addi r5,r0,0x0`
63			`l.addi r6,r0,0x0`
64			`l.addi r7,r0,0x0`
65			`l.addi r8,r0,0x0`
66			`l.addi r9,r0,0x0`
67			`l.addi r10,r0,0x0`
68			`l.addi r11,r0,0x0`
69			`l.addi r12,r0,0x0`
70			`l.addi r13,r0,0x0`
71			`l.addi r14,r0,0x0`
72			`l.addi r15,r0,0x0`
73			`l.addi r16,r0,0x0`
74			`l.addi r17,r0,0x0`
75			`l.addi r18,r0,0x0`
76			`l.addi r19,r0,0x0`
77			`l.addi r20,r0,0x0`
78			`l.addi r21,r0,0x0`
79			`l.addi r22,r0,0x0`
80			`l.addi r23,r0,0x0`
81			`l.addi r24,r0,0x0`
82			`l.addi r25,r0,0x0`
83			`l.addi r26,r0,0x0`
84			`l.addi r27,r0,0x0`
85			`l.addi r28,r0,0x0`
86			`l.addi r29,r0,0x0`
87			`l.addi r30,r0,0x0`
88			`l.addi r31,r0,0x0`
89			`l.j start`
90			`l.nop`
91
92			`.org 0x200`
93	346	jeremybenn	`buserr_vector:`
94	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
95			`l.sw 0x18(r1),r9`
96			`l.jal store_regs`
97			`l.nop`
98			`l.movhi r9,hi(end_except)`
99			`l.ori r9,r9,lo(end_except)`
100	346	jeremybenn	`l.movhi r10,hi(excpt_buserr)`
101			`l.ori r10,r10,lo(excpt_buserr)`
102	458	julius	`l.lwz r10,0x0(r10)`
103			`l.jr r10`
104	90	jeremybenn	`l.nop`
105
106	458	julius	`.org 0x300`
107	346	jeremybenn	`dpfault_vector:`
108	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
109			`l.sw 0x18(r1),r9`
110			`l.jal store_regs`
111			`l.nop`
112
113			`l.movhi r9,hi(end_except)`
114			`l.ori r9,r9,lo(end_except)`
115	346	jeremybenn	`l.movhi r10,hi(excpt_dpfault)`
116			`l.ori r10,r10,lo(excpt_dpfault)`
117	458	julius	`l.lwz r10,0(r10)`
118			`l.jr r10`
119	90	jeremybenn	`l.nop`
120
121	458	julius	`.org 0x400`
122	346	jeremybenn	`ipfault_vector:`
123	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
124			`l.sw 0x18(r1),r9`
125			`l.jal store_regs`
126			`l.nop`
127			`l.movhi r9,hi(end_except)`
128			`l.ori r9,r9,lo(end_except)`
129	346	jeremybenn	`l.movhi r10,hi(excpt_ipfault)`
130			`l.ori r10,r10,lo(excpt_ipfault)`
131	458	julius	`l.lwz r10,0(r10)`
132			`l.jr r10`
133	90	jeremybenn	`l.nop`
134
135	458	julius	`.org 0x500`
136	346	jeremybenn	`lpint_vector:`
137	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
138			`l.sw 0x18(r1),r9`
139			`l.jal store_regs`
140			`l.nop`
141			`l.movhi r9,hi(end_except)`
142			`l.ori r9,r9,lo(end_except)`
143	346	jeremybenn	`l.movhi r10,hi(excpt_tick)`
144			`l.ori r10,r10,lo(excpt_tick)`
145	458	julius	`l.lwz r10,0(r10)`
146			`l.jr r10`
147	90	jeremybenn	`l.nop`
148
149	458	julius	`.org 0x600`
150	346	jeremybenn	`align_vector:`
151	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
152			`l.sw 0x18(r1),r9`
153			`l.jal store_regs`
154			`l.nop`
155			`l.movhi r9,hi(end_except)`
156			`l.ori r9,r9,lo(end_except)`
157	346	jeremybenn	`l.movhi r10,hi(excpt_align)`
158			`l.ori r10,r10,lo(excpt_align)`
159	458	julius	`l.lwz r10,0(r10)`
160			`l.jr r10`
161	90	jeremybenn	`l.nop`
162
163	458	julius	`.org 0x700`
164	346	jeremybenn	`illinsn_vector:`
165	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
166			`l.sw 0x18(r1),r9`
167			`l.jal store_regs`
168			`l.nop`
169			`l.movhi r9,hi(end_except)`
170			`l.ori r9,r9,lo(end_except)`
171	346	jeremybenn	`l.movhi r10,hi(excpt_illinsn)`
172			`l.ori r10,r10,lo(excpt_illinsn)`
173	458	julius	`l.lwz r10,0(r10)`
174			`l.jr r10`
175	90	jeremybenn	`l.nop`
176
177	458	julius	`.org 0x800`
178	346	jeremybenn	`hpint_vector:`
179	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
180			`l.sw 0x18(r1),r9`
181			`l.jal store_regs`
182			`l.nop`
183			`l.movhi r9,hi(end_except)`
184			`l.ori r9,r9,lo(end_except)`
185	346	jeremybenn	`l.movhi r10,hi(excpt_int)`
186			`l.ori r10,r10,lo(excpt_int)`
187	458	julius	`l.lwz r10,0(r10)`
188			`l.jr r10`
189	90	jeremybenn	`l.nop`
190
191	458	julius	`.org 0x900`
192	346	jeremybenn	`dtlbmiss_vector:`
193	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
194			`l.sw 0x18(r1),r9`
195			`l.jal store_regs`
196			`l.nop`
197
198			`l.movhi r9,hi(end_except)`
199			`l.ori r9,r9,lo(end_except)`
200	346	jeremybenn	`l.movhi r10,hi(excpt_dtlbmiss)`
201			`l.ori r10,r10,lo(excpt_dtlbmiss)`
202	458	julius	`l.lwz r10,0(r10)`
203			`l.jr r10`
204	90	jeremybenn	`l.nop`
205
206	458	julius	`.org 0xa00`
207	346	jeremybenn	`itlbmiss_vector:`
208	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
209			`l.sw 0x18(r1),r9`
210			`l.jal store_regs`
211			`l.nop`
212			`l.movhi r9,hi(end_except)`
213			`l.ori r9,r9,lo(end_except)`
214	346	jeremybenn	`l.movhi r10,hi(excpt_itlbmiss)`
215			`l.ori r10,r10,lo(excpt_itlbmiss)`
216	458	julius	`l.lwz r10,0(r10)`
217			`l.jr r10`
218	90	jeremybenn	`l.nop`
219
220	458	julius	`.org 0xb00`
221	346	jeremybenn	`range_vector:`
222	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
223			`l.sw 0x18(r1),r9`
224			`l.jal store_regs`
225			`l.nop`
226			`l.movhi r9,hi(end_except)`
227			`l.ori r9,r9,lo(end_except)`
228	346	jeremybenn	`l.movhi r10,hi(excpt_range)`
229			`l.ori r10,r10,lo(excpt_range)`
230	458	julius	`l.lwz r10,0(r10)`
231			`l.jr r10`
232	90	jeremybenn	`l.nop`
233
234	458	julius	`.org 0xc00`
235	346	jeremybenn	`syscall_vector:`
236	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
237			`l.sw 0x18(r1),r9`
238			`l.jal store_regs`
239			`l.nop`
240			`l.movhi r9,hi(end_except)`
241			`l.ori r9,r9,lo(end_except)`
242	346	jeremybenn	`l.movhi r10,hi(excpt_syscall)`
243			`l.ori r10,r10,lo(excpt_syscall)`
244	458	julius	`l.lwz r10,0(r10)`
245			`l.jr r10`
246	90	jeremybenn	`l.nop`
247
248	458	julius	`.org 0xd00`
249	346	jeremybenn	`break_vector:`
250	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
251			`l.sw 0x18(r1),r9`
252			`l.jal store_regs`
253			`l.nop`
254			`l.movhi r9,hi(end_except)`
255			`l.ori r9,r9,lo(end_except)`
256	346	jeremybenn	`l.movhi r10,hi(excpt_break)`
257			`l.ori r10,r10,lo(excpt_break)`
258	458	julius	`l.lwz r10,0(r10)`
259			`l.jr r10`
260	90	jeremybenn	`l.nop`
261
262	458	julius	`.org 0xe00`
263	346	jeremybenn	`trap_vector:`
264	458	julius	`l.addi r1,r1,-EXCEPT_STACK_SIZE`
265			`l.sw 0x18(r1),r9`
266			`l.jal store_regs`
267			`l.nop`
268			`l.movhi r9,hi(end_except)`
269			`l.ori r9,r9,lo(end_except)`
270	346	jeremybenn	`l.movhi r10,hi(excpt_trap)`
271			`l.ori r10,r10,lo(excpt_trap)`
272	458	julius	`l.lwz r10,0(r10)`
273			`l.jr r10`
274	90	jeremybenn	`l.nop`
275
276	458	julius	`.section .text`
277
278			`start: l.movhi r1,hi(stack)`
279	346	jeremybenn	`l.ori r1,r1,lo(stack)`
280	458	julius	`l.ori r2,r1, 0`
281	90	jeremybenn
282	458	julius	`/* Call reset() function, in support library, which calls main() */`
283			`l.movhi r4,hi(reset)`
284			`l.ori r4,r4,lo(reset)`
285			`l.jr r4`
286	90	jeremybenn	`l.nop`
287
288	458	julius
289			`store_regs:`
290			`l.sw 0x00(r1),r3`
291			`l.sw 0x04(r1),r4`
292			`l.sw 0x08(r1),r5`
293			`l.sw 0x0c(r1),r6`
294			`l.sw 0x10(r1),r7`
295			`l.sw 0x14(r1),r8`
296			`l.sw 0x1c(r1),r10`
297			`l.sw 0x20(r1),r11`
298			`l.sw 0x24(r1),r12`
299			`l.sw 0x28(r1),r13`
300			`l.sw 0x2c(r1),r14`
301			`l.sw 0x30(r1),r15`
302			`l.sw 0x34(r1),r16`
303			`l.sw 0x38(r1),r17`
304			`l.sw 0x3c(r1),r18`
305			`l.sw 0x40(r1),r19`
306			`l.sw 0x44(r1),r20`
307			`l.sw 0x48(r1),r21`
308			`l.sw 0x4c(r1),r22`
309			`l.sw 0x50(r1),r23`
310			`l.sw 0x54(r1),r24`
311			`l.sw 0x58(r1),r25`
312			`l.sw 0x5c(r1),r26`
313			`l.sw 0x60(r1),r27`
314			`l.sw 0x64(r1),r28`
315			`l.sw 0x68(r1),r29`
316			`l.sw 0x6c(r1),r30`
317			`l.sw 0x70(r1),r31`
318	90	jeremybenn	`l.jr r9`
319			`l.nop`
320
321			`end_except:`
322	458	julius	`l.lwz r3,0x00(r1)`
323			`l.lwz r4,0x04(r1)`
324			`l.lwz r5,0x08(r1)`
325			`l.lwz r6,0x0c(r1)`
326			`l.lwz r7,0x10(r1)`
327			`l.lwz r8,0x14(r1)`
328			`l.lwz r9,0x18(r1)`
329			`l.lwz r10,0x1c(r1)`
330			`l.lwz r11,0x20(r1)`
331			`l.lwz r12,0x24(r1)`
332			`l.lwz r13,0x28(r1)`
333			`l.lwz r14,0x2c(r1)`
334			`l.lwz r15,0x30(r1)`
335			`l.lwz r16,0x34(r1)`
336			`l.lwz r17,0x38(r1)`
337			`l.lwz r18,0x3c(r1)`
338			`l.lwz r19,0x40(r1)`
339			`l.lwz r20,0x44(r1)`
340			`l.lwz r21,0x48(r1)`
341			`l.lwz r22,0x4c(r1)`
342			`l.lwz r23,0x50(r1)`
343			`l.lwz r24,0x54(r1)`
344			`l.lwz r25,0x58(r1)`
345			`l.lwz r26,0x5c(r1)`
346			`l.lwz r27,0x60(r1)`
347			`l.lwz r28,0x64(r1)`
348			`l.lwz r29,0x68(r1)`
349			`l.lwz r30,0x6c(r1)`
350			`l.lwz r31,0x70(r1)`
351			`l.addi r1,r1,EXCEPT_STACK_SIZE`
352	90	jeremybenn	`l.rfe`
353			`l.nop`
354	458	julius

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