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112 |
jeremybenn |
/* is-add-test.S. l.add, l.addc, l.addi and l.addic instruction test of Or1ksim
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*
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* Copyright (C) 1999-2006 OpenCores
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* Copyright (C) 2010 Embecosm Limited
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*
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* Contributors various OpenCores participants
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* Contributor Jeremy Bennett
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*
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* This file is part of OpenRISC 1000 Architectural Simulator.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 3 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see .
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*/
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/* ----------------------------------------------------------------------------
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* Coding conventions
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*
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* A simple rising stack is provided starting at _stack and pointed to by
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* r1. r1 points to the next free word. Only 32-bit registers may be pushed
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* onto the stack.
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*
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* Local labels up to 49 are reserved for macros. Each is used only once in
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* all macros. You can get in a serious mess if you get local label clashing
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* in macros.
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*
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* Arguments to functions are passed in r3 through r8.
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* r9 is the link (return address)
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* r11 is for returning results
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*
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* Only r1 and r2 are preserved across function calls. It is up to the callee
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* to save any other registers required.
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* ------------------------------------------------------------------------- */
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/* ----------------------------------------------------------------------------
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* Test coverage
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*
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* The l.add, l.addc, l.addi and l.addic instructions should set the carry and
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* overflow flags.
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*
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* In addition the l.addc and l.addic instructions should add in the carry
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* bit.
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*
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* Problems in this area were reported in Bug 1771. Having fixed the problem,
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* this is (in good software engineering style), a regression test to go with
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* the fix.
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*
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* This is not a comprehensive test of any instruction (yet).
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*
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* Of course what is really needed is a comprehensive instruction test...
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* ------------------------------------------------------------------------- */
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#include "inst-set-test.h"
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114 |
jeremybenn |
/* ----------------------------------------------------------------------------
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* A macro to carry out a test of addition in registers
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*
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*
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* Arguments
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* set_flags: Flags to set in the SR
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* clr_flags: Flags to clear in the SR
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* opc: The opcode
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* op1: First operand value
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* op2: Second operand value
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* res: Expected result
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* str: Output string
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* cy: Expected carry flag
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* ov: Expected overflow flag
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* ------------------------------------------------------------------------- */
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#define TEST_ADD(set_flags, clr_flags, opc, op1, op2, res, str, cy, ov) \
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l.mfspr r3,r0,SPR_SR ;\
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LOAD_CONST (r2, set_flags) /* Set flags */ ;\
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l.or r3,r3,r2 ;\
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LOAD_CONST (r2, ~clr_flags) /* Clear flags */ ;\
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l.and r3,r3,r2 ;\
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l.mtspr r0,r3,SPR_SR ;\
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;\
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LOAD_CONST (r5,op1) /* Load numbers to add */ ;\
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LOAD_CONST (r6,op2) ;\
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opc r4,r5,r6 ;\
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l.mfspr r2,r0,SPR_SR /* So we can examine flags */ ;\
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PUSH (r2) ;\
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CHECK_RES (str, r4, res) ;\
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POP(r2) /* Retrieve SR */ ;\
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PUSH(r2) ;\
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- carry flag set: ", cy) ;\
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;\
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POP(r2) /* Retrieve SR */ ;\
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PUSH(r2) ;\
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LOAD_CONST (r4, SPR_SR_OV) /* The overflow bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- overflow flag set: ", ov)
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/* ----------------------------------------------------------------------------
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* A macro to carry out a test of addition with an immediate value
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*
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*
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* Arguments
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* set_flags: Flags to set in the SR
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* clr_flags: Flags to clear in the SR
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* opc: The opcode
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* op1: First operand value
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* op2: Second operand value (immediate)
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* res: Expected result
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* str: Output string
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* cy: Expected carry flag
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* ov: Expected overflow flag
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* ------------------------------------------------------------------------- */
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#define TEST_ADDI(set_flags, clr_flags, opc, op1, op2, res, str, cy, ov) \
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l.mfspr r3,r0,SPR_SR ;\
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LOAD_CONST (r2, set_flags) /* Set flags */ ;\
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l.or r3,r3,r2 ;\
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LOAD_CONST (r2, ~clr_flags) /* Clear flags */ ;\
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l.and r3,r3,r2 ;\
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l.mtspr r0,r3,SPR_SR ;\
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;\
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LOAD_CONST (r5,op1) /* Load first number to add */ ;\
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opc r4,r5,op2 ;\
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l.mfspr r2,r0,SPR_SR /* So we can examine flags */ ;\
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PUSH (r2) ;\
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CHECK_RES (str, r4, res) ;\
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POP(r2) /* Retrieve SR */ ;\
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PUSH(r2) ;\
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- carry flag set: ", cy) ;\
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;\
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POP(r2) /* Retrieve SR */ ;\
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PUSH(r2) ;\
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LOAD_CONST (r4, SPR_SR_OV) /* The overflow bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- overflow flag set: ", ov)
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112 |
jeremybenn |
.section .text
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.global _start
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_start:
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/* ----------------------------------------------------------------------------
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* Test of add signed, l.add
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* ------------------------------------------------------------------------- */
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_add:
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LOAD_STR (r3, "l.add\n")
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l.jal _puts
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l.nop
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/* Add two small positive numbers */
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114 |
jeremybenn |
TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 1, 2, 3,
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"0x00000001 + 0x00000002 = 0x00000003: ",
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FALSE, FALSE)
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/* Check carry in is ignored. */
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TEST_ADD (SPR_SR_CY, SPR_SR_OV,
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l.add, 1, 2, 3,
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"0x00000001 + 0x00000002 = 0x00000003: ",
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FALSE, FALSE)
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/* Add two small negative numbers. Sets the carry flag but not the
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overflow flag. */
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 0xffffffff, 0xfffffffe, 0xfffffffd,
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"0xffffffff + 0xfffffffe = 0xfffffffd: ",
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TRUE, FALSE)
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/* Add two quite large positive numbers. Should set neither the
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overflow nor the carry flag. */
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 0x40000000, 0x3fffffff, 0x7fffffff,
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"0x40000000 + 0x3fffffff = 0x7fffffff: ",
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FALSE, FALSE)
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/* Add two large positive numbers. Should set the overflow, but not
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the carry flag. */
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 0x40000000, 0x40000000, 0x80000000,
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"0x40000000 + 0x40000000 = 0x80000000: ",
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FALSE, TRUE)
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/* Add two quite large negative numbers. Should set the carry, but not
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the overflow flag. */
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 0xc0000000, 0xc0000000, 0x80000000,
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"0xc0000000 + 0xc0000000 = 0x80000000: ",
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TRUE, FALSE)
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/* Add two large negative numbers. Should set both the overflow and
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carry flags. */
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 0xbfffffff, 0xbfffffff, 0x7ffffffe,
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"0xbfffffff + 0xbfffffff = 0x7ffffffe: ",
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TRUE, TRUE)
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/* Check that range exceptions are triggered */
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112 |
jeremybenn |
l.mfspr r3,r0,SPR_SR
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114 |
jeremybenn |
LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
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l.or r3,r3,r2
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112 |
jeremybenn |
l.mtspr r0,r3,SPR_SR
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114 |
jeremybenn |
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LOAD_STR (r3, " ** OVE flag set **\n")
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l.jal _puts
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l.nop
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112 |
jeremybenn |
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114 |
jeremybenn |
/* Check that an overflow alone causes a RANGE Exception. */
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 0x40000000, 0x40000000, 0x80000000,
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"0x40000000 + 0x40000000 = 0x80000000: ",
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FALSE, TRUE)
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| 225 |
112 |
jeremybenn |
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| 226 |
114 |
jeremybenn |
/* Check that a carry alone does not cause a RANGE Exception. */
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 0xffffffff, 0xfffffffe, 0xfffffffd,
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"0xffffffff + 0xfffffffe = 0xfffffffd: ",
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TRUE, FALSE)
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112 |
jeremybenn |
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114 |
jeremybenn |
/* Check that carry and overflow together cause an exception. */
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.add, 0xbfffffff, 0xbfffffff, 0x7ffffffe,
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"0xbfffffff + 0xbfffffff = 0x7ffffffe: ",
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TRUE, TRUE)
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| 237 |
112 |
jeremybenn |
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| 238 |
114 |
jeremybenn |
/* Finished checking range exceptions */
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| 239 |
112 |
jeremybenn |
l.mfspr r3,r0,SPR_SR
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| 240 |
114 |
jeremybenn |
LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
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| 241 |
112 |
jeremybenn |
l.and r3,r3,r2
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| 242 |
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l.mtspr r0,r3,SPR_SR
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| 243 |
114 |
jeremybenn |
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| 244 |
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LOAD_STR (r3, " ** OVE flag cleared **\n")
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l.jal _puts
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l.nop
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| 247 |
112 |
jeremybenn |
|
| 248 |
114 |
jeremybenn |
/* ----------------------------------------------------------------------------
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| 249 |
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* Test of add signed and carry, l.addc
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| 250 |
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* ------------------------------------------------------------------------- */
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| 251 |
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_addc:
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| 252 |
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LOAD_STR (r3, "l.addc\n")
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l.jal _puts
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| 254 |
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l.nop
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| 255 |
112 |
jeremybenn |
|
| 256 |
114 |
jeremybenn |
/* Add two small positive numbers */
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| 257 |
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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l.addc, 1, 2, 3,
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| 259 |
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"0x00000001 + 0x00000002 = 0x00000003: ",
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FALSE, FALSE)
|
| 261 |
112 |
jeremybenn |
|
| 262 |
114 |
jeremybenn |
/* Add two small negative numbers. Sets the carry flag but not the
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| 263 |
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overflow flag. */
|
| 264 |
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TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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| 265 |
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l.addc, 0xffffffff, 0xfffffffe, 0xfffffffd,
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| 266 |
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"0xffffffff + 0xfffffffe = 0xfffffffd: ",
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| 267 |
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TRUE, FALSE)
|
| 268 |
112 |
jeremybenn |
|
| 269 |
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/* Add two quite large positive numbers. Should set neither the
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| 270 |
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overflow nor the carry flag. */
|
| 271 |
114 |
jeremybenn |
TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
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| 272 |
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l.addc, 0x40000000, 0x3fffffff, 0x7fffffff,
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| 273 |
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"0x40000000 + 0x3fffffff = 0x7fffffff: ",
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| 274 |
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FALSE, FALSE)
|
| 275 |
112 |
jeremybenn |
|
| 276 |
114 |
jeremybenn |
/* Add two quite large positive numbers with a carry in. Should set
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| 277 |
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the overflow but not the carry flag. */
|
| 278 |
|
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TEST_ADD (SPR_SR_CY, SPR_SR_OV,
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| 279 |
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l.addc, 0x40000000, 0x3fffffff, 0x80000000,
|
| 280 |
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"0x40000000 + 0x3fffffff + c = 0x80000000: ",
|
| 281 |
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FALSE, TRUE)
|
| 282 |
112 |
jeremybenn |
|
| 283 |
|
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/* Add two large positive numbers. Should set the overflow, but not
|
| 284 |
|
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the carry flag. */
|
| 285 |
114 |
jeremybenn |
TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
|
| 286 |
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l.addc, 0x40000000, 0x40000000, 0x80000000,
|
| 287 |
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"0x40000000 + 0x40000000 = 0x80000000: ",
|
| 288 |
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FALSE, TRUE)
|
| 289 |
112 |
jeremybenn |
|
| 290 |
114 |
jeremybenn |
/* Add the largest unsigned value to zero with a carry. This
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| 291 |
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potentially can break a simplistic test for carry that does not
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| 292 |
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consider the carry flag properly. Do it both ways around. */
|
| 293 |
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TEST_ADD (SPR_SR_CY, SPR_SR_OV,
|
| 294 |
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l.addc, 0xffffffff, 0x00000000, 0x00000000,
|
| 295 |
|
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"0xffffffff + 0x00000000 + c = 0x00000000: ",
|
| 296 |
|
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TRUE, FALSE)
|
| 297 |
112 |
jeremybenn |
|
| 298 |
114 |
jeremybenn |
TEST_ADD (SPR_SR_CY, SPR_SR_OV,
|
| 299 |
|
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l.addc, 0x00000000, 0xffffffff, 0x00000000,
|
| 300 |
|
|
"0x00000000 + 0xffffffff + c = 0x00000000: ",
|
| 301 |
|
|
TRUE, FALSE)
|
| 302 |
112 |
jeremybenn |
|
| 303 |
|
|
/* Add two quite large negative numbers. Should set the carry, but not
|
| 304 |
|
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the overflow flag. flag. */
|
| 305 |
114 |
jeremybenn |
TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
|
| 306 |
|
|
l.addc, 0xc0000000, 0xc0000000, 0x80000000,
|
| 307 |
|
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"0xc0000000 + 0xc0000000 = 0x80000000: ",
|
| 308 |
|
|
TRUE, FALSE)
|
| 309 |
|
|
|
| 310 |
|
|
/* Add two quite large negative numbers that would overflow, with a
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| 311 |
|
|
carry that just avoids the overflow. Should set the carry, but not
|
| 312 |
|
|
the overflow flag. flag. */
|
| 313 |
|
|
TEST_ADD (SPR_SR_CY, SPR_SR_OV,
|
| 314 |
|
|
l.addc, 0xc0000000, 0xbfffffff, 0x80000000,
|
| 315 |
|
|
"0xc0000000 + 0xbfffffff + c = 0x80000000: ",
|
| 316 |
|
|
TRUE, FALSE)
|
| 317 |
|
|
|
| 318 |
|
|
/* Add two large negative numbers. Should set both the overflow and
|
| 319 |
|
|
carry flags. */
|
| 320 |
|
|
TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
|
| 321 |
|
|
l.addc, 0xbfffffff, 0xbfffffff, 0x7ffffffe,
|
| 322 |
|
|
"0xbfffffff + 0xbfffffff = 0x7ffffffe: ",
|
| 323 |
|
|
TRUE, TRUE)
|
| 324 |
|
|
|
| 325 |
|
|
/* Check that range exceptions are triggered */
|
| 326 |
112 |
jeremybenn |
l.mfspr r3,r0,SPR_SR
|
| 327 |
114 |
jeremybenn |
LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
|
| 328 |
|
|
l.or r3,r3,r2
|
| 329 |
112 |
jeremybenn |
l.mtspr r0,r3,SPR_SR
|
| 330 |
114 |
jeremybenn |
|
| 331 |
|
|
LOAD_STR (r3, " ** OVE flag set **\n")
|
| 332 |
|
|
l.jal _puts
|
| 333 |
|
|
l.nop
|
| 334 |
112 |
jeremybenn |
|
| 335 |
114 |
jeremybenn |
/* Check that an overflow alone causes a RANGE Exception, even when it
|
| 336 |
|
|
is the carry that causes the overflow. */
|
| 337 |
|
|
TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
|
| 338 |
|
|
l.addc, 0x40000000, 0x40000000, 0x80000000,
|
| 339 |
|
|
"0x40000000 + 0x40000000 = 0x80000000: ",
|
| 340 |
|
|
FALSE, TRUE)
|
| 341 |
112 |
jeremybenn |
|
| 342 |
114 |
jeremybenn |
TEST_ADD (SPR_SR_CY, SPR_SR_OV,
|
| 343 |
|
|
l.addc, 0x40000000, 0x3fffffff, 0x80000000,
|
| 344 |
|
|
"0x40000000 + 0x3fffffff + c = 0x80000000: ",
|
| 345 |
|
|
FALSE, TRUE)
|
| 346 |
112 |
jeremybenn |
|
| 347 |
114 |
jeremybenn |
/* Check that a carry alone does not cause a RANGE Exception, even
|
| 348 |
|
|
when it is the carry that causes the overflow. */
|
| 349 |
|
|
TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
|
| 350 |
|
|
l.addc, 0xffffffff, 0xfffffffe, 0xfffffffd,
|
| 351 |
|
|
"0xffffffff + 0xfffffffe = 0xfffffffd: ",
|
| 352 |
|
|
TRUE, FALSE)
|
| 353 |
112 |
jeremybenn |
|
| 354 |
114 |
jeremybenn |
TEST_ADD (SPR_SR_CY, SPR_SR_OV,
|
| 355 |
|
|
l.addc, 0x00000000, 0xffffffff, 0x00000000,
|
| 356 |
|
|
"0x00000000 + 0xffffffff + c = 0x00000000: ",
|
| 357 |
|
|
TRUE, FALSE)
|
| 358 |
|
|
|
| 359 |
|
|
/* Check that carry and overflow together cause an exception. */
|
| 360 |
|
|
TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
|
| 361 |
|
|
l.addc, 0xbfffffff, 0xbfffffff, 0x7ffffffe,
|
| 362 |
|
|
"0xbfffffff + 0xbfffffff = 0x7ffffffe: ",
|
| 363 |
|
|
TRUE, TRUE)
|
| 364 |
|
|
|
| 365 |
|
|
/* Finished checking range exceptions */
|
| 366 |
112 |
jeremybenn |
l.mfspr r3,r0,SPR_SR
|
| 367 |
114 |
jeremybenn |
LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
|
| 368 |
112 |
jeremybenn |
l.and r3,r3,r2
|
| 369 |
|
|
l.mtspr r0,r3,SPR_SR
|
| 370 |
114 |
jeremybenn |
|
| 371 |
|
|
LOAD_STR (r3, " ** OVE flag cleared **\n")
|
| 372 |
|
|
l.jal _puts
|
| 373 |
|
|
l.nop
|
| 374 |
112 |
jeremybenn |
|
| 375 |
114 |
jeremybenn |
/* ----------------------------------------------------------------------------
|
| 376 |
|
|
* Test of add signed immediate, l.addi
|
| 377 |
|
|
* ------------------------------------------------------------------------- */
|
| 378 |
|
|
_addi:
|
| 379 |
|
|
LOAD_STR (r3, "l.addi\n")
|
| 380 |
|
|
l.jal _puts
|
| 381 |
|
|
l.nop
|
| 382 |
112 |
jeremybenn |
|
| 383 |
114 |
jeremybenn |
/* Add two small positive numbers */
|
| 384 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 385 |
|
|
l.addi, 1, 2, 3,
|
| 386 |
|
|
"0x00000001 + 0x00000002 = 0x00000003: ",
|
| 387 |
|
|
FALSE, FALSE)
|
| 388 |
112 |
jeremybenn |
|
| 389 |
114 |
jeremybenn |
/* Check carry in is ignored. */
|
| 390 |
|
|
TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
|
| 391 |
|
|
l.addi, 1, 2, 3,
|
| 392 |
|
|
"0x00000001 + 0x00000002 = 0x00000003: ",
|
| 393 |
|
|
FALSE, FALSE)
|
| 394 |
112 |
jeremybenn |
|
| 395 |
114 |
jeremybenn |
/* Add two small negative numbers. Sets the carry flag but not the
|
| 396 |
|
|
overflow flag. */
|
| 397 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 398 |
|
|
l.addi, 0xffffffff, 0xfffe, 0xfffffffd,
|
| 399 |
|
|
"0xffffffff + 0xfffffffe = 0xfffffffd: ",
|
| 400 |
|
|
TRUE, FALSE)
|
| 401 |
|
|
|
| 402 |
|
|
/* Add two quite large positive numbers. Should set neither the
|
| 403 |
|
|
overflow nor the carry flag. */
|
| 404 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 405 |
|
|
l.addi, 0x7fff8000, 0x7fff, 0x7fffffff,
|
| 406 |
|
|
"0x7fff8000 + 0x00007fff = 0x7fffffff: ",
|
| 407 |
|
|
FALSE, FALSE)
|
| 408 |
|
|
|
| 409 |
|
|
/* Add two large positive numbers. Should set the overflow, but not
|
| 410 |
|
|
the carry flag. */
|
| 411 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 412 |
|
|
l.addi, 0x7fffc000, 0x4000, 0x80000000,
|
| 413 |
|
|
"0x7fffc000 + 0x00004000 = 0x80000000: ",
|
| 414 |
|
|
FALSE, TRUE)
|
| 415 |
|
|
|
| 416 |
|
|
/* Add two quite large negative numbers. Should set the carry, but not
|
| 417 |
|
|
the overflow flag. */
|
| 418 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 419 |
|
|
l.addi, 0x80008000, 0x8000, 0x80000000,
|
| 420 |
|
|
"0x80008000 + 0xffff8000 = 0x80000000: ",
|
| 421 |
|
|
TRUE, FALSE)
|
| 422 |
|
|
|
| 423 |
|
|
/* Add two large negative numbers. Should set both the overflow and
|
| 424 |
|
|
carry flags. */
|
| 425 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 426 |
|
|
l.addi, 0x80007fff, 0x8000, 0x7fffffff,
|
| 427 |
|
|
"0x80007fff + 0xffff8000 = 0x7fffffff: ",
|
| 428 |
|
|
TRUE, TRUE)
|
| 429 |
|
|
|
| 430 |
112 |
jeremybenn |
/* Check that range exceptions are triggered */
|
| 431 |
114 |
jeremybenn |
l.mfspr r3,r0,SPR_SR
|
| 432 |
112 |
jeremybenn |
LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
|
| 433 |
|
|
l.or r3,r3,r2
|
| 434 |
|
|
l.mtspr r0,r3,SPR_SR
|
| 435 |
|
|
|
| 436 |
114 |
jeremybenn |
LOAD_STR (r3, " ** OVE flag set **\n")
|
| 437 |
112 |
jeremybenn |
l.jal _puts
|
| 438 |
|
|
l.nop
|
| 439 |
|
|
|
| 440 |
|
|
/* Check that an overflow alone causes a RANGE Exception. */
|
| 441 |
114 |
jeremybenn |
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 442 |
|
|
l.addi, 0x7fffc000, 0x4000, 0x80000000,
|
| 443 |
|
|
"0x7fffc000 + 0x00004000 = 0x80000000: ",
|
| 444 |
|
|
FALSE, TRUE)
|
| 445 |
|
|
|
| 446 |
|
|
/* Check that a carry alone does not cause a RANGE Exception. */
|
| 447 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 448 |
|
|
l.addi, 0xffffffff, 0xfffe, 0xfffffffd,
|
| 449 |
|
|
"0xffffffff + 0xfffffffe = 0xfffffffd: ",
|
| 450 |
|
|
TRUE, FALSE)
|
| 451 |
|
|
|
| 452 |
|
|
/* Check that carry and overflow together cause an exception. */
|
| 453 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 454 |
|
|
l.addi, 0x80007fff, 0x8000, 0x7fffffff,
|
| 455 |
|
|
"0x80007fff + 0xffff8000 = 0x7ffffffe: ",
|
| 456 |
|
|
TRUE, TRUE)
|
| 457 |
|
|
|
| 458 |
|
|
/* Finished checking range exceptions */
|
| 459 |
112 |
jeremybenn |
l.mfspr r3,r0,SPR_SR
|
| 460 |
114 |
jeremybenn |
LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
|
| 461 |
112 |
jeremybenn |
l.and r3,r3,r2
|
| 462 |
|
|
l.mtspr r0,r3,SPR_SR
|
| 463 |
114 |
jeremybenn |
|
| 464 |
|
|
LOAD_STR (r3, " ** OVE flag cleared **\n")
|
| 465 |
|
|
l.jal _puts
|
| 466 |
|
|
l.nop
|
| 467 |
112 |
jeremybenn |
|
| 468 |
114 |
jeremybenn |
/* ----------------------------------------------------------------------------
|
| 469 |
|
|
* Test of add signed and carry, l.addic
|
| 470 |
|
|
* ------------------------------------------------------------------------- */
|
| 471 |
|
|
_addic:
|
| 472 |
|
|
LOAD_STR (r3, "l.addic\n")
|
| 473 |
|
|
l.jal _puts
|
| 474 |
|
|
l.nop
|
| 475 |
112 |
jeremybenn |
|
| 476 |
114 |
jeremybenn |
/* Add two small positive numbers */
|
| 477 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 478 |
|
|
l.addic, 1, 2, 3,
|
| 479 |
|
|
"0x00000001 + 0x00000002 = 0x00000003: ",
|
| 480 |
|
|
FALSE, FALSE)
|
| 481 |
112 |
jeremybenn |
|
| 482 |
114 |
jeremybenn |
/* Add two small negative numbers. Sets the carry flag but not the
|
| 483 |
|
|
overflow flag. */
|
| 484 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 485 |
|
|
l.addic, 0xffffffff, 0xfffe, 0xfffffffd,
|
| 486 |
|
|
"0xffffffff + 0xfffffffe = 0xfffffffd: ",
|
| 487 |
|
|
TRUE, FALSE)
|
| 488 |
112 |
jeremybenn |
|
| 489 |
114 |
jeremybenn |
/* Add two quite large positive numbers. Should set neither the
|
| 490 |
|
|
overflow nor the carry flag. */
|
| 491 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 492 |
|
|
l.addic, 0x7fff8000, 0x7fff, 0x7fffffff,
|
| 493 |
|
|
"0x7fff8000 + 0x00007fff = 0x7fffffff: ",
|
| 494 |
|
|
FALSE, FALSE)
|
| 495 |
112 |
jeremybenn |
|
| 496 |
114 |
jeremybenn |
/* Add two quite large positive numbers with a carry in. Should set
|
| 497 |
|
|
the overflow but not the carry flag. */
|
| 498 |
|
|
TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
|
| 499 |
|
|
l.addic, 0x7fff8000, 0x7fff, 0x80000000,
|
| 500 |
|
|
"0x7fff8000 + 0x00007fff + c = 0x80000000: ",
|
| 501 |
|
|
FALSE, TRUE)
|
| 502 |
112 |
jeremybenn |
|
| 503 |
114 |
jeremybenn |
/* Add two large positive numbers. Should set the overflow, but not
|
| 504 |
|
|
the carry flag. */
|
| 505 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 506 |
|
|
l.addic, 0x7fffc000, 0x4000, 0x80000000,
|
| 507 |
|
|
"0x7fffc000 + 0x00004000 = 0x80000000: ",
|
| 508 |
|
|
FALSE, TRUE)
|
| 509 |
112 |
jeremybenn |
|
| 510 |
114 |
jeremybenn |
/* Add the largest unsigned value to zero with a carry. This
|
| 511 |
|
|
potentially can break a simplistic test for carry that does not
|
| 512 |
|
|
consider the carry flag properly. Do it both ways around. */
|
| 513 |
|
|
TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
|
| 514 |
|
|
l.addic, 0xffffffff, 0x0000, 0x00000000,
|
| 515 |
|
|
"0xffffffff + 0x00000000 + c = 0x00000000: ",
|
| 516 |
|
|
TRUE, FALSE)
|
| 517 |
112 |
jeremybenn |
|
| 518 |
114 |
jeremybenn |
TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
|
| 519 |
|
|
l.addic, 0x00000000, 0xffff, 0x00000000,
|
| 520 |
|
|
"0x00000000 + 0xffffffff + c = 0x00000000: ",
|
| 521 |
|
|
TRUE, FALSE)
|
| 522 |
|
|
|
| 523 |
|
|
/* Add two quite large negative numbers. Should set the carry, but not
|
| 524 |
|
|
the overflow flag. flag. */
|
| 525 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 526 |
|
|
l.addic, 0x80008000, 0x8000, 0x80000000,
|
| 527 |
|
|
"0x80008000 + 0xffff8000 = 0x80000000: ",
|
| 528 |
|
|
TRUE, FALSE)
|
| 529 |
|
|
|
| 530 |
|
|
/* Add two quite large negative numbers that would overflow, with a
|
| 531 |
|
|
carry that just avoids the overflow. Should set the carry, but not
|
| 532 |
|
|
the overflow flag. flag. */
|
| 533 |
|
|
TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
|
| 534 |
|
|
l.addic, 0x80007fff, 0x8000, 0x80000000,
|
| 535 |
|
|
"0x80007fff + 0xffff8000 + c = 0x80000000: ",
|
| 536 |
|
|
TRUE, FALSE)
|
| 537 |
|
|
|
| 538 |
|
|
/* Add two large negative numbers. Should set both the overflow and
|
| 539 |
|
|
carry flags. */
|
| 540 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 541 |
|
|
l.addic, 0x80007fff, 0x8000, 0x7fffffff,
|
| 542 |
|
|
"0x80007fff + 0xffff8000 = 0x7fffffff: ",
|
| 543 |
|
|
TRUE, TRUE)
|
| 544 |
|
|
|
| 545 |
|
|
/* Check that range exceptions are triggered */
|
| 546 |
112 |
jeremybenn |
l.mfspr r3,r0,SPR_SR
|
| 547 |
114 |
jeremybenn |
LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
|
| 548 |
|
|
l.or r3,r3,r2
|
| 549 |
112 |
jeremybenn |
l.mtspr r0,r3,SPR_SR
|
| 550 |
114 |
jeremybenn |
|
| 551 |
|
|
LOAD_STR (r3, " ** OVE flag set **\n")
|
| 552 |
|
|
l.jal _puts
|
| 553 |
|
|
l.nop
|
| 554 |
112 |
jeremybenn |
|
| 555 |
114 |
jeremybenn |
/* Check that an overflow alone causes a RANGE Exception, even when it
|
| 556 |
|
|
is the carry that causes the overflow. */
|
| 557 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 558 |
|
|
l.addic, 0x7fffc000, 0x4000, 0x80000000,
|
| 559 |
|
|
"0x7fffc000 + 0x00004000 = 0x80000000: ",
|
| 560 |
|
|
FALSE, TRUE)
|
| 561 |
112 |
jeremybenn |
|
| 562 |
114 |
jeremybenn |
TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
|
| 563 |
|
|
l.addic, 0x7fffc000, 0x3fff, 0x80000000,
|
| 564 |
|
|
"0x7fffc000 + 0x00003fff + c = 0x80000000: ",
|
| 565 |
|
|
FALSE, TRUE)
|
| 566 |
112 |
jeremybenn |
|
| 567 |
114 |
jeremybenn |
/* Check that a carry alone does not cause a RANGE Exception, even
|
| 568 |
|
|
when it is the carry that causes the overflow. */
|
| 569 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 570 |
|
|
l.addic, 0xffffffff, 0xfffe, 0xfffffffd,
|
| 571 |
|
|
"0xffffffff + 0xfffffffe = 0xfffffffd: ",
|
| 572 |
|
|
TRUE, FALSE)
|
| 573 |
112 |
jeremybenn |
|
| 574 |
114 |
jeremybenn |
TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
|
| 575 |
|
|
l.addic, 0x00000000, 0xffff, 0x00000000,
|
| 576 |
|
|
"0x00000000 + 0xffffffff + c = 0x00000000: ",
|
| 577 |
|
|
TRUE, FALSE)
|
| 578 |
|
|
|
| 579 |
|
|
/* Check that carry and overflow together cause an exception. */
|
| 580 |
|
|
TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
|
| 581 |
|
|
l.addic, 0x80007fff, 0x8000, 0x7fffffff,
|
| 582 |
|
|
"0x80007fff + 0xffff8000 = 0x7ffffffe: ",
|
| 583 |
|
|
TRUE, TRUE)
|
| 584 |
|
|
|
| 585 |
112 |
jeremybenn |
/* Finished checking range exceptions */
|
| 586 |
114 |
jeremybenn |
l.mfspr r3,r0,SPR_SR
|
| 587 |
112 |
jeremybenn |
LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
|
| 588 |
|
|
l.and r3,r3,r2
|
| 589 |
|
|
l.mtspr r0,r3,SPR_SR
|
| 590 |
|
|
|
| 591 |
114 |
jeremybenn |
LOAD_STR (r3, " ** OVE flag cleared **\n")
|
| 592 |
112 |
jeremybenn |
l.jal _puts
|
| 593 |
|
|
l.nop
|
| 594 |
|
|
|
| 595 |
|
|
/* ----------------------------------------------------------------------------
|
| 596 |
|
|
* All done
|
| 597 |
|
|
* ------------------------------------------------------------------------- */
|
| 598 |
|
|
_exit:
|
| 599 |
|
|
LOAD_STR (r3, "Test completed\n")
|
| 600 |
|
|
l.jal _puts
|
| 601 |
|
|
l.nop
|
| 602 |
|
|
|
| 603 |
|
|
TEST_EXIT
|
