OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [inst-set-test/] [is-add-test.S] - Blame information for rev 524

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 112 jeremybenn
/* is-add-test.S. l.add, l.addc, l.addi and l.addic instruction test of Or1ksim
2
 *
3
 * Copyright (C) 1999-2006 OpenCores
4
 * Copyright (C) 2010 Embecosm Limited
5
 *
6
 * Contributors various OpenCores participants
7
 * Contributor Jeremy Bennett 
8
 *
9
 * This file is part of OpenRISC 1000 Architectural Simulator.
10
 *
11
 * This program is free software; you can redistribute it and/or modify it
12
 * under the terms of the GNU General Public License as published by the Free
13
 * Software Foundation; either version 3 of the License, or (at your option)
14
 * any later version.
15
 *
16
 * This program is distributed in the hope that it will be useful, but WITHOUT
17
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19
 * more details.
20
 *
21
 * You should have received a copy of the GNU General Public License along
22
 * with this program.  If not, see .
23
 */
24
 
25
/* ----------------------------------------------------------------------------
26 116 jeremybenn
 * Coding conventions are described in inst-set-test.S
27 112 jeremybenn
 * ------------------------------------------------------------------------- */
28
 
29
/* ----------------------------------------------------------------------------
30
 * Test coverage
31
 *
32
 * The l.add, l.addc, l.addi and l.addic instructions should set the carry and
33
 * overflow flags.
34
 *
35
 * In addition the l.addc and l.addic instructions should add in the carry
36
 * bit.
37
 *
38 115 jeremybenn
 * Problems in this area were reported in Bugs 1771 and 1776. Having fixed the
39
 * problem, this is (in good software engineering style), a  regression test
40
 * to go with the fix.
41 112 jeremybenn
 *
42
 * This is not a comprehensive test of any instruction (yet).
43
 *
44
 * Of course what is really needed is a comprehensive instruction test...
45
 * ------------------------------------------------------------------------- */
46
 
47
 
48
#include "inst-set-test.h"
49
 
50 114 jeremybenn
/* ----------------------------------------------------------------------------
51
 * A macro to carry out a test of addition in registers
52
 *
53
 *
54
 * Arguments
55
 *   set_flags: Flags to set in the SR
56
 *   clr_flags: Flags to clear in the SR
57
 *   opc:       The opcode
58
 *   op1:       First operand value
59
 *   op2:       Second operand value
60
 *   res:       Expected result
61
 *   cy:        Expected carry flag
62
 *   ov:        Expected overflow flag
63
 * ------------------------------------------------------------------------- */
64 118 jeremybenn
#define TEST_ADD(set_flags, clr_flags, opc, op1, op2, res, cy, ov)       \
65 114 jeremybenn
        l.mfspr r3,r0,SPR_SR                                            ;\
66
        LOAD_CONST (r2, set_flags)      /* Set flags */                 ;\
67
        l.or    r3,r3,r2                                                ;\
68
        LOAD_CONST (r2, ~clr_flags)     /* Clear flags */               ;\
69
        l.and   r3,r3,r2                                                ;\
70
        l.mtspr r0,r3,SPR_SR                                            ;\
71
                                                                        ;\
72
        LOAD_CONST (r5,op1)             /* Load numbers to add */       ;\
73
        LOAD_CONST (r6,op2)                                             ;\
74 118 jeremybenn
        l.mtspr r0,r0,SPR_EPCR_BASE     /* Clear record */              ;\
75
50:     opc     r4,r5,r6                                                ;\
76 114 jeremybenn
        l.mfspr r2,r0,SPR_SR            /* So we can examine flags */   ;\
77 118 jeremybenn
        l.mfspr r5,r0,SPR_EPCR_BASE     /* What triggered exception */  ;\
78
        PUSH (r5)                       /* Save EPCR for later */       ;\
79 114 jeremybenn
        PUSH (r2)                                                       ;\
80 118 jeremybenn
        PUSH (r4)                       /* Save result for later */     ;\
81
                                                                        ;\
82
        PUTS ("  0x")                                                   ;\
83
        PUTH (op1)                                                      ;\
84
        PUTS (" + 0x")                                                  ;\
85
        PUTH (op2)                                                      ;\
86
                                                                        ;\
87
        LOAD_CONST (r2, set_flags)      /* Are we adding in carry */    ;\
88
        LOAD_CONST (r4, SPR_SR_CY)                                      ;\
89
        l.and   r2,r2,r4                                                ;\
90
        l.sfeq  r2,r4                                                   ;\
91
        l.bnf   51f                                                     ;\
92
        l.nop                                                           ;\
93
                                                                        ;\
94
        PUTS (" + c")                   /* CY set to add in? */         ;\
95
        l.j     52f                                                     ;\
96
        l.nop                                                           ;\
97
                                                                        ;\
98
51:     PUTS ("    ")                   /* CY clear to add in? */       ;\
99
                                                                        ;\
100
52:     PUTS (" = 0x")                                                  ;\
101
        PUTH (res)                                                      ;\
102
        PUTS (": ")                                                     ;\
103
        POP (r4)                                                        ;\
104
        CHECK_RES1 (r4, res)                                            ;\
105
                                                                        ;\
106 114 jeremybenn
        POP(r2)                         /* Retrieve SR */               ;\
107
        PUSH(r2)                                                        ;\
108
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */             ;\
109
        l.and   r2,r2,r4                                                ;\
110
        l.sfeq  r2,r4                                                   ;\
111 118 jeremybenn
        CHECK_FLAG ("- carry flag set:      ", cy)                      ;\
112 114 jeremybenn
                                                                        ;\
113
        POP(r2)                         /* Retrieve SR */               ;\
114
        LOAD_CONST (r4, SPR_SR_OV)      /* The overflow bit */          ;\
115
        l.and   r2,r2,r4                                                ;\
116
        l.sfeq  r2,r4                                                   ;\
117 118 jeremybenn
        CHECK_FLAG ("- overflow flag set:   ", ov)                      ;\
118
                                                                        ;\
119
        POP (r2)                        /* Retrieve EPCR */             ;\
120
        LOAD_CONST (r4, 50b)            /* The opcode of interest */    ;\
121
        l.and   r2,r2,r4                                                ;\
122
        l.sfeq  r2,r4                                                   ;\
123
        l.bnf   53f                                                     ;\
124
                                                                        ;\
125
        PUTS ("  - exception triggered: TRUE\n")                        ;\
126
        l.j     54f                                                     ;\
127
        l.nop                                                           ;\
128
                                                                        ;\
129
53:     PUTS ("  - exception triggered: FALSE\n")                       ;\
130
54:
131 114 jeremybenn
 
132
/* ----------------------------------------------------------------------------
133
 * A macro to carry out a test of addition with an immediate value
134
 *
135
 *
136
 * Arguments
137
 *   set_flags: Flags to set in the SR
138
 *   clr_flags: Flags to clear in the SR
139
 *   opc:       The opcode
140
 *   op1:       First operand value
141
 *   op2:       Second operand value (immediate)
142
 *   res:       Expected result
143
 *   cy:        Expected carry flag
144
 *   ov:        Expected overflow flag
145
 * ------------------------------------------------------------------------- */
146 118 jeremybenn
#define TEST_ADDI(set_flags, clr_flags, opc, op1, op2, res, cy, ov)      \
147 114 jeremybenn
        l.mfspr r3,r0,SPR_SR                                            ;\
148
        LOAD_CONST (r2, set_flags)      /* Set flags */                 ;\
149
        l.or    r3,r3,r2                                                ;\
150
        LOAD_CONST (r2, ~clr_flags)     /* Clear flags */               ;\
151
        l.and   r3,r3,r2                                                ;\
152
        l.mtspr r0,r3,SPR_SR                                            ;\
153
                                                                        ;\
154 118 jeremybenn
        LOAD_CONST (r5,op1)             /* Load numbers to add */       ;\
155
        l.mtspr r0,r0,SPR_EPCR_BASE     /* Clear record */              ;\
156
55:     opc     r4,r5,op2                                               ;\
157 114 jeremybenn
        l.mfspr r2,r0,SPR_SR            /* So we can examine flags */   ;\
158 118 jeremybenn
        l.mfspr r5,r0,SPR_EPCR_BASE     /* What triggered exception */  ;\
159
        PUSH (r5)                       /* Save EPCR for later */       ;\
160 114 jeremybenn
        PUSH (r2)                                                       ;\
161 118 jeremybenn
        PUSH (r4)                       /* Save result for later */     ;\
162
                                                                        ;\
163
        PUTS ("  0x")                                                   ;\
164
        PUTH (op1)                                                      ;\
165
        PUTS (" + 0x")                                                  ;\
166
        PUTH (op2)                                                      ;\
167
                                                                        ;\
168
        LOAD_CONST (r2, set_flags)      /* Are we adding in carry */    ;\
169
        LOAD_CONST (r4, SPR_SR_CY)                                      ;\
170
        l.and   r2,r2,r4                                                ;\
171
        l.sfeq  r2,r4                                                   ;\
172
        l.bnf   56f                                                     ;\
173
        l.nop                                                           ;\
174
                                                                        ;\
175
        PUTS (" + c")                   /* CY set to add in? */         ;\
176
        l.j     57f                                                     ;\
177
        l.nop                                                           ;\
178
                                                                        ;\
179
56:     PUTS ("    ")                   /* CY clear to add in? */       ;\
180
                                                                        ;\
181
57:     PUTS (" = 0x")                                                  ;\
182
        PUTH (res)                                                      ;\
183
        PUTS (": ")                                                     ;\
184
        POP (r4)                                                        ;\
185
        CHECK_RES1 (r4, res)                                            ;\
186
                                                                        ;\
187 114 jeremybenn
        POP(r2)                         /* Retrieve SR */               ;\
188
        PUSH(r2)                                                        ;\
189
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */             ;\
190
        l.and   r2,r2,r4                                                ;\
191
        l.sfeq  r2,r4                                                   ;\
192 118 jeremybenn
        CHECK_FLAG ("- carry flag set:      ", cy)                      ;\
193 114 jeremybenn
                                                                        ;\
194
        POP(r2)                         /* Retrieve SR */               ;\
195
        LOAD_CONST (r4, SPR_SR_OV)      /* The overflow bit */          ;\
196
        l.and   r2,r2,r4                                                ;\
197
        l.sfeq  r2,r4                                                   ;\
198 118 jeremybenn
        CHECK_FLAG ("- overflow flag set:   ", ov)                      ;\
199
                                                                        ;\
200
        POP (r2)                        /* Retrieve EPCR */             ;\
201
        LOAD_CONST (r4, 55b)            /* The opcode of interest */    ;\
202
        l.and   r2,r2,r4                                                ;\
203
        l.sfeq  r2,r4                                                   ;\
204
        l.bnf   58f                                                     ;\
205
                                                                        ;\
206
        PUTS ("  - exception triggered: TRUE\n")                        ;\
207
        l.j     59f                                                     ;\
208
        l.nop                                                           ;\
209
                                                                        ;\
210
58:     PUTS ("  - exception triggered: FALSE\n")                       ;\
211
59:
212 114 jeremybenn
 
213
 
214 118 jeremybenn
/* ----------------------------------------------------------------------------
215
 * Start of code
216
 * ------------------------------------------------------------------------- */
217 112 jeremybenn
        .section .text
218
        .global _start
219
_start:
220 118 jeremybenn
        l.mfspr r3,r0,SPR_SR
221
        LOAD_CONST (r2, ~SPR_SR_OVE)    /* Clear OVE */
222
        l.and   r3,r3,r2
223
        l.mtspr r0,r3,SPR_SR
224
 
225
        LOAD_STR (r3, "  ** OVE flag cleared **\n")
226
        l.jal   _puts
227
        l.nop
228 112 jeremybenn
 
229
/* ----------------------------------------------------------------------------
230
 * Test of add signed, l.add
231
 * ------------------------------------------------------------------------- */
232
_add:
233
        LOAD_STR (r3, "l.add\n")
234
        l.jal   _puts
235
        l.nop
236
 
237
        /* Add two small positive numbers */
238 114 jeremybenn
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
239
                  l.add, 1, 2, 3,
240
                  FALSE, FALSE)
241
 
242
        /* Check carry in is ignored. */
243
        TEST_ADD (SPR_SR_CY, SPR_SR_OV,
244
                  l.add, 1, 2, 3,
245
                  FALSE, FALSE)
246
 
247
        /* Add two small negative numbers. Sets the carry flag but not the
248
           overflow flag. */
249
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
250
                  l.add, 0xffffffff, 0xfffffffe, 0xfffffffd,
251
                  TRUE, FALSE)
252
 
253
        /* Add two quite large positive numbers. Should set neither the
254
           overflow nor the carry flag. */
255
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
256
                  l.add, 0x40000000, 0x3fffffff, 0x7fffffff,
257
                  FALSE, FALSE)
258
 
259
        /* Add two large positive numbers. Should set the overflow, but not
260
           the carry flag. */
261
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
262
                  l.add, 0x40000000, 0x40000000, 0x80000000,
263
                  FALSE, TRUE)
264
 
265
        /* Add two quite large negative numbers. Should set the carry, but not
266
           the overflow flag. */
267
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
268
                  l.add, 0xc0000000, 0xc0000000, 0x80000000,
269
                  TRUE, FALSE)
270
 
271
        /* Add two large negative numbers. Should set both the overflow and
272
           carry flags. */
273
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
274
                  l.add, 0xbfffffff, 0xbfffffff, 0x7ffffffe,
275
                  TRUE, TRUE)
276
 
277
        /* Check that range exceptions are triggered */
278 112 jeremybenn
        l.mfspr r3,r0,SPR_SR
279 114 jeremybenn
        LOAD_CONST (r2, SPR_SR_OVE)     /* Set OVE */
280
        l.or    r3,r3,r2
281 112 jeremybenn
        l.mtspr r0,r3,SPR_SR
282 114 jeremybenn
 
283
        LOAD_STR (r3, "  ** OVE flag set **\n")
284
        l.jal   _puts
285
        l.nop
286 112 jeremybenn
 
287 114 jeremybenn
        /* Check that an overflow alone causes a RANGE Exception. */
288
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
289
                  l.add, 0x40000000, 0x40000000, 0x80000000,
290
                  FALSE, TRUE)
291 112 jeremybenn
 
292 114 jeremybenn
        /* Check that a carry alone does not cause a RANGE Exception. */
293
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
294
                  l.add, 0xffffffff, 0xfffffffe, 0xfffffffd,
295
                  TRUE, FALSE)
296 112 jeremybenn
 
297 114 jeremybenn
        /* Check that carry and overflow together cause an exception. */
298
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
299
                  l.add, 0xbfffffff, 0xbfffffff, 0x7ffffffe,
300
                  TRUE, TRUE)
301 112 jeremybenn
 
302 114 jeremybenn
        /* Finished checking range exceptions */
303 112 jeremybenn
        l.mfspr r3,r0,SPR_SR
304 114 jeremybenn
        LOAD_CONST (r2, ~SPR_SR_OVE)    /* Clear OVE */
305 112 jeremybenn
        l.and   r3,r3,r2
306
        l.mtspr r0,r3,SPR_SR
307 114 jeremybenn
 
308
        LOAD_STR (r3, "  ** OVE flag cleared **\n")
309
        l.jal   _puts
310
        l.nop
311 112 jeremybenn
 
312 114 jeremybenn
/* ----------------------------------------------------------------------------
313
 * Test of add signed and carry, l.addc
314
 * ------------------------------------------------------------------------- */
315
_addc:
316
        LOAD_STR (r3, "l.addc\n")
317
        l.jal   _puts
318
        l.nop
319 112 jeremybenn
 
320 114 jeremybenn
        /* Add two small positive numbers */
321
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
322
                  l.addc, 1, 2, 3,
323
                  FALSE, FALSE)
324 112 jeremybenn
 
325 114 jeremybenn
        /* Add two small negative numbers. Sets the carry flag but not the
326
           overflow flag. */
327
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
328
                  l.addc, 0xffffffff, 0xfffffffe, 0xfffffffd,
329
                  TRUE, FALSE)
330 112 jeremybenn
 
331
        /* Add two quite large positive numbers. Should set neither the
332
           overflow nor the carry flag. */
333 114 jeremybenn
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
334
                  l.addc, 0x40000000, 0x3fffffff, 0x7fffffff,
335
                  FALSE, FALSE)
336 112 jeremybenn
 
337 114 jeremybenn
        /* Add two quite large positive numbers with a carry in. Should set
338
           the overflow but not the carry flag. */
339
        TEST_ADD (SPR_SR_CY, SPR_SR_OV,
340
                  l.addc, 0x40000000, 0x3fffffff, 0x80000000,
341
                  FALSE, TRUE)
342 112 jeremybenn
 
343
        /* Add two large positive numbers. Should set the overflow, but not
344
           the carry flag. */
345 114 jeremybenn
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
346
                  l.addc, 0x40000000, 0x40000000, 0x80000000,
347
                  FALSE, TRUE)
348 112 jeremybenn
 
349 114 jeremybenn
        /* Add the largest unsigned value to zero with a carry. This
350
           potentially can break a simplistic test for carry that does not
351
           consider the carry flag properly. Do it both ways around. */
352
        TEST_ADD (SPR_SR_CY, SPR_SR_OV,
353
                  l.addc, 0xffffffff, 0x00000000, 0x00000000,
354
                  TRUE, FALSE)
355 112 jeremybenn
 
356 114 jeremybenn
        TEST_ADD (SPR_SR_CY, SPR_SR_OV,
357
                  l.addc, 0x00000000, 0xffffffff, 0x00000000,
358
                  TRUE, FALSE)
359 112 jeremybenn
 
360
        /* Add two quite large negative numbers. Should set the carry, but not
361
           the overflow flag. flag. */
362 114 jeremybenn
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
363
                  l.addc, 0xc0000000, 0xc0000000, 0x80000000,
364
                  TRUE, FALSE)
365
 
366
        /* Add two quite large negative numbers that would overflow, with a
367
           carry that just avoids the overflow. Should set the carry, but not
368
           the overflow flag. flag. */
369
        TEST_ADD (SPR_SR_CY, SPR_SR_OV,
370
                  l.addc, 0xc0000000, 0xbfffffff, 0x80000000,
371
                  TRUE, FALSE)
372
 
373
        /* Add two large negative numbers. Should set both the overflow and
374
           carry flags. */
375
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
376
                  l.addc, 0xbfffffff, 0xbfffffff, 0x7ffffffe,
377
                  TRUE, TRUE)
378
 
379
        /* Check that range exceptions are triggered */
380 112 jeremybenn
        l.mfspr r3,r0,SPR_SR
381 114 jeremybenn
        LOAD_CONST (r2, SPR_SR_OVE)     /* Set OVE */
382
        l.or    r3,r3,r2
383 112 jeremybenn
        l.mtspr r0,r3,SPR_SR
384 114 jeremybenn
 
385
        LOAD_STR (r3, "  ** OVE flag set **\n")
386
        l.jal   _puts
387
        l.nop
388 112 jeremybenn
 
389 114 jeremybenn
        /* Check that an overflow alone causes a RANGE Exception, even when it
390
           is the carry that causes the overflow. */
391
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
392
                  l.addc, 0x40000000, 0x40000000, 0x80000000,
393
                  FALSE, TRUE)
394 112 jeremybenn
 
395 114 jeremybenn
        TEST_ADD (SPR_SR_CY, SPR_SR_OV,
396
                  l.addc, 0x40000000, 0x3fffffff, 0x80000000,
397
                  FALSE, TRUE)
398 112 jeremybenn
 
399 114 jeremybenn
        /* Check that a carry alone does not cause a RANGE Exception, even
400
           when it is the carry that causes the overflow. */
401
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
402
                  l.addc, 0xffffffff, 0xfffffffe, 0xfffffffd,
403
                  TRUE, FALSE)
404 112 jeremybenn
 
405 114 jeremybenn
        TEST_ADD (SPR_SR_CY, SPR_SR_OV,
406
                  l.addc, 0x00000000, 0xffffffff, 0x00000000,
407
                  TRUE, FALSE)
408
 
409
        /* Check that carry and overflow together cause an exception. */
410
        TEST_ADD (0, SPR_SR_CY | SPR_SR_OV,
411
                  l.addc, 0xbfffffff, 0xbfffffff, 0x7ffffffe,
412
                  TRUE, TRUE)
413
 
414
        /* Finished checking range exceptions */
415 112 jeremybenn
        l.mfspr r3,r0,SPR_SR
416 114 jeremybenn
        LOAD_CONST (r2, ~SPR_SR_OVE)    /* Clear OVE */
417 112 jeremybenn
        l.and   r3,r3,r2
418
        l.mtspr r0,r3,SPR_SR
419 114 jeremybenn
 
420
        LOAD_STR (r3, "  ** OVE flag cleared **\n")
421
        l.jal   _puts
422
        l.nop
423 112 jeremybenn
 
424 114 jeremybenn
/* ----------------------------------------------------------------------------
425
 * Test of add signed immediate, l.addi
426
 * ------------------------------------------------------------------------- */
427
_addi:
428
        LOAD_STR (r3, "l.addi\n")
429
        l.jal   _puts
430
        l.nop
431 112 jeremybenn
 
432 114 jeremybenn
        /* Add two small positive numbers */
433
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
434
                   l.addi, 1, 2, 3,
435
                   FALSE, FALSE)
436 112 jeremybenn
 
437 114 jeremybenn
        /* Check carry in is ignored. */
438
        TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
439
                   l.addi, 1, 2, 3,
440
                   FALSE, FALSE)
441 112 jeremybenn
 
442 114 jeremybenn
        /* Add two small negative numbers. Sets the carry flag but not the
443
           overflow flag. */
444
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
445
                   l.addi, 0xffffffff, 0xfffe, 0xfffffffd,
446
                   TRUE, FALSE)
447
 
448
        /* Add two quite large positive numbers. Should set neither the
449
           overflow nor the carry flag. */
450
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
451
                   l.addi, 0x7fff8000, 0x7fff, 0x7fffffff,
452
                   FALSE, FALSE)
453
 
454
        /* Add two large positive numbers. Should set the overflow, but not
455
           the carry flag. */
456
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
457
                   l.addi, 0x7fffc000, 0x4000, 0x80000000,
458
                   FALSE, TRUE)
459
 
460
        /* Add two quite large negative numbers. Should set the carry, but not
461
           the overflow flag. */
462
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
463
                   l.addi, 0x80008000, 0x8000, 0x80000000,
464
                   TRUE, FALSE)
465
 
466
        /* Add two large negative numbers. Should set both the overflow and
467
           carry flags. */
468
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
469
                   l.addi, 0x80007fff, 0x8000, 0x7fffffff,
470
                   TRUE, TRUE)
471
 
472 112 jeremybenn
        /* Check that range exceptions are triggered */
473 114 jeremybenn
        l.mfspr r3,r0,SPR_SR
474 112 jeremybenn
        LOAD_CONST (r2, SPR_SR_OVE)     /* Set OVE */
475
        l.or    r3,r3,r2
476
        l.mtspr r0,r3,SPR_SR
477
 
478 114 jeremybenn
        LOAD_STR (r3, "  ** OVE flag set **\n")
479 112 jeremybenn
        l.jal   _puts
480
        l.nop
481
 
482
        /* Check that an overflow alone causes a RANGE Exception. */
483 114 jeremybenn
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
484
                   l.addi, 0x7fffc000, 0x4000, 0x80000000,
485
                   FALSE, TRUE)
486
 
487
        /* Check that a carry alone does not cause a RANGE Exception. */
488
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
489
                   l.addi, 0xffffffff, 0xfffe, 0xfffffffd,
490
                   TRUE, FALSE)
491
 
492
        /* Check that carry and overflow together cause an exception. */
493
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
494
                   l.addi, 0x80007fff, 0x8000, 0x7fffffff,
495
                   TRUE, TRUE)
496
 
497
        /* Finished checking range exceptions */
498 112 jeremybenn
        l.mfspr r3,r0,SPR_SR
499 114 jeremybenn
        LOAD_CONST (r2, ~SPR_SR_OVE)    /* Clear OVE */
500 112 jeremybenn
        l.and   r3,r3,r2
501
        l.mtspr r0,r3,SPR_SR
502 114 jeremybenn
 
503
        LOAD_STR (r3, "  ** OVE flag cleared **\n")
504
        l.jal   _puts
505
        l.nop
506 112 jeremybenn
 
507 114 jeremybenn
/* ----------------------------------------------------------------------------
508
 * Test of add signed and carry, l.addic
509
 * ------------------------------------------------------------------------- */
510
_addic:
511
        LOAD_STR (r3, "l.addic\n")
512
        l.jal   _puts
513
        l.nop
514 112 jeremybenn
 
515 114 jeremybenn
        /* Add two small positive numbers */
516
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
517
                   l.addic, 1, 2, 3,
518
                   FALSE, FALSE)
519 112 jeremybenn
 
520 114 jeremybenn
        /* Add two small negative numbers. Sets the carry flag but not the
521
           overflow flag. */
522
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
523
                   l.addic, 0xffffffff, 0xfffe, 0xfffffffd,
524
                   TRUE, FALSE)
525 112 jeremybenn
 
526 114 jeremybenn
        /* Add two quite large positive numbers. Should set neither the
527
           overflow nor the carry flag. */
528
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
529
                   l.addic, 0x7fff8000, 0x7fff, 0x7fffffff,
530
                   FALSE, FALSE)
531 112 jeremybenn
 
532 114 jeremybenn
        /* Add two quite large positive numbers with a carry in. Should set
533
           the overflow but not the carry flag. */
534
        TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
535
                   l.addic, 0x7fff8000, 0x7fff, 0x80000000,
536
                   FALSE, TRUE)
537 112 jeremybenn
 
538 114 jeremybenn
        /* Add two large positive numbers. Should set the overflow, but not
539
           the carry flag. */
540
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
541
                   l.addic, 0x7fffc000, 0x4000, 0x80000000,
542
                   FALSE, TRUE)
543 112 jeremybenn
 
544 114 jeremybenn
        /* Add the largest unsigned value to zero with a carry. This
545
           potentially can break a simplistic test for carry that does not
546
           consider the carry flag properly. Do it both ways around. */
547
        TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
548
                   l.addic, 0xffffffff, 0x0000, 0x00000000,
549
                   TRUE, FALSE)
550 112 jeremybenn
 
551 114 jeremybenn
        TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
552
                   l.addic, 0x00000000, 0xffff, 0x00000000,
553
                   TRUE, FALSE)
554
 
555
        /* Add two quite large negative numbers. Should set the carry, but not
556
           the overflow flag. flag. */
557
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
558
                   l.addic, 0x80008000, 0x8000, 0x80000000,
559
                   TRUE, FALSE)
560
 
561
        /* Add two quite large negative numbers that would overflow, with a
562
           carry that just avoids the overflow. Should set the carry, but not
563
           the overflow flag. flag. */
564
        TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
565
                   l.addic, 0x80007fff, 0x8000, 0x80000000,
566
                   TRUE, FALSE)
567
 
568
        /* Add two large negative numbers. Should set both the overflow and
569
           carry flags. */
570
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
571
                   l.addic, 0x80007fff, 0x8000, 0x7fffffff,
572
                   TRUE, TRUE)
573
 
574
        /* Check that range exceptions are triggered */
575 112 jeremybenn
        l.mfspr r3,r0,SPR_SR
576 114 jeremybenn
        LOAD_CONST (r2, SPR_SR_OVE)     /* Set OVE */
577
        l.or    r3,r3,r2
578 112 jeremybenn
        l.mtspr r0,r3,SPR_SR
579 114 jeremybenn
 
580
        LOAD_STR (r3, "  ** OVE flag set **\n")
581
        l.jal   _puts
582
        l.nop
583 112 jeremybenn
 
584 114 jeremybenn
        /* Check that an overflow alone causes a RANGE Exception, even when it
585
           is the carry that causes the overflow. */
586
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
587
                   l.addic, 0x7fffc000, 0x4000, 0x80000000,
588
                   FALSE, TRUE)
589 112 jeremybenn
 
590 114 jeremybenn
        TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
591
                   l.addic, 0x7fffc000, 0x3fff, 0x80000000,
592
                   FALSE, TRUE)
593 112 jeremybenn
 
594 114 jeremybenn
        /* Check that a carry alone does not cause a RANGE Exception, even
595
           when it is the carry that causes the overflow. */
596
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
597
                   l.addic, 0xffffffff, 0xfffe, 0xfffffffd,
598
                   TRUE, FALSE)
599 112 jeremybenn
 
600 114 jeremybenn
        TEST_ADDI (SPR_SR_CY, SPR_SR_OV,
601
                   l.addic, 0x00000000, 0xffff, 0x00000000,
602
                   TRUE, FALSE)
603
 
604
        /* Check that carry and overflow together cause an exception. */
605
        TEST_ADDI (0, SPR_SR_CY | SPR_SR_OV,
606
                   l.addic, 0x80007fff, 0x8000, 0x7fffffff,
607
                   TRUE, TRUE)
608
 
609 112 jeremybenn
        /* Finished checking range exceptions */
610 114 jeremybenn
        l.mfspr r3,r0,SPR_SR
611 112 jeremybenn
        LOAD_CONST (r2, ~SPR_SR_OVE)    /* Clear OVE */
612
        l.and   r3,r3,r2
613
        l.mtspr r0,r3,SPR_SR
614
 
615 114 jeremybenn
        LOAD_STR (r3, "  ** OVE flag cleared **\n")
616 112 jeremybenn
        l.jal   _puts
617
        l.nop
618
 
619
/* ----------------------------------------------------------------------------
620
 * All done
621
 * ------------------------------------------------------------------------- */
622
_exit:
623
        LOAD_STR (r3, "Test completed\n")
624
        l.jal   _puts
625
        l.nop
626
 
627
        TEST_EXIT

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.