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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [inst-set-test/] [is-add-test.S] - Blame information for rev 112

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/* is-add-test.S. l.add, l.addc, l.addi and l.addic instruction test of Or1ksim
 *
 * Copyright (C) 1999-2006 OpenCores
 * Copyright (C) 2010 Embecosm Limited
 *
 * Contributors various OpenCores participants
 * Contributor Jeremy Bennett 
 *
 * This file is part of OpenRISC 1000 Architectural Simulator.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the Free
 * Software Foundation; either version 3 of the License, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program.  If not, see .
 */
 
/* ----------------------------------------------------------------------------
 * Coding conventions
 *
 * A simple rising stack is provided starting at _stack and pointed to by
 * r1. r1 points to the next free word. Only 32-bit registers may be pushed
 * onto the stack.
 *
 * Local labels up to 49 are reserved for macros. Each is used only once in
 * all macros. You can get in a serious mess if you get local label clashing
 * in macros.
 *
 * Arguments to functions are passed in r3 through r8.
 * r9 is the link (return address)
 * r11 is for returning results
 *
 * Only r1 and r2 are preserved across function calls. It is up to the callee
 * to save any other registers required.
 * ------------------------------------------------------------------------- */
 
/* ----------------------------------------------------------------------------
 * Test coverage
 *
 * The l.add, l.addc, l.addi and l.addic instructions should set the carry and
 * overflow flags.
 *
 * In addition the l.addc and l.addic instructions should add in the carry
 * bit.
 *
 * Problems in this area were reported in Bug 1771. Having fixed the problem,
 * this is (in good software engineering style), a  regression test to go with
 * the fix.
 *
 * This is not a comprehensive test of any instruction (yet).
 *
 * Of course what is really needed is a comprehensive instruction test...
 * ------------------------------------------------------------------------- */
 
 
#include "inst-set-test.h"
 
        .section .text
        .global _start
_start:
 
/* ----------------------------------------------------------------------------
 * Test of add signed, l.add
 * ------------------------------------------------------------------------- */
_add:
        LOAD_STR (r3, "l.add\n")
        l.jal   _puts
        l.nop
 
        /* Add two small positive numbers */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,1)               /* Add two small positive numbers */
        LOAD_CONST (r6,2)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0x00000001 + 0x00000002 = 0x00000003: ", r4, 0x00000003)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", FALSE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", FALSE)
 
        /* Add two small negative numbers */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,0xffffffff)      /* Add two small negative numbers */
        LOAD_CONST (r6,0xfffffffe)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0xffffffff + 0xfffffffe = 0xfffffffd: ", r4, 0xfffffffd)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", TRUE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", FALSE)
 
        /* Add two quite large positive numbers. Should set neither the
           overflow nor the carry flag. */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,0x40000000)      /* Add two large positive numbers */
        LOAD_CONST (r6,0x3fffffff)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0x40000000 + 0x3fffffff = 0x7fffffff: ", r4, 0x7fffffff)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", FALSE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", FALSE)
 
        /* Add two large positive numbers. Should set the overflow, but not
           the carry flag. */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,0x40000000)      /* Add two large positive numbers */
        LOAD_CONST (r6,0x40000000)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0x40000000 + 0x40000000 = 0x80000000: ", r4, 0x80000000)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", FALSE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", TRUE)
 
        /* Add two quite large negative numbers. Should set the carry, but not
           the overflow flag. flag. */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,0xc0000000)      /* Add two large positive numbers */
        LOAD_CONST (r6,0xc0000000)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0xc0000000 + 0xc0000000 = 0x80000000: ", r4, 0x80000000)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", TRUE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", FALSE)
 
        /* Add two large negative numbers. Should set both the overflow and
           carry flags. */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,0xbfffffff)      /* Add two large negative numbers */
        LOAD_CONST (r6,0xbfffffff)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0xbfffffff + 0xbfffffff = 0x7ffffffe: ", r4, 0x7ffffffe)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", TRUE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", TRUE)
 
        /* Check that range exceptions are triggered */
        LOAD_CONST (r2, SPR_SR_OVE)     /* Set OVE */
        l.mfspr r3,r0,SPR_SR
        l.or    r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_STR (r3, "  OVE flag set\n")
        l.jal   _puts
        l.nop
 
        /* Check that an overflow alone causes a RANGE Exception. */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,0x40000000)      /* Add two large positive numbers */
        LOAD_CONST (r6,0x40000000)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0x40000000 + 0x40000000 = 0x80000000: ", r4, 0x80000000)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", FALSE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", TRUE)
 
        /* Check that a carry alone does not cause a RANGE Exception. */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,0xffffffff)      /* Add two small negative numbers */
        LOAD_CONST (r6,0xfffffffe)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0xffffffff + 0xfffffffe = 0xfffffffd: ", r4, 0xfffffffd)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", TRUE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", FALSE)
 
        /* Check that carry and overflow together cause an exception. */
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))       /* Clear flags */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_CONST (r5,0xbfffffff)      /* Add two large negative numbers */
        LOAD_CONST (r6,0xbfffffff)
        l.add   r4,r5,r6
        l.mfspr r2,r0,SPR_SR            /* So we can examine the carry flag */
        PUSH (r2)
        CHECK_RES ("0xbfffffff + 0xbfffffff = 0x7ffffffe: ", r4, 0x7ffffffe)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- carry flag set:    ", TRUE)
 
        POP(r2)                         /* Retrieve SR */
        PUSH(r2)
        LOAD_CONST (r4, SPR_SR_OV)      /* The carry bit */
        l.and   r2,r2,r4
        l.sfeq  r2,r4
        CHECK_FLAG ("- overflow flag set: ", TRUE)
 
        /* Finished checking range exceptions */
        LOAD_CONST (r2, ~SPR_SR_OVE)    /* Clear OVE */
        l.mfspr r3,r0,SPR_SR
        l.and   r3,r3,r2
        l.mtspr r0,r3,SPR_SR
 
        LOAD_STR (r3, "  OVE flag cleared\n")
        l.jal   _puts
        l.nop
 
/* ----------------------------------------------------------------------------
 * All done
 * ------------------------------------------------------------------------- */
_exit:
        LOAD_STR (r3, "Test completed\n")
        l.jal   _puts
        l.nop
 
        TEST_EXIT

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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [inst-set-test/] [is-add-test.S] - Blame information for rev 112

Line No.	Rev	Author	Line
1	112	jeremybenn	`/* is-add-test.S. l.add, l.addc, l.addi and l.addic instruction test of Or1ksim`
2			`*`
3			`* Copyright (C) 1999-2006 OpenCores`
4			`* Copyright (C) 2010 Embecosm Limited`
5			`*`
6			`* Contributors various OpenCores participants`
7			`* Contributor Jeremy Bennett`
8			`*`
9			`* This file is part of OpenRISC 1000 Architectural Simulator.`
10			`*`
11			`* This program is free software; you can redistribute it and/or modify it`
12			`* under the terms of the GNU General Public License as published by the Free`
13			`* Software Foundation; either version 3 of the License, or (at your option)`
14			`* any later version.`
15			`*`
16			`* This program is distributed in the hope that it will be useful, but WITHOUT`
17			`* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
18			`* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for`
19			`* more details.`
20			`*`
21			`* You should have received a copy of the GNU General Public License along`
22			`* with this program. If not, see .`
23			`*/`
24
25			`/* ----------------------------------------------------------------------------`
26			`* Coding conventions`
27			`*`
28			`* A simple rising stack is provided starting at _stack and pointed to by`
29			`* r1. r1 points to the next free word. Only 32-bit registers may be pushed`
30			`* onto the stack.`
31			`*`
32			`* Local labels up to 49 are reserved for macros. Each is used only once in`
33			`* all macros. You can get in a serious mess if you get local label clashing`
34			`* in macros.`
35			`*`
36			`* Arguments to functions are passed in r3 through r8.`
37			`* r9 is the link (return address)`
38			`* r11 is for returning results`
39			`*`
40			`* Only r1 and r2 are preserved across function calls. It is up to the callee`
41			`* to save any other registers required.`
42			`* ------------------------------------------------------------------------- */`
43
44			`/* ----------------------------------------------------------------------------`
45			`* Test coverage`
46			`*`
47			`* The l.add, l.addc, l.addi and l.addic instructions should set the carry and`
48			`* overflow flags.`
49			`*`
50			`* In addition the l.addc and l.addic instructions should add in the carry`
51			`* bit.`
52			`*`
53			`* Problems in this area were reported in Bug 1771. Having fixed the problem,`
54			`* this is (in good software engineering style), a regression test to go with`
55			`* the fix.`
56			`*`
57			`* This is not a comprehensive test of any instruction (yet).`
58			`*`
59			`* Of course what is really needed is a comprehensive instruction test...`
60			`* ------------------------------------------------------------------------- */`
61
62
63			`#include "inst-set-test.h"`
64
65			`.section .text`
66			`.global _start`
67			`_start:`
68
69			`/* ----------------------------------------------------------------------------`
70			`* Test of add signed, l.add`
71			`* ------------------------------------------------------------------------- */`
72			`_add:`
73			`LOAD_STR (r3, "l.add\n")`
74			`l.jal _puts`
75			`l.nop`
76
77			`/* Add two small positive numbers */`
78			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
79			`l.mfspr r3,r0,SPR_SR`
80			`l.and r3,r3,r2`
81			`l.mtspr r0,r3,SPR_SR`
82
83			`LOAD_CONST (r5,1) /* Add two small positive numbers */`
84			`LOAD_CONST (r6,2)`
85			`l.add r4,r5,r6`
86			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
87			`PUSH (r2)`
88			`CHECK_RES ("0x00000001 + 0x00000002 = 0x00000003: ", r4, 0x00000003)`
89
90			`POP(r2) /* Retrieve SR */`
91			`PUSH(r2)`
92			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
93			`l.and r2,r2,r4`
94			`l.sfeq r2,r4`
95			`CHECK_FLAG ("- carry flag set: ", FALSE)`
96
97			`POP(r2) /* Retrieve SR */`
98			`PUSH(r2)`
99			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
100			`l.and r2,r2,r4`
101			`l.sfeq r2,r4`
102			`CHECK_FLAG ("- overflow flag set: ", FALSE)`
103
104			`/* Add two small negative numbers */`
105			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
106			`l.mfspr r3,r0,SPR_SR`
107			`l.and r3,r3,r2`
108			`l.mtspr r0,r3,SPR_SR`
109
110			`LOAD_CONST (r5,0xffffffff) /* Add two small negative numbers */`
111			`LOAD_CONST (r6,0xfffffffe)`
112			`l.add r4,r5,r6`
113			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
114			`PUSH (r2)`
115			`CHECK_RES ("0xffffffff + 0xfffffffe = 0xfffffffd: ", r4, 0xfffffffd)`
116
117			`POP(r2) /* Retrieve SR */`
118			`PUSH(r2)`
119			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
120			`l.and r2,r2,r4`
121			`l.sfeq r2,r4`
122			`CHECK_FLAG ("- carry flag set: ", TRUE)`
123
124			`POP(r2) /* Retrieve SR */`
125			`PUSH(r2)`
126			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
127			`l.and r2,r2,r4`
128			`l.sfeq r2,r4`
129			`CHECK_FLAG ("- overflow flag set: ", FALSE)`
130
131			`/* Add two quite large positive numbers. Should set neither the`
132			`overflow nor the carry flag. */`
133			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
134			`l.mfspr r3,r0,SPR_SR`
135			`l.and r3,r3,r2`
136			`l.mtspr r0,r3,SPR_SR`
137
138			`LOAD_CONST (r5,0x40000000) /* Add two large positive numbers */`
139			`LOAD_CONST (r6,0x3fffffff)`
140			`l.add r4,r5,r6`
141			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
142			`PUSH (r2)`
143			`CHECK_RES ("0x40000000 + 0x3fffffff = 0x7fffffff: ", r4, 0x7fffffff)`
144
145			`POP(r2) /* Retrieve SR */`
146			`PUSH(r2)`
147			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
148			`l.and r2,r2,r4`
149			`l.sfeq r2,r4`
150			`CHECK_FLAG ("- carry flag set: ", FALSE)`
151
152			`POP(r2) /* Retrieve SR */`
153			`PUSH(r2)`
154			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
155			`l.and r2,r2,r4`
156			`l.sfeq r2,r4`
157			`CHECK_FLAG ("- overflow flag set: ", FALSE)`
158
159			`/* Add two large positive numbers. Should set the overflow, but not`
160			`the carry flag. */`
161			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
162			`l.mfspr r3,r0,SPR_SR`
163			`l.and r3,r3,r2`
164			`l.mtspr r0,r3,SPR_SR`
165
166			`LOAD_CONST (r5,0x40000000) /* Add two large positive numbers */`
167			`LOAD_CONST (r6,0x40000000)`
168			`l.add r4,r5,r6`
169			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
170			`PUSH (r2)`
171			`CHECK_RES ("0x40000000 + 0x40000000 = 0x80000000: ", r4, 0x80000000)`
172
173			`POP(r2) /* Retrieve SR */`
174			`PUSH(r2)`
175			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
176			`l.and r2,r2,r4`
177			`l.sfeq r2,r4`
178			`CHECK_FLAG ("- carry flag set: ", FALSE)`
179
180			`POP(r2) /* Retrieve SR */`
181			`PUSH(r2)`
182			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
183			`l.and r2,r2,r4`
184			`l.sfeq r2,r4`
185			`CHECK_FLAG ("- overflow flag set: ", TRUE)`
186
187			`/* Add two quite large negative numbers. Should set the carry, but not`
188			`the overflow flag. flag. */`
189			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
190			`l.mfspr r3,r0,SPR_SR`
191			`l.and r3,r3,r2`
192			`l.mtspr r0,r3,SPR_SR`
193
194			`LOAD_CONST (r5,0xc0000000) /* Add two large positive numbers */`
195			`LOAD_CONST (r6,0xc0000000)`
196			`l.add r4,r5,r6`
197			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
198			`PUSH (r2)`
199			`CHECK_RES ("0xc0000000 + 0xc0000000 = 0x80000000: ", r4, 0x80000000)`
200
201			`POP(r2) /* Retrieve SR */`
202			`PUSH(r2)`
203			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
204			`l.and r2,r2,r4`
205			`l.sfeq r2,r4`
206			`CHECK_FLAG ("- carry flag set: ", TRUE)`
207
208			`POP(r2) /* Retrieve SR */`
209			`PUSH(r2)`
210			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
211			`l.and r2,r2,r4`
212			`l.sfeq r2,r4`
213			`CHECK_FLAG ("- overflow flag set: ", FALSE)`
214
215			`/* Add two large negative numbers. Should set both the overflow and`
216			`carry flags. */`
217			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
218			`l.mfspr r3,r0,SPR_SR`
219			`l.and r3,r3,r2`
220			`l.mtspr r0,r3,SPR_SR`
221
222			`LOAD_CONST (r5,0xbfffffff) /* Add two large negative numbers */`
223			`LOAD_CONST (r6,0xbfffffff)`
224			`l.add r4,r5,r6`
225			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
226			`PUSH (r2)`
227			`CHECK_RES ("0xbfffffff + 0xbfffffff = 0x7ffffffe: ", r4, 0x7ffffffe)`
228
229			`POP(r2) /* Retrieve SR */`
230			`PUSH(r2)`
231			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
232			`l.and r2,r2,r4`
233			`l.sfeq r2,r4`
234			`CHECK_FLAG ("- carry flag set: ", TRUE)`
235
236			`POP(r2) /* Retrieve SR */`
237			`PUSH(r2)`
238			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
239			`l.and r2,r2,r4`
240			`l.sfeq r2,r4`
241			`CHECK_FLAG ("- overflow flag set: ", TRUE)`
242
243			`/* Check that range exceptions are triggered */`
244			`LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */`
245			`l.mfspr r3,r0,SPR_SR`
246			`l.or r3,r3,r2`
247			`l.mtspr r0,r3,SPR_SR`
248
249			`LOAD_STR (r3, " OVE flag set\n")`
250			`l.jal _puts`
251			`l.nop`
252
253			`/* Check that an overflow alone causes a RANGE Exception. */`
254			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
255			`l.mfspr r3,r0,SPR_SR`
256			`l.and r3,r3,r2`
257			`l.mtspr r0,r3,SPR_SR`
258
259			`LOAD_CONST (r5,0x40000000) /* Add two large positive numbers */`
260			`LOAD_CONST (r6,0x40000000)`
261			`l.add r4,r5,r6`
262			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
263			`PUSH (r2)`
264			`CHECK_RES ("0x40000000 + 0x40000000 = 0x80000000: ", r4, 0x80000000)`
265
266			`POP(r2) /* Retrieve SR */`
267			`PUSH(r2)`
268			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
269			`l.and r2,r2,r4`
270			`l.sfeq r2,r4`
271			`CHECK_FLAG ("- carry flag set: ", FALSE)`
272
273			`POP(r2) /* Retrieve SR */`
274			`PUSH(r2)`
275			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
276			`l.and r2,r2,r4`
277			`l.sfeq r2,r4`
278			`CHECK_FLAG ("- overflow flag set: ", TRUE)`
279
280			`/* Check that a carry alone does not cause a RANGE Exception. */`
281			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
282			`l.mfspr r3,r0,SPR_SR`
283			`l.and r3,r3,r2`
284			`l.mtspr r0,r3,SPR_SR`
285
286			`LOAD_CONST (r5,0xffffffff) /* Add two small negative numbers */`
287			`LOAD_CONST (r6,0xfffffffe)`
288			`l.add r4,r5,r6`
289			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
290			`PUSH (r2)`
291			`CHECK_RES ("0xffffffff + 0xfffffffe = 0xfffffffd: ", r4, 0xfffffffd)`
292
293			`POP(r2) /* Retrieve SR */`
294			`PUSH(r2)`
295			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
296			`l.and r2,r2,r4`
297			`l.sfeq r2,r4`
298			`CHECK_FLAG ("- carry flag set: ", TRUE)`
299
300			`POP(r2) /* Retrieve SR */`
301			`PUSH(r2)`
302			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
303			`l.and r2,r2,r4`
304			`l.sfeq r2,r4`
305			`CHECK_FLAG ("- overflow flag set: ", FALSE)`
306
307			`/* Check that carry and overflow together cause an exception. */`
308			`LOAD_CONST (r2, ~(SPR_SR_CY \| SPR_SR_OV)) /* Clear flags */`
309			`l.mfspr r3,r0,SPR_SR`
310			`l.and r3,r3,r2`
311			`l.mtspr r0,r3,SPR_SR`
312
313			`LOAD_CONST (r5,0xbfffffff) /* Add two large negative numbers */`
314			`LOAD_CONST (r6,0xbfffffff)`
315			`l.add r4,r5,r6`
316			`l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */`
317			`PUSH (r2)`
318			`CHECK_RES ("0xbfffffff + 0xbfffffff = 0x7ffffffe: ", r4, 0x7ffffffe)`
319
320			`POP(r2) /* Retrieve SR */`
321			`PUSH(r2)`
322			`LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */`
323			`l.and r2,r2,r4`
324			`l.sfeq r2,r4`
325			`CHECK_FLAG ("- carry flag set: ", TRUE)`
326
327			`POP(r2) /* Retrieve SR */`
328			`PUSH(r2)`
329			`LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */`
330			`l.and r2,r2,r4`
331			`l.sfeq r2,r4`
332			`CHECK_FLAG ("- overflow flag set: ", TRUE)`
333
334			`/* Finished checking range exceptions */`
335			`LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */`
336			`l.mfspr r3,r0,SPR_SR`
337			`l.and r3,r3,r2`
338			`l.mtspr r0,r3,SPR_SR`
339
340			`LOAD_STR (r3, " OVE flag cleared\n")`
341			`l.jal _puts`
342			`l.nop`
343
344			`/* ----------------------------------------------------------------------------`
345			`* All done`
346			`* ------------------------------------------------------------------------- */`
347			`_exit:`
348			`LOAD_STR (r3, "Test completed\n")`
349			`l.jal _puts`
350			`l.nop`
351
352			`TEST_EXIT`