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jeremybenn |
/* is-jump-test.S. l.j, l.jal, l.jalr and l.jr instruction test of Or1ksim
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*
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* Copyright (C) 1999-2006 OpenCores
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* Copyright (C) 2010 Embecosm Limited
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*
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* Contributors various OpenCores participants
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* Contributor Jeremy Bennett
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*
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* This file is part of OpenRISC 1000 Architectural Simulator.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 3 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see .
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*/
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/* ----------------------------------------------------------------------------
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* Coding conventions are described in inst-set-test.S
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* ------------------------------------------------------------------------- */
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/* ----------------------------------------------------------------------------
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* Test coverage
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*
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* The l.jalr and l.jr instructions should trigger an alignment exception if
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* the register does not holde an aligned address (Bug 1775).
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*
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* Having fixed the problem, this is (in good software engineering style), a
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* regresison test to go with the fix.
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*
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* This is not a comprehensive test of either instruction (yet).
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*
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* Of course what is really needed is a comprehensive instruction test...
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* ------------------------------------------------------------------------- */
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#include "inst-set-test.h"
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/* ----------------------------------------------------------------------------
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* A macro to carry out a test of a jump using a register destination
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*
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* We manually construct the opcode, to allow us to force r9 into the
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* destination field, to test exception handling. Usually the assembler would
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* prevent this.
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*
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* Arguments
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* opc_mask: The opcode mask
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* regno: Register number to use
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* offset: Offset in bytes forward of target (testing alignment
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* ------------------------------------------------------------------------- */
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#define TEST_JUMP(opc_mask, dest, offset) \
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LOAD_CONST (r31,51f + offset) ;\
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.word (0xe01f0004|(dest << 21)) /* l.ori rD,r31,r0 */ ;\
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l.mtspr r0,r0,SPR_EPCR_BASE /* Clear record */ ;\
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50: .word (opc_mask|(dest << 11)) /* Jump opcode */ ;\
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l.nop ;\
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;\
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/* Jump failed, we drop through to here */ ;\
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l.mfspr r2,r0,SPR_EPCR_BASE /* What triggered exception */ ;\
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PUSH (r2) /* Save EPCR for later */ ;\
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PUTS (" Jump to 0x") ;\
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PUTH (51f + offset) ;\
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PUTS (" using register 0x") ;\
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PUTHQ (dest) ;\
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PUTS (" failed\n") ;\
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l.j 52f ;\
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l.nop ;\
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;\
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/* Jump succeeded we get here */ ;\
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51: l.mfspr r2,r0,SPR_EPCR_BASE /* What triggered exception */ ;\
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PUSH (r2) /* Save EPCR for later */ ;\
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PUTS (" Jump to 0x") ;\
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PUTH (51b + offset) ;\
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PUTS (" using register 0x") ;\
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PUTHQ (dest) ;\
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PUTS (" OK\n") ;\
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;\
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/* Report if we got exception */ ;\
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52: POP (r2) /* Retrieve EPCR */ ;\
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LOAD_CONST (r4, 50b) /* The opcode of interest */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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l.bnf 53f ;\
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;\
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PUTS (" - exception triggered: TRUE\n") ;\
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l.j 54f ;\
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l.nop ;\
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;\
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53: PUTS (" - exception triggered: FALSE\n") ;\
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54:
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/* ----------------------------------------------------------------------------
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* Start of code
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* ------------------------------------------------------------------------- */
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.section .text
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.global _start
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_start:
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/* ----------------------------------------------------------------------------
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* Test of jump and link register, l.jalr
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* ------------------------------------------------------------------------- */
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_jalr:
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LOAD_STR (r3, "l.jalr\n")
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l.jal _puts
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l.nop
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/* Test with various alignment offsets */
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TEST_JUMP (0x48000000, 5, 0) /* No offset */
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TEST_JUMP (0x48000000, 5, 1) /* No offset */
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TEST_JUMP (0x48000000, 5, 2) /* No offset */
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TEST_JUMP (0x48000000, 5, 3) /* No offset */
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/* Test with link register as the destination */
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TEST_JUMP (0x48000000, 9, 0) /* No offset */
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/* ----------------------------------------------------------------------------
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* Test of jump register, l.jr
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* ------------------------------------------------------------------------- */
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_jr:
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LOAD_STR (r3, "l.jr\n")
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l.jal _puts
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l.nop
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/* Test with various alignment offsets */
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TEST_JUMP (0x44000000, 5, 0) /* No offset */
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TEST_JUMP (0x44000000, 5, 1) /* No offset */
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TEST_JUMP (0x44000000, 5, 2) /* No offset */
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TEST_JUMP (0x44000000, 5, 3) /* No offset */
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/* Test with link register as the destination (OK here) */
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TEST_JUMP (0x44000000, 9, 0) /* No offset */
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/* ----------------------------------------------------------------------------
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* All done
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* ------------------------------------------------------------------------- */
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_exit:
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LOAD_STR (r3, "Test completed\n")
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l.jal _puts
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l.nop
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TEST_EXIT
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