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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [inst-set-test/] [is-shift-test.S] - Blame information for rev 132

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1 124 jeremybenn
/* is-shift-test.S. shift instructions test of Or1ksim
2
 *
3
 * Copyright (C) 1999-2006 OpenCores
4
 * Copyright (C) 2010 Embecosm Limited
5
 *
6
 * Contributors various OpenCores participants
7
 * Contributor Jeremy Bennett 
8
 *
9
 * This file is part of OpenRISC 1000 Architectural Simulator.
10
 *
11
 * This program is free software; you can redistribute it and/or modify it
12
 * under the terms of the GNU General Public License as published by the Free
13
 * Software Foundation; either version 3 of the License, or (at your option)
14
 * any later version.
15
 *
16
 * This program is distributed in the hope that it will be useful, but WITHOUT
17
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19
 * more details.
20
 *
21
 * You should have received a copy of the GNU General Public License along
22
 * with this program.  If not, see .
23
 */
24
 
25
/* ----------------------------------------------------------------------------
26
 * Coding conventions are described in inst-set-test.S
27
 * ------------------------------------------------------------------------- */
28
 
29
/* ----------------------------------------------------------------------------
30
 * Test coverage
31
 *
32
 * The shift instructions should never set the carry and overflow flags.
33
 *
34
 * Problems in this area were reported in Bugs 1782, 1783 and 1784. Having
35
 * fixed the problem, this is (in good software engineering style), a
36
 * regression test to go with the fix.
37
 *
38
 * This is not a comprehensive test of any instruction (yet).
39
 *
40
 * Of course what is really needed is a comprehensive instruction test...
41
 * ------------------------------------------------------------------------- */
42
 
43
 
44
#include "inst-set-test.h"
45
 
46
/* ----------------------------------------------------------------------------
47
 * A macro to carry out a test of shift in registers
48
 *
49
 * This opcode should never set the flags.
50
 *
51
 * Arguments
52
 *   opc:       The operand
53
 *   op1:       First operand value
54
 *   op2:       Second operand value
55
 *   res:       The expected result
56
 * ------------------------------------------------------------------------- */
57
#define TEST_SHIFT(opc, op1, op2, res)                                   \
58
        l.mfspr r3,r0,SPR_SR            /* Clear flags */               ;\
59
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))                       ;\
60
        l.and   r3,r3,r2                                                ;\
61
        l.mtspr r0,r3,SPR_SR                                            ;\
62
                                                                        ;\
63
        LOAD_CONST (r5,op1)             /* Load operands */             ;\
64
        LOAD_CONST (r6,op2)                                             ;\
65
        l.mtspr r0,r0,SPR_EPCR_BASE     /* Clear record */              ;\
66
50:     opc     r4,r5,r6                                                ;\
67
        l.mfspr r2,r0,SPR_SR            /* So we can examine flags */   ;\
68
        l.mfspr r5,r0,SPR_EPCR_BASE     /* What triggered exception */  ;\
69
        PUSH (r5)                       /* Save EPCR for later */       ;\
70
        PUSH (r2)                       /* Save SR for later */         ;\
71
        PUSH (r4)                       /* Save result for later */     ;\
72
                                                                        ;\
73
        PUTS ("  0x")                                                   ;\
74
        PUTH (op1)                                                      ;\
75
        PUTS (" shifted by 0x")                                         ;\
76
        PUTH (op2)                                                      ;\
77
        PUTS (" = 0x")                                                  ;\
78
        PUTH (res)                                                      ;\
79
        PUTS (": ")                                                     ;\
80
        POP (r4)                                                        ;\
81
        CHECK_RES1 (r4, res)                                            ;\
82
                                                                        ;\
83
        POP(r2)                         /* Retrieve SR */               ;\
84
        PUSH(r2)                                                        ;\
85
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */             ;\
86
        l.and   r2,r2,r4                                                ;\
87
        l.sfeq  r2,r4                                                   ;\
88
        CHECK_FLAG ("- carry flag set:      ", FALSE)                   ;\
89
                                                                        ;\
90
        POP(r2)                         /* Retrieve SR */               ;\
91
        LOAD_CONST (r4, SPR_SR_OV)      /* The overflow bit */          ;\
92
        l.and   r2,r2,r4                                                ;\
93
        l.sfeq  r2,r4                                                   ;\
94
        CHECK_FLAG ("- overflow flag set:   ", FALSE)                   ;\
95
                                                                        ;\
96
        POP (r2)                        /* Retrieve EPCR */             ;\
97
        LOAD_CONST (r4, 50b)            /* The opcode of interest */    ;\
98
        l.and   r2,r2,r4                                                ;\
99
        l.sfeq  r2,r4                                                   ;\
100
        l.bnf   51f                                                     ;\
101
                                                                        ;\
102
        PUTS ("  - exception triggered: TRUE\n")                        ;\
103
        l.j     52f                                                     ;\
104
        l.nop                                                           ;\
105
                                                                        ;\
106
51:     PUTS ("  - exception triggered: FALSE\n")                       ;\
107
52:
108
 
109
 
110
/* ----------------------------------------------------------------------------
111
 * A macro to carry out a test of shift with an immediate operand
112
 *
113
 * This opcode should never set the flags.
114
 *
115
 * Arguments
116
 *   opc:       The operand
117
 *   op1:       First operand value
118
 *   op2:       Second operand value
119
 *   res:       The expected result
120
 * ------------------------------------------------------------------------- */
121
#define TEST_SHIFTI(opc, op1, op2, res)                                  \
122
        l.mfspr r3,r0,SPR_SR            /* Clear flags */               ;\
123
        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))                       ;\
124
        l.and   r3,r3,r2                                                ;\
125
        l.mtspr r0,r3,SPR_SR                                            ;\
126
                                                                        ;\
127
        LOAD_CONST (r5,op1)             /* Load operands */             ;\
128
        l.mtspr r0,r0,SPR_EPCR_BASE     /* Clear record */              ;\
129
53:     opc     r4,r5,op2                                               ;\
130
        l.mfspr r2,r0,SPR_SR            /* So we can examine flags */   ;\
131
        l.mfspr r5,r0,SPR_EPCR_BASE     /* What triggered exception */  ;\
132
        PUSH (r5)                       /* Save EPCR for later */       ;\
133
        PUSH (r2)                       /* Save SR for later */         ;\
134
        PUSH (r4)                       /* Save result for later */     ;\
135
                                                                        ;\
136
        PUTS ("  0x")                                                   ;\
137
        PUTH (op1)                                                      ;\
138
        PUTS (" shifted by 0x")                                         ;\
139
        PUTHH (op2)                                                     ;\
140
        PUTS (" = 0x")                                                  ;\
141
        PUTH (res)                                                      ;\
142
        PUTS (": ")                                                     ;\
143
        POP (r4)                                                        ;\
144
        CHECK_RES1 (r4, res)                                            ;\
145
                                                                        ;\
146
        POP(r2)                         /* Retrieve SR */               ;\
147
        PUSH(r2)                                                        ;\
148
        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */             ;\
149
        l.and   r2,r2,r4                                                ;\
150
        l.sfeq  r2,r4                                                   ;\
151
        CHECK_FLAG ("- carry flag set:      ", FALSE)                   ;\
152
                                                                        ;\
153
        POP(r2)                         /* Retrieve SR */               ;\
154
        LOAD_CONST (r4, SPR_SR_OV)      /* The overflow bit */          ;\
155
        l.and   r2,r2,r4                                                ;\
156
        l.sfeq  r2,r4                                                   ;\
157
        CHECK_FLAG ("- overflow flag set:   ", FALSE)                   ;\
158
                                                                        ;\
159
        POP (r2)                        /* Retrieve EPCR */             ;\
160
        LOAD_CONST (r4, 53b)            /* The opcode of interest */    ;\
161
        l.and   r2,r2,r4                                                ;\
162
        l.sfeq  r2,r4                                                   ;\
163
        l.bnf   54f                                                     ;\
164
                                                                        ;\
165
        PUTS ("  - exception triggered: TRUE\n")                        ;\
166
        l.j     55f                                                     ;\
167
        l.nop                                                           ;\
168
                                                                        ;\
169
54:     PUTS ("  - exception triggered: FALSE\n")                       ;\
170
55:
171
 
172
 
173
/* ----------------------------------------------------------------------------
174
 * Start of code
175
 * ------------------------------------------------------------------------- */
176
        .section .text
177
        .global _start
178
_start:
179
        /* Always set OVE. We should never trigger an exception, even if this
180
           bit is set. */
181
        l.mfspr r3,r0,SPR_SR
182
        LOAD_CONST (r2, SPR_SR_OVE)     /* Set OVE */
183
        l.or    r3,r3,r2
184
        l.mtspr r0,r3,SPR_SR
185
 
186
        LOAD_STR (r3, "  ** OVE flag set **\n")
187
        l.jal   _puts
188
        l.nop
189
 
190
/* ----------------------------------------------------------------------------
191
 * Test of shift left logical, l.sll
192
 * ------------------------------------------------------------------------- */
193
_sll:
194
        LOAD_STR (r3, "l.sll\n")
195
        l.jal   _puts
196
        l.nop
197
 
198
        /* Shift left by zero. */
199
        TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000000, 0xb38f0f83)
200
 
201
        /* Shift left by amounts in the 1-31 range */
202
        TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000001, 0x671e1f06)
203
        TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000004, 0x38f0f830)
204
        TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000010, 0x0f830000)
205
        TEST_SHIFT (l.sll, 0xb38f0f83, 0x0000001f, 0x80000000)
206
 
207
        /* Shift left by larger amounts - should be masked. */
208
        TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000021, 0x671e1f06)
209
        TEST_SHIFT (l.sll, 0xb38f0f83, 0x00002224, 0x38f0f830)
210
        TEST_SHIFT (l.sll, 0xb38f0f83, 0x00f789f0, 0x0f830000)
211
        TEST_SHIFT (l.sll, 0xb38f0f83, 0xffffffff, 0x80000000)
212
 
213
/* ----------------------------------------------------------------------------
214
 * Test of shift left logical with immediate, l.slli
215
 * ------------------------------------------------------------------------- */
216
_slli:
217
        LOAD_STR (r3, "l.slli\n")
218
        l.jal   _puts
219
        l.nop
220
 
221
        /* Shift left by zero. */
222
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0000, 0xb38f0f83)
223
 
224
        /* Shift left by amounts in the 1-31 range */
225
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0001, 0x671e1f06)
226
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0004, 0x38f0f830)
227
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0010, 0x0f830000)
228
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x001f, 0x80000000)
229
 
230
        /* Shift left by larger amounts - should be masked. */
231
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0021, 0x671e1f06)
232
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0024, 0x38f0f830)
233
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0030, 0x0f830000)
234
        TEST_SHIFTI (l.slli, 0xb38f0f83, 0x003f, 0x80000000)
235
 
236
/* ----------------------------------------------------------------------------
237
 * Test of shift right arithmetic, l.sra
238
 * ------------------------------------------------------------------------- */
239
_sra:
240
        LOAD_STR (r3, "l.sra\n")
241
        l.jal   _puts
242
        l.nop
243
 
244
        /* Shift right by zero. */
245
        TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000000, 0xb38f0f83)
246
 
247
        /* Shift right by amounts in the 1-31 range */
248
        TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000001, 0xd9c787c1)
249
        TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000004, 0xfb38f0f8)
250
        TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000010, 0xffffb38f)
251
        TEST_SHIFT (l.sra, 0xb38f0f83, 0x0000001f, 0xffffffff)
252
 
253
        TEST_SHIFT (l.sra, 0x4c70f07c, 0x00000001, 0x2638783e)
254
        TEST_SHIFT (l.sra, 0x4c70f07c, 0x00000004, 0x04c70f07)
255
        TEST_SHIFT (l.sra, 0x4c70f07c, 0x00000010, 0x00004c70)
256
        TEST_SHIFT (l.sra, 0x4c70f07c, 0x0000001f, 0x00000000)
257
 
258
        /* Shift right by larger amounts - should be masked. */
259
        TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000021, 0xd9c787c1)
260
        TEST_SHIFT (l.sra, 0xb38f0f83, 0x00002224, 0xfb38f0f8)
261
        TEST_SHIFT (l.sra, 0xb38f0f83, 0x00f789f0, 0xffffb38f)
262
        TEST_SHIFT (l.sra, 0xb38f0f83, 0xffffffff, 0xffffffff)
263
 
264
        TEST_SHIFT (l.sra, 0x4c70f07c, 0x00000021, 0x2638783e)
265
        TEST_SHIFT (l.sra, 0x4c70f07c, 0x00002224, 0x04c70f07)
266
        TEST_SHIFT (l.sra, 0x4c70f07c, 0x00f789f0, 0x00004c70)
267
        TEST_SHIFT (l.sra, 0x4c70f07c, 0xffffffff, 0x00000000)
268
 
269
 
270
/* ----------------------------------------------------------------------------
271
 * Test of shift right arithmetic with immediate, l.srai
272
 * ------------------------------------------------------------------------- */
273
_srai:
274
        LOAD_STR (r3, "l.srai\n")
275
        l.jal   _puts
276
        l.nop
277
 
278
        /* Shift right by zero. */
279
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0000, 0xb38f0f83)
280
 
281
        /* Shift right by amounts in the 1-31 range */
282
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0001, 0xd9c787c1)
283
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0004, 0xfb38f0f8)
284
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0010, 0xffffb38f)
285
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x001f, 0xffffffff)
286
 
287
        TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0001, 0x2638783e)
288
        TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0004, 0x04c70f07)
289
        TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0010, 0x00004c70)
290
        TEST_SHIFTI (l.srai, 0x4c70f07c, 0x001f, 0x00000000)
291
 
292
        /* Shift right by larger amounts - should be masked. */
293
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0021, 0xd9c787c1)
294
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0024, 0xfb38f0f8)
295
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0030, 0xffffb38f)
296
        TEST_SHIFTI (l.srai, 0xb38f0f83, 0x003f, 0xffffffff)
297
 
298
        TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0021, 0x2638783e)
299
        TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0024, 0x04c70f07)
300
        TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0030, 0x00004c70)
301
        TEST_SHIFTI (l.srai, 0x4c70f07c, 0x003f, 0x00000000)
302
 
303
/* ----------------------------------------------------------------------------
304
 * Test of shift right logical, l.srl
305
 * ------------------------------------------------------------------------- */
306
_srl:
307
        LOAD_STR (r3, "l.srl\n")
308
        l.jal   _puts
309
        l.nop
310
 
311
        /* Shift right by zero. */
312
        TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000000, 0xb38f0f83)
313
 
314
        /* Shift right by amounts in the 1-31 range */
315
        TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000001, 0x59c787c1)
316
        TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000004, 0x0b38f0f8)
317
        TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000010, 0x0000b38f)
318
        TEST_SHIFT (l.srl, 0xb38f0f83, 0x0000001f, 0x00000001)
319
 
320
        TEST_SHIFT (l.srl, 0x4c70f07c, 0x00000001, 0x2638783e)
321
        TEST_SHIFT (l.srl, 0x4c70f07c, 0x00000004, 0x04c70f07)
322
        TEST_SHIFT (l.srl, 0x4c70f07c, 0x00000010, 0x00004c70)
323
        TEST_SHIFT (l.srl, 0x4c70f07c, 0x0000001f, 0x00000000)
324
 
325
        /* Shift right by larger amounts - should be masked. */
326
        TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000021, 0x59c787c1)
327
        TEST_SHIFT (l.srl, 0xb38f0f83, 0x00002224, 0x0b38f0f8)
328
        TEST_SHIFT (l.srl, 0xb38f0f83, 0x00f789f0, 0x0000b38f)
329
        TEST_SHIFT (l.srl, 0xb38f0f83, 0xffffffff, 0x00000001)
330
 
331
        TEST_SHIFT (l.srl, 0x4c70f07c, 0x00000021, 0x2638783e)
332
        TEST_SHIFT (l.srl, 0x4c70f07c, 0x00002224, 0x04c70f07)
333
        TEST_SHIFT (l.srl, 0x4c70f07c, 0x00f789f0, 0x00004c70)
334
        TEST_SHIFT (l.srl, 0x4c70f07c, 0xffffffff, 0x00000000)
335
 
336
 
337
/* ----------------------------------------------------------------------------
338
 * Test of shift right logical with immediate, l.srli
339
 * ------------------------------------------------------------------------- */
340
_srli:
341
        LOAD_STR (r3, "l.srli\n")
342
        l.jal   _puts
343
        l.nop
344
 
345
        /* Shift right by zero. */
346
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0000, 0xb38f0f83)
347
 
348
        /* Shift right by amounts in the 1-31 range */
349
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0001, 0x59c787c1)
350
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0004, 0x0b38f0f8)
351
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0010, 0x0000b38f)
352
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x001f, 0x00000001)
353
 
354
        TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0001, 0x2638783e)
355
        TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0004, 0x04c70f07)
356
        TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0010, 0x00004c70)
357
        TEST_SHIFTI (l.srli, 0x4c70f07c, 0x001f, 0x00000000)
358
 
359
        /* Shift right by larger amounts - should be masked. */
360
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0021, 0x59c787c1)
361
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0024, 0x0b38f0f8)
362
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0030, 0x0000b38f)
363
        TEST_SHIFTI (l.srli, 0xb38f0f83, 0x003f, 0x00000001)
364
 
365
        TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0021, 0x2638783e)
366
        TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0024, 0x04c70f07)
367
        TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0030, 0x00004c70)
368
        TEST_SHIFTI (l.srli, 0x4c70f07c, 0x003f, 0x00000000)
369
 
370
/* ----------------------------------------------------------------------------
371
 * All done
372
 * ------------------------------------------------------------------------- */
373
_exit:
374
        LOAD_STR (r3, "Test completed\n")
375
        l.jal   _puts
376
        l.nop
377
 
378
        TEST_EXIT

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