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jeremybenn |
/* is-shift-test.S. shift instructions test of Or1ksim
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*
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* Copyright (C) 1999-2006 OpenCores
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* Copyright (C) 2010 Embecosm Limited
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*
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* Contributors various OpenCores participants
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* Contributor Jeremy Bennett
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*
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* This file is part of OpenRISC 1000 Architectural Simulator.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 3 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see .
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*/
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/* ----------------------------------------------------------------------------
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* Coding conventions are described in inst-set-test.S
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* ------------------------------------------------------------------------- */
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/* ----------------------------------------------------------------------------
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* Test coverage
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*
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* The shift instructions should never set the carry and overflow flags.
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*
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* Problems in this area were reported in Bugs 1782, 1783 and 1784. Having
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* fixed the problem, this is (in good software engineering style), a
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* regression test to go with the fix.
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*
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* This is not a comprehensive test of any instruction (yet).
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*
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* Of course what is really needed is a comprehensive instruction test...
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* ------------------------------------------------------------------------- */
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#include "inst-set-test.h"
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/* ----------------------------------------------------------------------------
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* A macro to carry out a test of shift in registers
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*
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* This opcode should never set the flags.
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*
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* Arguments
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* opc: The operand
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* op1: First operand value
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* op2: Second operand value
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* res: The expected result
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* ------------------------------------------------------------------------- */
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#define TEST_SHIFT(opc, op1, op2, res) \
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l.mfspr r3,r0,SPR_SR /* Clear flags */ ;\
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LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) ;\
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l.and r3,r3,r2 ;\
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l.mtspr r0,r3,SPR_SR ;\
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;\
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LOAD_CONST (r5,op1) /* Load operands */ ;\
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LOAD_CONST (r6,op2) ;\
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l.mtspr r0,r0,SPR_EPCR_BASE /* Clear record */ ;\
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50: opc r4,r5,r6 ;\
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l.mfspr r2,r0,SPR_SR /* So we can examine flags */ ;\
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l.mfspr r5,r0,SPR_EPCR_BASE /* What triggered exception */ ;\
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PUSH (r5) /* Save EPCR for later */ ;\
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PUSH (r2) /* Save SR for later */ ;\
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PUSH (r4) /* Save result for later */ ;\
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;\
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PUTS (" 0x") ;\
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PUTH (op1) ;\
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PUTS (" shifted by 0x") ;\
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PUTH (op2) ;\
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PUTS (" = 0x") ;\
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PUTH (res) ;\
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PUTS (": ") ;\
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POP (r4) ;\
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CHECK_RES1 (r4, res) ;\
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;\
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POP(r2) /* Retrieve SR */ ;\
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PUSH(r2) ;\
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- carry flag set: ", FALSE) ;\
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;\
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POP(r2) /* Retrieve SR */ ;\
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LOAD_CONST (r4, SPR_SR_OV) /* The overflow bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- overflow flag set: ", FALSE) ;\
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;\
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POP (r2) /* Retrieve EPCR */ ;\
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LOAD_CONST (r4, 50b) /* The opcode of interest */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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l.bnf 51f ;\
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;\
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PUTS (" - exception triggered: TRUE\n") ;\
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l.j 52f ;\
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l.nop ;\
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;\
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51: PUTS (" - exception triggered: FALSE\n") ;\
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52:
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/* ----------------------------------------------------------------------------
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* A macro to carry out a test of shift with an immediate operand
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*
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* This opcode should never set the flags.
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*
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* Arguments
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* opc: The operand
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* op1: First operand value
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* op2: Second operand value
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* res: The expected result
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* ------------------------------------------------------------------------- */
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#define TEST_SHIFTI(opc, op1, op2, res) \
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l.mfspr r3,r0,SPR_SR /* Clear flags */ ;\
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LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) ;\
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l.and r3,r3,r2 ;\
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l.mtspr r0,r3,SPR_SR ;\
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;\
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LOAD_CONST (r5,op1) /* Load operands */ ;\
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l.mtspr r0,r0,SPR_EPCR_BASE /* Clear record */ ;\
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53: opc r4,r5,op2 ;\
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l.mfspr r2,r0,SPR_SR /* So we can examine flags */ ;\
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l.mfspr r5,r0,SPR_EPCR_BASE /* What triggered exception */ ;\
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PUSH (r5) /* Save EPCR for later */ ;\
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PUSH (r2) /* Save SR for later */ ;\
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PUSH (r4) /* Save result for later */ ;\
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;\
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PUTS (" 0x") ;\
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PUTH (op1) ;\
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PUTS (" shifted by 0x") ;\
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PUTHH (op2) ;\
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PUTS (" = 0x") ;\
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PUTH (res) ;\
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PUTS (": ") ;\
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POP (r4) ;\
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CHECK_RES1 (r4, res) ;\
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;\
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POP(r2) /* Retrieve SR */ ;\
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PUSH(r2) ;\
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- carry flag set: ", FALSE) ;\
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;\
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POP(r2) /* Retrieve SR */ ;\
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LOAD_CONST (r4, SPR_SR_OV) /* The overflow bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- overflow flag set: ", FALSE) ;\
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;\
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POP (r2) /* Retrieve EPCR */ ;\
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LOAD_CONST (r4, 53b) /* The opcode of interest */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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l.bnf 54f ;\
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;\
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PUTS (" - exception triggered: TRUE\n") ;\
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l.j 55f ;\
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l.nop ;\
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;\
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54: PUTS (" - exception triggered: FALSE\n") ;\
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55:
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/* ----------------------------------------------------------------------------
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* Start of code
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* ------------------------------------------------------------------------- */
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.section .text
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.global _start
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_start:
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/* Always set OVE. We should never trigger an exception, even if this
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bit is set. */
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
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l.or r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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LOAD_STR (r3, " ** OVE flag set **\n")
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l.jal _puts
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l.nop
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/* ----------------------------------------------------------------------------
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* Test of shift left logical, l.sll
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* ------------------------------------------------------------------------- */
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_sll:
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LOAD_STR (r3, "l.sll\n")
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l.jal _puts
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l.nop
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/* Shift left by zero. */
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TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000000, 0xb38f0f83)
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/* Shift left by amounts in the 1-31 range */
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TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000001, 0x671e1f06)
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TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000004, 0x38f0f830)
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TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000010, 0x0f830000)
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TEST_SHIFT (l.sll, 0xb38f0f83, 0x0000001f, 0x80000000)
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/* Shift left by larger amounts - should be masked. */
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TEST_SHIFT (l.sll, 0xb38f0f83, 0x00000021, 0x671e1f06)
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TEST_SHIFT (l.sll, 0xb38f0f83, 0x00002224, 0x38f0f830)
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TEST_SHIFT (l.sll, 0xb38f0f83, 0x00f789f0, 0x0f830000)
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TEST_SHIFT (l.sll, 0xb38f0f83, 0xffffffff, 0x80000000)
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/* ----------------------------------------------------------------------------
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* Test of shift left logical with immediate, l.slli
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* ------------------------------------------------------------------------- */
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_slli:
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LOAD_STR (r3, "l.slli\n")
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l.jal _puts
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l.nop
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/* Shift left by zero. */
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0000, 0xb38f0f83)
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/* Shift left by amounts in the 1-31 range */
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0001, 0x671e1f06)
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0004, 0x38f0f830)
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0010, 0x0f830000)
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x001f, 0x80000000)
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/* Shift left by larger amounts - should be masked. */
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0021, 0x671e1f06)
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0024, 0x38f0f830)
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x0030, 0x0f830000)
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TEST_SHIFTI (l.slli, 0xb38f0f83, 0x003f, 0x80000000)
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236 |
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/* ----------------------------------------------------------------------------
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* Test of shift right arithmetic, l.sra
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* ------------------------------------------------------------------------- */
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_sra:
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LOAD_STR (r3, "l.sra\n")
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l.jal _puts
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l.nop
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244 |
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/* Shift right by zero. */
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TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000000, 0xb38f0f83)
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247 |
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/* Shift right by amounts in the 1-31 range */
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TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000001, 0xd9c787c1)
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249 |
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TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000004, 0xfb38f0f8)
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250 |
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TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000010, 0xffffb38f)
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251 |
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TEST_SHIFT (l.sra, 0xb38f0f83, 0x0000001f, 0xffffffff)
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252 |
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253 |
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TEST_SHIFT (l.sra, 0x4c70f07c, 0x00000001, 0x2638783e)
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254 |
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TEST_SHIFT (l.sra, 0x4c70f07c, 0x00000004, 0x04c70f07)
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255 |
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TEST_SHIFT (l.sra, 0x4c70f07c, 0x00000010, 0x00004c70)
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256 |
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TEST_SHIFT (l.sra, 0x4c70f07c, 0x0000001f, 0x00000000)
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257 |
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258 |
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/* Shift right by larger amounts - should be masked. */
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259 |
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TEST_SHIFT (l.sra, 0xb38f0f83, 0x00000021, 0xd9c787c1)
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260 |
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TEST_SHIFT (l.sra, 0xb38f0f83, 0x00002224, 0xfb38f0f8)
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261 |
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TEST_SHIFT (l.sra, 0xb38f0f83, 0x00f789f0, 0xffffb38f)
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262 |
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TEST_SHIFT (l.sra, 0xb38f0f83, 0xffffffff, 0xffffffff)
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263 |
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264 |
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TEST_SHIFT (l.sra, 0x4c70f07c, 0x00000021, 0x2638783e)
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265 |
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TEST_SHIFT (l.sra, 0x4c70f07c, 0x00002224, 0x04c70f07)
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266 |
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TEST_SHIFT (l.sra, 0x4c70f07c, 0x00f789f0, 0x00004c70)
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267 |
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TEST_SHIFT (l.sra, 0x4c70f07c, 0xffffffff, 0x00000000)
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268 |
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269 |
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270 |
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/* ----------------------------------------------------------------------------
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271 |
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* Test of shift right arithmetic with immediate, l.srai
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* ------------------------------------------------------------------------- */
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273 |
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_srai:
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LOAD_STR (r3, "l.srai\n")
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l.jal _puts
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l.nop
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277 |
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278 |
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/* Shift right by zero. */
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279 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0000, 0xb38f0f83)
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280 |
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281 |
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/* Shift right by amounts in the 1-31 range */
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282 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0001, 0xd9c787c1)
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283 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0004, 0xfb38f0f8)
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284 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0010, 0xffffb38f)
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285 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x001f, 0xffffffff)
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286 |
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287 |
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TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0001, 0x2638783e)
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288 |
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TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0004, 0x04c70f07)
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289 |
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TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0010, 0x00004c70)
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290 |
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TEST_SHIFTI (l.srai, 0x4c70f07c, 0x001f, 0x00000000)
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291 |
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292 |
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/* Shift right by larger amounts - should be masked. */
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293 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0021, 0xd9c787c1)
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294 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0024, 0xfb38f0f8)
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295 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x0030, 0xffffb38f)
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296 |
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TEST_SHIFTI (l.srai, 0xb38f0f83, 0x003f, 0xffffffff)
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297 |
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298 |
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TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0021, 0x2638783e)
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299 |
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TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0024, 0x04c70f07)
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300 |
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TEST_SHIFTI (l.srai, 0x4c70f07c, 0x0030, 0x00004c70)
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301 |
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TEST_SHIFTI (l.srai, 0x4c70f07c, 0x003f, 0x00000000)
|
302 |
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303 |
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/* ----------------------------------------------------------------------------
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304 |
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* Test of shift right logical, l.srl
|
305 |
|
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* ------------------------------------------------------------------------- */
|
306 |
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_srl:
|
307 |
|
|
LOAD_STR (r3, "l.srl\n")
|
308 |
|
|
l.jal _puts
|
309 |
|
|
l.nop
|
310 |
|
|
|
311 |
|
|
/* Shift right by zero. */
|
312 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000000, 0xb38f0f83)
|
313 |
|
|
|
314 |
|
|
/* Shift right by amounts in the 1-31 range */
|
315 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000001, 0x59c787c1)
|
316 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000004, 0x0b38f0f8)
|
317 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000010, 0x0000b38f)
|
318 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0x0000001f, 0x00000001)
|
319 |
|
|
|
320 |
|
|
TEST_SHIFT (l.srl, 0x4c70f07c, 0x00000001, 0x2638783e)
|
321 |
|
|
TEST_SHIFT (l.srl, 0x4c70f07c, 0x00000004, 0x04c70f07)
|
322 |
|
|
TEST_SHIFT (l.srl, 0x4c70f07c, 0x00000010, 0x00004c70)
|
323 |
|
|
TEST_SHIFT (l.srl, 0x4c70f07c, 0x0000001f, 0x00000000)
|
324 |
|
|
|
325 |
|
|
/* Shift right by larger amounts - should be masked. */
|
326 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0x00000021, 0x59c787c1)
|
327 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0x00002224, 0x0b38f0f8)
|
328 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0x00f789f0, 0x0000b38f)
|
329 |
|
|
TEST_SHIFT (l.srl, 0xb38f0f83, 0xffffffff, 0x00000001)
|
330 |
|
|
|
331 |
|
|
TEST_SHIFT (l.srl, 0x4c70f07c, 0x00000021, 0x2638783e)
|
332 |
|
|
TEST_SHIFT (l.srl, 0x4c70f07c, 0x00002224, 0x04c70f07)
|
333 |
|
|
TEST_SHIFT (l.srl, 0x4c70f07c, 0x00f789f0, 0x00004c70)
|
334 |
|
|
TEST_SHIFT (l.srl, 0x4c70f07c, 0xffffffff, 0x00000000)
|
335 |
|
|
|
336 |
|
|
|
337 |
|
|
/* ----------------------------------------------------------------------------
|
338 |
|
|
* Test of shift right logical with immediate, l.srli
|
339 |
|
|
* ------------------------------------------------------------------------- */
|
340 |
|
|
_srli:
|
341 |
|
|
LOAD_STR (r3, "l.srli\n")
|
342 |
|
|
l.jal _puts
|
343 |
|
|
l.nop
|
344 |
|
|
|
345 |
|
|
/* Shift right by zero. */
|
346 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0000, 0xb38f0f83)
|
347 |
|
|
|
348 |
|
|
/* Shift right by amounts in the 1-31 range */
|
349 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0001, 0x59c787c1)
|
350 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0004, 0x0b38f0f8)
|
351 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0010, 0x0000b38f)
|
352 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x001f, 0x00000001)
|
353 |
|
|
|
354 |
|
|
TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0001, 0x2638783e)
|
355 |
|
|
TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0004, 0x04c70f07)
|
356 |
|
|
TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0010, 0x00004c70)
|
357 |
|
|
TEST_SHIFTI (l.srli, 0x4c70f07c, 0x001f, 0x00000000)
|
358 |
|
|
|
359 |
|
|
/* Shift right by larger amounts - should be masked. */
|
360 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0021, 0x59c787c1)
|
361 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0024, 0x0b38f0f8)
|
362 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x0030, 0x0000b38f)
|
363 |
|
|
TEST_SHIFTI (l.srli, 0xb38f0f83, 0x003f, 0x00000001)
|
364 |
|
|
|
365 |
|
|
TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0021, 0x2638783e)
|
366 |
|
|
TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0024, 0x04c70f07)
|
367 |
|
|
TEST_SHIFTI (l.srli, 0x4c70f07c, 0x0030, 0x00004c70)
|
368 |
|
|
TEST_SHIFTI (l.srli, 0x4c70f07c, 0x003f, 0x00000000)
|
369 |
|
|
|
370 |
|
|
/* ----------------------------------------------------------------------------
|
371 |
|
|
* All done
|
372 |
|
|
* ------------------------------------------------------------------------- */
|
373 |
|
|
_exit:
|
374 |
|
|
LOAD_STR (r3, "Test completed\n")
|
375 |
|
|
l.jal _puts
|
376 |
|
|
l.nop
|
377 |
|
|
|
378 |
|
|
TEST_EXIT
|