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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [inst-set-test/] [is-xor-test.S] - Blame information for rev 382

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1 124 jeremybenn
/* is-xor-test.S. l.xor and l.xori instruction test of Or1ksim
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 *
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 * Copyright (C) 1999-2006 OpenCores
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 * Copyright (C) 2010 Embecosm Limited
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 *
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 * Contributors various OpenCores participants
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 * Contributor Jeremy Bennett 
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 *
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 * This file is part of OpenRISC 1000 Architectural Simulator.
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License as published by the Free
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 * Software Foundation; either version 3 of the License, or (at your option)
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 * any later version.
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 *
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 * This program is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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 * more details.
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 *
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 * You should have received a copy of the GNU General Public License along
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 * with this program.  If not, see .
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 */
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/* ----------------------------------------------------------------------------
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 * Coding conventions are described in inst-set-test.S
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 * ------------------------------------------------------------------------- */
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/* ----------------------------------------------------------------------------
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 * Test coverage
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 *
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 * The l.xor and l.xori instructions should never set the carry and overflow
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 * flags.
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 *
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 * Problems in this area were reported in Bugs 1782, 1783 and 1784. Having
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 * fixed the problem, this is (in good software engineering style), a
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 * regression test to go with the fix.
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 *
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 * This is not a comprehensive test of any instruction (yet).
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 *
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 * Of course what is really needed is a comprehensive instruction test...
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 * ------------------------------------------------------------------------- */
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#include "inst-set-test.h"
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/* A macro to sign extend a 16-bit value */
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#define SE(v) (v | ((v & 0x8000) <<  1) | \
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                   ((v & 0x8000) <<  2) | \
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                   ((v & 0x8000) <<  3) | \
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                   ((v & 0x8000) <<  4) | \
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                   ((v & 0x8000) <<  5) | \
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                   ((v & 0x8000) <<  6) | \
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                   ((v & 0x8000) <<  7) | \
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                   ((v & 0x8000) <<  8) | \
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                   ((v & 0x8000) <<  9) | \
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                   ((v & 0x8000) << 10) | \
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                   ((v & 0x8000) << 11) | \
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                   ((v & 0x8000) << 12) | \
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                   ((v & 0x8000) << 13) | \
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                   ((v & 0x8000) << 14) | \
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                   ((v & 0x8000) << 15) | \
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                   ((v & 0x8000) << 16) )
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/* ----------------------------------------------------------------------------
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 * A macro to carry out a test of bitwise XOR in registers
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 *
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 * This opcode should never set the flags. Result is compared with the native
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 * computed value.
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 *
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 * Arguments
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 *   op1:       First operand value
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 *   op2:       Second operand value
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 * ------------------------------------------------------------------------- */
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#define TEST_XOR(op1, op2)                                               \
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        l.mfspr r3,r0,SPR_SR            /* Clear flags */               ;\
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        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))                       ;\
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        l.and   r3,r3,r2                                                ;\
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        l.mtspr r0,r3,SPR_SR                                            ;\
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                                                                        ;\
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        LOAD_CONST (r5,op1)             /* Load operands */             ;\
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        LOAD_CONST (r6,op2)                                             ;\
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        l.mtspr r0,r0,SPR_EPCR_BASE     /* Clear record */              ;\
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50:     l.xor   r4,r5,r6                                                ;\
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        l.mfspr r2,r0,SPR_SR            /* So we can examine flags */   ;\
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        l.mfspr r5,r0,SPR_EPCR_BASE     /* What triggered exception */  ;\
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        PUSH (r5)                       /* Save EPCR for later */       ;\
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        PUSH (r2)                       /* Save SR for later */         ;\
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        PUSH (r4)                       /* Save result for later */     ;\
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                                                                        ;\
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        PUTS ("  0x")                                                   ;\
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        PUTH (op1)                                                      ;\
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        PUTS (" ^ 0x")                                                  ;\
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        PUTH (op2)                                                      ;\
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        PUTS (" = 0x")                                                  ;\
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        PUTH (op1 ^ op2)                                                ;\
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        PUTS (": ")                                                     ;\
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        POP (r4)                                                        ;\
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        CHECK_RES1 (r4, op1 ^ op2)                                      ;\
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                                                                        ;\
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        POP(r2)                         /* Retrieve SR */               ;\
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        PUSH(r2)                                                        ;\
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        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */             ;\
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        l.and   r2,r2,r4                                                ;\
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        l.sfeq  r2,r4                                                   ;\
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        CHECK_FLAG ("- carry flag set:      ", FALSE)                   ;\
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                                                                        ;\
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        POP(r2)                         /* Retrieve SR */               ;\
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        LOAD_CONST (r4, SPR_SR_OV)      /* The overflow bit */          ;\
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        l.and   r2,r2,r4                                                ;\
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        l.sfeq  r2,r4                                                   ;\
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        CHECK_FLAG ("- overflow flag set:   ", FALSE)                   ;\
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                                                                        ;\
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        POP (r2)                        /* Retrieve EPCR */             ;\
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        LOAD_CONST (r4, 50b)            /* The opcode of interest */    ;\
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        l.and   r2,r2,r4                                                ;\
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        l.sfeq  r2,r4                                                   ;\
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        l.bnf   51f                                                     ;\
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                                                                        ;\
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        PUTS ("  - exception triggered: TRUE\n")                        ;\
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        l.j     52f                                                     ;\
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        l.nop                                                           ;\
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                                                                        ;\
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51:     PUTS ("  - exception triggered: FALSE\n")                       ;\
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52:
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/* ----------------------------------------------------------------------------
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 * A macro to carry out a test of bitwise XOR with an immediate operand
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 *
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 * This opcode should never set the flags. Result is compared with the native
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 * computed value. Note that the OR1K architecture specfies that the immediate
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 * operand is sign-extended, not zero-extended.
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 *
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 * Arguments
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 *   op1:       First operand value
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 *   op2:       Second operand value
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 * ------------------------------------------------------------------------- */
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#define TEST_XORI(op1, op2)                                              \
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        l.mfspr r3,r0,SPR_SR            /* Clear flags */               ;\
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        LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV))                       ;\
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        l.and   r3,r3,r2                                                ;\
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        l.mtspr r0,r3,SPR_SR                                            ;\
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                                                                        ;\
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        LOAD_CONST (r5,op1)             /* Load operands */             ;\
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        l.mtspr r0,r0,SPR_EPCR_BASE     /* Clear record */              ;\
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53:     l.xori  r4,r5,op2                                               ;\
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        l.mfspr r2,r0,SPR_SR            /* So we can examine flags */   ;\
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        l.mfspr r5,r0,SPR_EPCR_BASE     /* What triggered exception */  ;\
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        PUSH (r5)                       /* Save EPCR for later */       ;\
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        PUSH (r2)                       /* Save SR for later */         ;\
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        PUSH (r4)                       /* Save result for later */     ;\
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                                                                        ;\
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        PUTS ("  0x")                                                   ;\
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        PUTH (op1)                                                      ;\
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        PUTS (" ^ 0x")                                                  ;\
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        PUTHH (op2)                                                     ;\
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        PUTS (" = 0x")                                                  ;\
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        PUTH (op1 ^ SE (op2))                                           ;\
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        PUTS (": ")                                                     ;\
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        POP (r4)                                                        ;\
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        CHECK_RES1 (r4, op1 ^ SE (op2))                                 ;\
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                                                                        ;\
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        POP(r2)                         /* Retrieve SR */               ;\
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        PUSH(r2)                                                        ;\
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        LOAD_CONST (r4, SPR_SR_CY)      /* The carry bit */             ;\
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        l.and   r2,r2,r4                                                ;\
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        l.sfeq  r2,r4                                                   ;\
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        CHECK_FLAG ("- carry flag set:      ", FALSE)                   ;\
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                                                                        ;\
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        POP(r2)                         /* Retrieve SR */               ;\
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        LOAD_CONST (r4, SPR_SR_OV)      /* The overflow bit */          ;\
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        l.and   r2,r2,r4                                                ;\
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        l.sfeq  r2,r4                                                   ;\
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        CHECK_FLAG ("- overflow flag set:   ", FALSE)                   ;\
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                                                                        ;\
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        POP (r2)                        /* Retrieve EPCR */             ;\
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        LOAD_CONST (r4, 53b)            /* The opcode of interest */    ;\
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        l.and   r2,r2,r4                                                ;\
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        l.sfeq  r2,r4                                                   ;\
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        l.bnf   54f                                                     ;\
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                                                                        ;\
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        PUTS ("  - exception triggered: TRUE\n")                        ;\
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        l.j     55f                                                     ;\
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        l.nop                                                           ;\
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                                                                        ;\
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54:     PUTS ("  - exception triggered: FALSE\n")                       ;\
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55:
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/* ----------------------------------------------------------------------------
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 * Start of code
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 * ------------------------------------------------------------------------- */
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        .section .text
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        .global _start
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_start:
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        /* Always set OVE. We should never trigger an exception, even if this
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           bit is set. */
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        l.mfspr r3,r0,SPR_SR
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        LOAD_CONST (r2, SPR_SR_OVE)     /* Set OVE */
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        l.or    r3,r3,r2
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        l.mtspr r0,r3,SPR_SR
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        LOAD_STR (r3, "  ** OVE flag set **\n")
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        l.jal   _puts
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        l.nop
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/* ----------------------------------------------------------------------------
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 * Test of xor, l.xor
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 * ------------------------------------------------------------------------- */
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_xor:
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        LOAD_STR (r3, "l.xor\n")
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        l.jal   _puts
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        l.nop
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        /* Test a range of operands */
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        TEST_XOR (0x00000000, 0x00000000)
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        TEST_XOR (0xffffffff, 0xffffffff)
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        TEST_XOR (0xaaaaaaaa, 0x00000000)
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        TEST_XOR (0xaaaaaaaa, 0xaaaaaaaa)
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        TEST_XOR (0x55555555, 0x00000000)
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        TEST_XOR (0x55555555, 0x55555555)
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        TEST_XOR (0xaaaaaaaa, 0x55555555)
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        TEST_XOR (0x4c70f07c, 0xb38f0f83)
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        TEST_XOR (0x4c70f07c, 0xc4c70f07)
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        TEST_XOR (0xb38f0f83, 0x38f0f83b)
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/* ----------------------------------------------------------------------------
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 * Test of xor with immediate half word, l.xori
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 * ------------------------------------------------------------------------- */
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_xori:
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        LOAD_STR (r3, "l.xori\n")
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        l.jal   _puts
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        l.nop
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        /* Test a range of operands */
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        TEST_XORI (0x00000000, 0x0000)
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        TEST_XORI (0xffffffff, 0xffff)
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        TEST_XORI (0xaaaaaaaa, 0x0000)
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        TEST_XORI (0xaaaaaaaa, 0xaaaa)
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        TEST_XORI (0x55555555, 0x0000)
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        TEST_XORI (0x55555555, 0x5555)
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        TEST_XORI (0xaaaaaaaa, 0x5555)
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        TEST_XORI (0x4c70f07c, 0x0f83)
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        TEST_XORI (0x4c70f07c, 0x0f07)
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        TEST_XORI (0xb38f0f83, 0xf83b)
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/* ----------------------------------------------------------------------------
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 * All done
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 * ------------------------------------------------------------------------- */
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_exit:
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        LOAD_STR (r3, "Test completed\n")
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        l.jal   _puts
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        l.nop
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        TEST_EXIT

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