OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [mc-common/] [Makefile.am] - Blame information for rev 178

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 90 jeremybenn
# Makefile.am for or1ksim testsuite memory controller test library
2
 
3
# Copyright (C) Damjan Lampret  1999
4
# Copyright (C) Embecosm Limited, 2010
5
 
6
# Contributor Jeremy Bennett 
7
 
8
# This file is part of OpenRISC 1000 Architectural Simulator.
9
 
10
# This program is free software; you can redistribute it and/or modify it
11
# under the terms of the GNU General Public License as published by the Free
12
# Software Foundation; either version 3 of the License, or (at your option)
13
# any later version.
14
 
15
# This program is distributed in the hope that it will be useful, but WITHOUT
16
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17
# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
18
# more details.
19
 
20
# You should have received a copy of the GNU General Public License along
21
# with this program.  If not, see .  */
22
 
23
# -----------------------------------------------------------------------------
24
# This code is commented throughout for use with Doxygen.
25
# -----------------------------------------------------------------------------
26
 
27
 
28
# Library to support memory controller tests
29
check_LTLIBRARIES       = libmc-common.la
30
 
31
libmc_common_la_SOURCES = except-mc.S \
32
                          mc-common.c \
33
                          mc-common.h

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.