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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [mc-dram/] [mc-dram.c] - Blame information for rev 588

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1 90 jeremybenn
/* mc_dram.c - Memory Controller testbench dram test
2
 
3
   Copyright (C) 2001 Ivan Guzvinec
4
   Copyright (C) 2010 Embecosm Limited
5
 
6
   Contributor Ivan Guzvinec <ivang@opencores.org>
7
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
8
 
9
   This file is part of OpenRISC 1000 Architectural Simulator.
10
 
11
   This program is free software; you can redistribute it and/or modify it
12
   under the terms of the GNU General Public License as published by the Free
13
   Software Foundation; either version 3 of the License, or (at your option)
14
   any later version.
15
 
16
   This program is distributed in the hope that it will be useful, but WITHOUT
17
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19
   more details.
20
 
21
   You should have received a copy of the GNU General Public License along
22
   with this program.  If not, see <http:  www.gnu.org/licenses/>.  */
23
 
24
/* ----------------------------------------------------------------------------
25
   This code is commented throughout for use with Doxygen.
26
   --------------------------------------------------------------------------*/
27
 
28
#include "support.h"
29
 
30
#include "mc-common.h"
31
#include "mc-dram.h"
32
 
33
#include "config.h"
34 112 jeremybenn
#include "mc-defines.h"
35 90 jeremybenn
#include "gpio.h"
36
#include "fields.h"
37
 
38
#define T_ROW_SIZE      8
39
#define T_ROW_OFF       5
40
#define T_ROWS          25
41
#define T_GROUPS        3
42
 
43
typedef volatile unsigned long *REGISTER;
44
 
45
/*
46
unsigned long nRowSize = 0;
47
unsigned long nColumns = 0;
48
*/
49
REGISTER mc_poc        = (unsigned long*)(MC_BASE + MC_POC);
50
REGISTER mc_csr        = (unsigned long*)(MC_BASE + MC_CSR);
51
REGISTER mc_ba_mask    = (unsigned long*)(MC_BASE + MC_BA_MASK);
52
 
53
REGISTER rgpio_out     = (unsigned long*)(GPIO_BASE + RGPIO_OUT);
54
REGISTER rgpio_in      = (unsigned long*)(GPIO_BASE + RGPIO_IN);
55
 
56
unsigned long lpoc;
57
unsigned char mc_cs;
58
 
59
unsigned long set_config()
60
{
61
    REGISTER mc_csc;
62
    unsigned char ch;
63
 
64
    for (ch=0; ch<8; ch++) {
65
        if (MC_SDRAM_CSMASK & (0x01 << ch) ) {
66
            mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
67
            SET_FIELD(*mc_csc, MC_CSC, MS,  mc_sdram_cs[ch].MS);
68
            SET_FIELD(*mc_csc, MC_CSC, BW,  mc_sdram_cs[ch].BW);
69
            SET_FIELD(*mc_csc, MC_CSC, SEL, mc_sdram_cs[ch].M);
70
            SET_FLAG(*mc_csc, MC_CSC, EN);
71
            printf ("Channel Config %d - CSC = 0x%08lX\n", ch, *mc_csc);
72
        }
73
    }
74
 
75
    return 0;
76
}
77
 
78
unsigned long get_config()
79
{
80
  REGISTER mc_csc;
81
  REGISTER mc_tms;
82
  unsigned char ch;
83
 
84
  mc_cs = 0;
85
  for (ch=0; ch<8; ch++) {
86
    mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
87
    mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch));
88
    if ( (GET_FIELD(*mc_csc, MC_CSC, MEMTYPE) == 0) &&
89
         (TEST_FLAG(*mc_csc, MC_CSC, EN) == 1     ) ) {
90
      mc_sdram_cs[ch].MS = GET_FIELD(*mc_csc, MC_CSC, MS);
91
      mc_sdram_cs[ch].BW = GET_FIELD(*mc_csc, MC_CSC, BW);
92
      mc_sdram_cs[ch].M  = GET_FIELD(*mc_csc, MC_CSC, SEL);
93
      mc_cs |= (1 << ch);
94
 
95
      printf("get_config(%d) : MS=0x%0lx, BW=0x%0lx, M=0x%0lx\n", ch,
96
             mc_sdram_cs[ch].MS,
97
             mc_sdram_cs[ch].BW,
98
             mc_sdram_cs[ch].M);
99
    }
100
  }
101
  printf("get_config() : cs=0x%0x\n", mc_cs);
102
  return 0;
103
}
104
 
105
int main()
106
{
107
    unsigned long ret;
108
    unsigned char ch;
109
 
110
    unsigned long j, i;
111
    unsigned long test;
112
    unsigned long gpio_pat = 0;
113
 
114
    unsigned long nRowSize = 0;
115
    unsigned long nRows    = 0;
116
    unsigned long nRowSh   = 0;
117
    unsigned long nRowGrp  = 0;
118
 
119
    unsigned long nAddress;
120
    unsigned long mc_sel;
121
    REGISTER mc_tms;
122
    REGISTER mc_csc;
123
 
124
    printf ("Memory controller test with DRAM\n");
125
 
126
    *rgpio_out = 0xFFFFFFFF;
127
 
128
    /* set configuration */
129
    randomin(7435);
130
    lpoc = *mc_poc;
131
 
132
#ifdef MC_READ_CONF
133
    if (get_config()) {
134
      printf("Error reading MC configuration\n");
135
      report(0x00000001);
136
      return(1);
137
    }
138
#else
139
    mc_cs = MC_SDRAM_CSMASK;
140
#endif
141
 
142
    for (ch=0; ch<8; ch++) {
143
        if (mc_cs & (0x01 << ch) ) {
144
            printf ("--- Begin Test on CS%d ---\n", ch);
145
 
146
            mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
147
            mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch));
148
            mc_sel = GET_FIELD(*mc_csc, MC_CSC, SEL);
149
 
150
            SET_FIELD(*mc_tms, MC_TMS_SDRAM, OM, 0); /*normal op*/
151
            SET_FIELD(*mc_tms, MC_TMS_SDRAM, CL, 3); /*CAS*/
152
 
153
            switch ( mc_sdram_cs[ch].BW + (3 * mc_sdram_cs[ch].MS) ) {
154
            case 0:
155
            case 4:
156
                nRowSize = MC_SDRAM_ROWSIZE_0;
157
                nRows    = MC_SDRAM_ROWS_0;
158
                nRowSh   = MC_SDRAM_ROWSH_0; break;
159
            case 1:
160
            case 5:
161
                nRowSize = MC_SDRAM_ROWSIZE_1;
162
                nRows    = MC_SDRAM_ROWS_1;
163
                nRowSh   = MC_SDRAM_ROWSH_1; break;
164
            case 2:
165
                nRowSize = MC_SDRAM_ROWSIZE_2;
166
                nRows    = MC_SDRAM_ROWS_2;
167
                nRowSh   = MC_SDRAM_ROWSH_2;  break;
168
            case 3:
169
                nRowSize = MC_SDRAM_ROWSIZE_3;
170
                nRows    = MC_SDRAM_ROWS_3;
171
                nRowSh   = MC_SDRAM_ROWSH_3; break;
172
            case 6:
173
                nRowSize = MC_SDRAM_ROWSIZE_6;
174
                nRows    = MC_SDRAM_ROWS_6;
175
                nRowSh   = MC_SDRAM_ROWSH_6; break;
176
            case 7:
177
                nRowSize = MC_SDRAM_ROWSIZE_7;
178
                nRows    = MC_SDRAM_ROWS_7;
179
                nRowSh   = MC_SDRAM_ROWSH_7; break;
180
            case 8:
181
                nRowSize = MC_SDRAM_ROWSIZE_8;
182
                nRows    = MC_SDRAM_ROWS_8;
183
                nRowSh   = MC_SDRAM_ROWSH_8; break;
184
            }
185
 
186
            printf ("CS configuration : CSC - 0x%08lX, TMS - 0x%08lX, rs = %lu, nr = %lu, sh = %lu, sel = %lu\n",
187
                    *mc_csc, *mc_tms, nRowSize, nRows, nRowSh, mc_sel);
188
 
189
            /*nRows -= MC_SDRAM_ROW_OFF;*/
190
            for (test=0; test<16; test++) {
191
                /* configure MC*/
192
                CLEAR_FLAG(*mc_csc, MC_CSC, PEN); /* no parity */
193
                CLEAR_FLAG(*mc_csc, MC_CSC, KRO); /* close row */
194
                CLEAR_FLAG(*mc_csc, MC_CSC, BAS); /* bank after column */
195
                CLEAR_FLAG(*mc_csc, MC_CSC, WP);  /* write enable */
196
                SET_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* single loc access */
197
                CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* sequential burst */
198
                SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 0); /* 1 */
199
                switch (test) {
200
                case 0:
201
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST0) != MC_SDRAM_TEST0)
202
                        continue;
203
                    break;
204
                case 1:
205
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST1) != MC_SDRAM_TEST1)
206
                        continue;
207
                    SET_FLAG(*mc_csc, MC_CSC, PEN); /* parity */
208
                    break;
209
                case 2:
210
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST2) != MC_SDRAM_TEST2)
211
                        continue;
212
                    SET_FLAG(*mc_csc, MC_CSC, KRO); /* keep row */
213
                    break;
214
                case 3:
215
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST3) != MC_SDRAM_TEST3)
216
                        continue;
217
                    SET_FLAG(*mc_csc, MC_CSC, BAS); /* bank after row*/
218
                    break;
219
                case 4:
220
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST4) != MC_SDRAM_TEST4)
221
                        continue;
222
                    SET_FLAG(*mc_csc, MC_CSC, WP);  /* RO */
223
                    break;
224
                case 5:
225
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST5) != MC_SDRAM_TEST5)
226
                        continue;
227
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
228
                    break;
229
                case 6:
230
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST6) != MC_SDRAM_TEST6)
231
                        continue;
232
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
233
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
234
                    break;
235
                case 7:
236
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST7) != MC_SDRAM_TEST7)
237
                        continue;
238
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
239
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 2); /* 4 */
240
                    break;
241
                case 8:
242
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST8) != MC_SDRAM_TEST8)
243
                        continue;
244
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
245
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 3); /* 8 */
246
                    break;
247
                case 9:
248
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST9) != MC_SDRAM_TEST9)
249
                        continue;
250
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
251
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 7); /* full page */
252
                    break;
253
                case 10:
254
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST10) != MC_SDRAM_TEST10)
255
                        continue;
256
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
257
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
258
                    break;
259
                case 11:
260
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST11) != MC_SDRAM_TEST11)
261
                        continue;
262
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
263
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
264
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
265
                    break;
266
                case 12:
267
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST12) != MC_SDRAM_TEST12)
268
                        continue;
269
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
270
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
271
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 2); /* 4 */
272
                    break;
273
                case 13:
274
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST13) != MC_SDRAM_TEST13)
275
                        continue;
276
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
277
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
278
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 3); /* 8 */
279
                    break;
280
                case 14:
281
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST14) != MC_SDRAM_TEST14)
282
                        continue;
283
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
284
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
285
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 7); /* fullrow */
286
                    break;
287
                case 15:
288
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST15) != MC_SDRAM_TEST15)
289
                        continue;
290
                    SET_FLAG(*mc_csc, MC_CSC, KRO);  /* keep row */
291
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
292
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
293
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
294
                    break;
295
                } /*switch test*/
296
 
297
                printf ("Begin TEST %lu : CSC - 0x%08lX, TMS - 0x%08lX\n", test, *mc_csc, *mc_tms);
298
 
299
                if (MC_SDRAM_ACC & MC_SDRAM_SROW) {
300
                    /* perform sequential row access */
301
                    printf("Seuential Row\n");
302
                    for (j=0; j<T_ROWS; j++) {
303
                        nAddress  = mc_sel << 21;
304
                        nAddress |= MC_MEM_BASE;
305
                        nAddress += ( (j + T_ROW_OFF) << nRowSh);
306
 
307
                        gpio_pat ^= 0x00000008;
308
                        *rgpio_out = gpio_pat;
309
                        ret = mc_test_row(nAddress, nAddress + T_ROW_SIZE, MC_SDRAM_FLAGS);
310
 
311
                        printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
312
 
313
                        if (ret) {
314
                            gpio_pat ^= 0x00000080;
315
                            *rgpio_out = gpio_pat;
316
                            report(ret);
317
                            return ret;
318
                        }
319
                    }
320
                }
321
 
322
                if (MC_SDRAM_ACC & MC_SDRAM_RROW) {
323
                    /* perform random row access */
324
                    printf("Random Row\n");
325
                    for (j=0; j<T_ROWS; j++) {
326
                        nAddress = mc_sel << 21;
327
                        nAddress |= MC_MEM_BASE;
328
                        nAddress += ( (T_ROW_OFF + random(nRows)) << nRowSh);
329
 
330
                        gpio_pat ^= 0x00000008;
331
                        *rgpio_out = gpio_pat;
332
                        ret = mc_test_row(nAddress, nAddress + T_ROW_SIZE, MC_SDRAM_FLAGS);
333
 
334
                        printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
335
 
336
                        if (ret) {
337
                            gpio_pat ^= 0x00000080;
338
                            *rgpio_out = gpio_pat;
339
                            report(ret);
340
                            return ret;
341
                        }
342
                    }
343
                }
344
 
345
                if (MC_SDRAM_ACC & MC_SDRAM_SGRP) {
346
                    /* perform sequential row in group access */
347
                    printf("Sequential Group ");
348
 
349
                    printf("Group Size = %d\n", MC_SDRAM_GROUPSIZE);
350
                    for (i=0; i<T_GROUPS; i++) {
351
                        nRowGrp = random(nRows - MC_SDRAM_GROUPSIZE) + T_ROW_OFF;
352
                        for (j=0; j<MC_SDRAM_GROUPSIZE; j++) {
353
                            nAddress = mc_sel << 21;
354
                            nAddress |= MC_MEM_BASE;
355
                            nAddress += ((nRowGrp+j) << nRowSh);
356
 
357
                            gpio_pat ^= 0x00000008;
358
                            *rgpio_out = gpio_pat;
359
                            ret = mc_test_row(nAddress, nAddress + T_ROW_SIZE, MC_SDRAM_FLAGS);
360
 
361
                            printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
362
 
363
                            if (ret) {
364
                                gpio_pat ^= 0x00000080;
365
                                *rgpio_out = gpio_pat;
366
                                report(ret);
367
                                return ret;
368
                            }
369
                        }
370
                    }
371
                }
372
 
373
                if (MC_SDRAM_ACC & MC_SDRAM_RGRP) {
374
                    /* perform random row in group access */
375
                    printf("Random Group ");
376
 
377
                    printf("Group Size = %d\n", MC_SDRAM_GROUPSIZE);
378
                    for (i=0; i<T_GROUPS; i++) {
379
                        nRowGrp = random(nRows - T_GROUPS) + T_ROW_OFF;
380
                        for (j=0; j<MC_SDRAM_GROUPSIZE; j++) {
381
                            nAddress = mc_sel << 21;
382
                            nAddress |= MC_MEM_BASE;
383
                            nAddress += ((nRowGrp + random(MC_SDRAM_GROUPSIZE)) << nRowSh);
384
 
385
                            gpio_pat ^= 0x00000008;
386
                            *rgpio_out = gpio_pat;
387
                            ret = mc_test_row(nAddress, nAddress + T_ROW_SIZE, MC_SDRAM_FLAGS);
388
 
389
                            printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
390
 
391
                            if (ret) {
392
                                gpio_pat ^= 0x00000080;
393
                                *rgpio_out = gpio_pat;
394
                                report(ret);
395
                                return ret;
396
                            }
397
                        }
398
                    }
399
                } /*for groups*/
400
 
401
            } /*for test*/
402
        } /*if*/
403
    } /*for CS*/
404
    printf("--- End SDRAM tests ---\n");
405
    report(0xDEADDEAD);
406
 
407
    gpio_pat ^= 0x00000020;
408
    *rgpio_out = gpio_pat;
409
 
410
    return 0;
411
} /* main */

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