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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [testfloat/] [systflags.c] - Blame information for rev 352

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1 234 jeremybenn
 
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/*
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===============================================================================
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This C source file is part of TestFloat, Release 2a, a package of programs
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for testing the correctness of floating-point arithmetic complying to the
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IEC/IEEE Standard for Floating-Point.
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Written by John R. Hauser.  More information is available through the Web
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page `http://HTTP.CS.Berkeley.EDU/~jhauser/arithmetic/TestFloat.html'.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
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has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
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TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
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PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
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AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) they include prominent notice that the work is derivative, and (2) they
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include prominent notice akin to these four paragraphs for those parts of
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this code that are retained.
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Modified for use with or1ksim's testsuite.
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Contributor Julius Baxter <julius.baxter@orsoc.se>
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===============================================================================
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*/
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#include "milieu.h"
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#include "systflags.h"
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#include "spr-defs.h"
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//#include <stdio.h>
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// Float flag values, from softfloat.h
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enum {
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    float_flag_invalid   =  1,
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    float_flag_divbyzero =  4,
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    float_flag_overflow  =  8,
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    float_flag_underflow = 16,
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    float_flag_inexact   = 32
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};
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/*
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-------------------------------------------------------------------------------
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Clears the system's IEC/IEEE floating-point exception flags.  Returns the
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previous value of the flags.
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-------------------------------------------------------------------------------
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*/
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int8 syst_float_flags_clear( void )
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{
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  // Read the FPCSR
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  unsigned int spr = SPR_FPCSR;
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  unsigned int value;
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  int8 flags = 0;
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  // Read the SPR
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  asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));
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  // Extract the flags from OR1K's FPCSR, put into testfloat's flags format  
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  if (value & SPR_FPCSR_IXF)
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    flags |= float_flag_inexact;
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  if (value & SPR_FPCSR_UNF)
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    flags |= float_flag_underflow;
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  if (value & SPR_FPCSR_OVF)
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    flags |= float_flag_overflow;
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  if (value & SPR_FPCSR_DZF)
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    flags |= float_flag_divbyzero;
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  if (value & SPR_FPCSR_IVF)
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    flags |= float_flag_invalid;
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  //  printf("testfloat: getting flags, FPCSR: 0x%x, softfloatflags: 0x%x\n", 
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  //         value & SPR_FPCSR_ALLF, flags);
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  // Clear flags in FPCSR
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  value &= ~(SPR_FPCSR_ALLF);
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  // Write value back to FPCSR
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  asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));
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  return flags;
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}
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