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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [testfloat/] [systmodes.c] - Blame information for rev 352

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1 234 jeremybenn
 
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/*
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===============================================================================
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This C source file is part of TestFloat, Release 2a, a package of programs
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for testing the correctness of floating-point arithmetic complying to the
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IEC/IEEE Standard for Floating-Point.
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Written by John R. Hauser.  More information is available through the Web
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page `http://HTTP.CS.Berkeley.EDU/~jhauser/arithmetic/TestFloat.html'.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
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has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
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TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
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PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
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AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) they include prominent notice that the work is derivative, and (2) they
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include prominent notice akin to these four paragraphs for those parts of
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this code that are retained.
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Modified for use with or1ksim's testsuite.
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Contributor Julius Baxter <julius.baxter@orsoc.se>
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===============================================================================
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*/
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#include "milieu.h"
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#include "systmodes.h"
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#include "spr-defs.h"
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// Rounding modes as used by softfloat, we use them here to
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enum {
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    float_round_nearest_even = 0,
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    float_round_down         = 1,
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    float_round_up           = 2,
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    float_round_to_zero      = 3
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};
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/*
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-------------------------------------------------------------------------------
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Sets the system's IEC/IEEE floating-point rounding mode.  Also disables all
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system exception traps.
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-------------------------------------------------------------------------------
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*/
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void syst_float_set_rounding_mode( int8 roundingMode )
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{
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  // Read the FPCSR
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  unsigned int spr = SPR_FPCSR;
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  unsigned int value;
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  // Read the SPR
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  asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));
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  // Clear the current rounding mode
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  value &= ~SPR_FPCSR_RM;
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  // Extract the flags from OR1K's FPCSR, put into testfloat's flags format  
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  switch(roundingMode)
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    {
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    case float_round_nearest_even:
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      value |= FPCSR_RM_RN;
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      break;
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    case float_round_down:
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      value |= FPCSR_RM_RIN;
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      break;
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    case float_round_up:
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      value |= FPCSR_RM_RIP;
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      break;
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    case float_round_to_zero:
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      value |= FPCSR_RM_RZ;
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      break;
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    default:
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      //printf("%s: Unknown rounding mode: 0x%x\n",__FUNCTION__,roundingMode);
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      // error!
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      break;
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    }
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  // Disable FPEE
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  value &= ~SPR_FPCSR_FPEE;
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  // Write value back to FPCSR
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  asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));
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}
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/*
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-------------------------------------------------------------------------------
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Sets the rounding precision of subsequent extended double-precision
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operations.  The `precision' argument should be one of 0, 32, 64, or 80.
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If `precision' is 32, the rounding precision is set equivalent to single
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precision; else if `precision' is 64, the rounding precision is set
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equivalent to double precision; else the rounding precision is set to full
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extended double precision.
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-------------------------------------------------------------------------------
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*/
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void syst_float_set_rounding_precision( int8 precision )
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{
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  //!!!code (possibly empty)
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  // Yes empty for OR1K 32-bit implementation - have no choice of rounding
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  // precision.
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  return;
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}
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