OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [uos/] [README] - Blame information for rev 508

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 90 jeremybenn
                       Or1ksim Test Suite: uOS Micro OS
2
                       ================================
3
 
4
This is the Micro OS (uOS) developed by Damjan Lampret. At present the code
5
builds, but there is no suitable Or1ksim configuration.
6
 
7
Jeremy Bennett
8
19 April 2010
9
 
10
 
11
ORIGINAL README
12
===============
13
 
14
This is the Micro OS (uOS) for testing operating system features of OpenRISC
15
1000 architecture. Specifically non reentrant, preemptive multitasking
16
microkernel. Purpose of this code is not to be a true operating system but
17
merely a testbench for testing the architecture, or1ksim and software
18
development tools (GCC, Binutils, ...).
19
 
20
This test OS has all necessary exception handlers to handle exceptions. There
21
are two tasks: one task generates data and passes that data via IPC to the
22
second task. Second task outputs the data via or1ksim syscall to the
23
simulator.
24
 
25
Currently only OR32 is supported (exception handlers are written in
26
assembly). Tools required to compile sources are the latest or32-coff-gcc,
27
or32-coff-as and or32-coff-ld. Also make sure you undefine
28
VIRTUAL_MACHINE_ONLY when compiling or1ksim.
29
 
30
--
31
10/Jun/2000, Damjan Lampret, lampret@opencores.org

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.