OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [uos/] [tick.c] - Blame information for rev 146

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 90 jeremybenn
/* tick.c.  Microkernel tick handler for Or1ksim
2
 
3
   Copyright (C) 2000 Damjan Lampret
4
   Copyright (C) 2010 Embecosm Limited
5
 
6
   Contributor Damjan Lampret <lampret@opencores.org>
7
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
8
 
9
   This file is part of OpenRISC 1000 Architectural Simulator.
10
 
11
   This program is free software; you can redistribute it and/or modify it
12
   under the terms of the GNU General Public License as published by the Free
13
   Software Foundation; either version 3 of the License, or (at your option)
14
   any later version.
15
 
16
   This program is distributed in the hope that it will be useful, but WITHOUT
17
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19
   more details.
20
 
21
   You should have received a copy of the GNU General Public License along
22
   with this program.  If not, see <http:  www.gnu.org/licenses/>.  */
23
 
24
/* ----------------------------------------------------------------------------
25
   This code is commented throughout for use with Doxygen.
26
   --------------------------------------------------------------------------*/
27
 
28
/* This file is part of test microkernel for OpenRISC 1000. */
29
 
30
#include "spr-defs.h"
31
#include "support.h"
32
 
33
/* Tick timer period */
34
unsigned long tick_period;
35
 
36
/* Inform of tick interrupt */
37
void (*tick_inf)();
38
 
39
/* Tick interrupt routine */
40
void tick_int()
41
{
42
  /* Call inf routine */
43
  (*tick_inf)();
44
 
45
  /* Set new counter period iand clear inet pending bit */
46
        mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_PERIOD));
47
}
48
 
49
/* Initialize routine */
50
int tick_init(unsigned long period, void (* inf)())
51
{
52
  /* Save tick timer period and inform routine */
53
  tick_period = period;
54
  tick_inf = inf;
55
 
56
  /* Set counter period, enable timer and interrupt */
57
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD));
58
 
59
  return 0;
60
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.