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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [include/] [JtagDriverSC.h] - Blame information for rev 189

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1 63 julius
// ----------------------------------------------------------------------------
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// SystemC JTAG driver header
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// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
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// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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// This file is part of the cycle accurate model of the OpenRISC 1000 based
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// system-on-chip, ORPSoC, built using Verilator.
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// This program is free software: you can redistribute it and/or modify it
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// under the terms of the GNU Lesser General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or (at your
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// option) any later version.
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
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// License for more details.
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// You should have received a copy of the GNU Lesser General Public License
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// along with this program.  If not, see <http://www.gnu.org/licenses/>.
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// ----------------------------------------------------------------------------
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// $Id: JtagDriverSC.h 317 2009-02-22 19:52:12Z jeremy $
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#ifndef JTAG_DRIVER_SC__H
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#define JTAG_DRIVER_SC__H
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#include <stdint.h>
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#include "systemc"
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#include "JtagSC_includes.h"
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//! Module providing TAP requests to JTAG
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//! Provides a queue of requests to the JTAG interface. Requests are at the
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//! level of TAP actions for reset, DR-Scan or IR-Scan.
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class JtagDriverSC
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  : public sc_core::sc_module
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{
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public:
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  // Constructor
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  JtagDriverSC (sc_core::sc_module_name        name,
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                sc_core::sc_fifo<TapAction *> *_tapActionQueue);
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private:
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  // JTAG instructions
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  static const uint32_t  CHAIN_SELECT_IR = 0x3;  //!< Chain Select instruction
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  static const uint32_t  DEBUG_IR        = 0x8;  //!< Debug instruction
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  // JTAG register lengths (excluding CRC)
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  static const int  JTAG_IR_LEN       =  4;     //!< JTAG instr reg length
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  static const int  CHAIN_DR_LEN      =  4;     //!< Length of DR (excl CRC)
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  static const int  RISC_DEBUG_DR_LEN = 65;     //!< Length of DR (excl CRC)
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  static const int  REGISTER_DR_LEN   = 38;     //!< Length of DR (excl CRC)
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  static const int  WISHBONE_DR_LEN   = 65;     //!< Length of DR (excl CRC)
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  // JTAG register address masks
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  static const uint32_t  RISC_DEBUG_ADDR_MASK = 0xffffffff;  //!< Mask for addr
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  static const uint32_t  REGISTER_ADDR_MASK   = 0x0000001f;  //!< Mask for addr
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  static const uint32_t  WISHBONE_ADDR_MASK   = 0xffffffff;  //!< Mask for addr
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  // JTAG register R/W bit
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  static const uint64_t  RISC_DEBUG_RW = 0x100000000ULL;  //!< R/W bit mask
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  static const uint64_t  REGISTER_RW   = 0x000000020ULL;  //!< R/W bit mask
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  static const uint64_t  WISHBONE_RW   = 0x100000000ULL;  //!< R/W bit mask
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  // JTAG register data field offsets
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  static const int  RISC_DEBUG_DATA_OFF = 33;   //!< Offset to data field
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  static const int  REGISTER_DATA_OFF   =  6;  //!< Offset to data field
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  static const int  WISHBONE_DATA_OFF   = 33;  //!< Offset to data field
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  //! JTAG register data field sizes (all the same)
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  static const int  DR_DATA_LEN = 32;
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  //! CRC length
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  static const int  CRC_LEN = 8;
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  // OpenRISC 1000 scan chains
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  static const int  OR1K_SC_UNDEF      = -1;    //!< Undefined OR1K scan chain
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  static const int  OR1K_SC_RISC_DEBUG =  1;    //!< for access to SPRs
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  static const int  OR1K_SC_REGISTER   =  4;    //!< to stall/reset CPU
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  static const int  OR1K_SC_WISHBONE   =  5;    //!< for memory access
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  //! Register addresses for the REGISTER scan chain
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  static const uint8_t  OR1K_RSC_RISCOP = 0x04; //!< Used to reset/stall CPU
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  // Bits for the RISCOP register
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  static const uint32_t  RISCOP_STALL = 0x00000001;     //!< Stall the CPU
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  static const uint32_t  RISCOP_RESET = 0x00000002;     //!< Reset the CPU
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  //! The JTAG fifo we queue on
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  sc_core::sc_fifo<TapAction *> *tapActionQueue;
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  //! The currently selected scan chain
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  int  currentScanChain;
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  // SystemC thread to queue actions
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  void  queueActions ();
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  // Or1k JTAG actions
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  void      reset ();
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  void      selectChain (int chain);
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  uint32_t  readReg (uint32_t  addr);
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  uint32_t  readReg1 (uint32_t   addr,
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                      int        bitSizeNoCrc);
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  uint32_t  readReg1 (uint64_t  *dRegArray,
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                      uint32_t   addr,
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                      int        bitSizeNoCrc);
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  void      writeReg (uint32_t  addr,
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                      uint32_t  data);
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  // Utilities to compute CRC-8 the OpenRISC way. Versions for "big" and
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  // "small" numbers.
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  uint8_t  crc8 (uint64_t  data,
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                 int       size);
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  uint8_t  crc8 (uint64_t *dataArray,
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                 int       size);
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  // Utilities to insert and extract bit strings from vectors
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  void  insertBits (uint64_t  str,
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                    int       strLen,
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                    uint64_t *array,
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                    int       startBit);
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  uint64_t extractBits (uint64_t *array,
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                        int       startBit,
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                        int       strLen);
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};      // JtagDriverSC ()
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#endif  // JTAG_DRIVER_SC__H

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