| 1 | 63 | julius | // ----------------------------------------------------------------------------
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         | 2 |  |  |  
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         | 3 |  |  | // SystemC JTAG driver
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         | 4 |  |  |  
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         | 5 |  |  | // Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
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         | 6 |  |  |  
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         | 7 |  |  | // Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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         | 8 |  |  |  
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         | 9 |  |  | // This file is part of the cycle accurate model of the OpenRISC 1000 based
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         | 10 |  |  | // system-on-chip, ORPSoC, built using Verilator.
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         | 11 |  |  |  
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         | 12 |  |  | // This program is free software: you can redistribute it and/or modify it
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         | 13 |  |  | // under the terms of the GNU Lesser General Public License as published by
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         | 14 |  |  | // the Free Software Foundation, either version 3 of the License, or (at your
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         | 15 |  |  | // option) any later version.
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         | 16 |  |  |  
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         | 17 |  |  | // This program is distributed in the hope that it will be useful, but WITHOUT
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         | 18 |  |  | // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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         | 19 |  |  | // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
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         | 20 |  |  | // License for more details.
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         | 21 |  |  |  
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         | 22 |  |  | // You should have received a copy of the GNU Lesser General Public License
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         | 23 |  |  | // along with this program.  If not, see <http://www.gnu.org/licenses/>.
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         | 24 |  |  |  
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         | 25 |  |  | // ----------------------------------------------------------------------------
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         | 26 |  |  |  
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         | 27 |  |  | // $Id: JtagDriverSC.cpp 317 2009-02-22 19:52:12Z jeremy $
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         | 28 |  |  |  
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         | 29 |  |  | #include <iostream>
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         | 30 |  |  | #include <iomanip>
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         | 31 |  |  |  
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         | 32 |  |  | #include "JtagDriverSC.h"
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         | 33 |  |  |  
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         | 34 |  |  |  
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         | 35 |  |  | SC_HAS_PROCESS (JtagDriverSC);
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         | 36 |  |  |  
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         | 37 |  |  | //! Constructor for the JTAG driver.
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         | 38 |  |  |  
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         | 39 |  |  | //! We create a SC_THREAD in which we can spit out some actions. Must be a
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         | 40 |  |  | //! thread, since we need to wait for the actions to complete.
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         | 41 |  |  |  
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         | 42 |  |  | //! @param[in] name             Name of this module, passed to the parent
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         | 43 |  |  | //!                             constructor. 
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         | 44 |  |  | //! @param[in] _tapActionQueue  Pointer to fifo of actions to perform
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         | 45 |  |  |  
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         | 46 |  |  | JtagDriverSC::JtagDriverSC (sc_core::sc_module_name        name,
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         | 47 |  |  |                             sc_core::sc_fifo<TapAction *> *_tapActionQueue) :
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         | 48 |  |  |   sc_module (name),
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         | 49 |  |  |   tapActionQueue (_tapActionQueue),
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         | 50 |  |  |   currentScanChain (OR1K_SC_UNDEF)
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         | 51 |  |  | {
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         | 52 |  |  |   SC_THREAD (queueActions);
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         | 53 |  |  |  
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         | 54 |  |  | }       // JtagDriverSC ()
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         | 55 |  |  |  
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         | 56 |  |  |  
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         | 57 |  |  | //! SystemC thread to queue some actions
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         | 58 |  |  |  
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         | 59 |  |  | //! Have to use a thread, since we will end up waiting for actions to
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         | 60 |  |  | //! complete.
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         | 61 |  |  |  
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         | 62 |  |  | void
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         | 63 |  |  | JtagDriverSC::queueActions ()
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         | 64 |  |  | {
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         | 65 |  |  |   uint32_t res;                 // General result variable
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         | 66 |  |  |  
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         | 67 |  |  |   // Reset the JTAG
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         | 68 |  |  |   reset ();
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         | 69 |  |  |  
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         | 70 |  |  |   // Select the register scan chain to stall the processor, stall the
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         | 71 |  |  |   // processor and check it has stalled
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         | 72 |  |  |   selectChain (OR1K_SC_REGISTER);
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         | 73 |  |  |   writeReg (OR1K_RSC_RISCOP, RISCOP_STALL);
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         | 74 |  |  |  
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         | 75 |  |  |   do
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         | 76 |  |  |     {
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         | 77 |  |  |       res = readReg (OR1K_RSC_RISCOP);
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         | 78 |  |  |       std::cout << sc_core::sc_time_stamp ().to_seconds () * 1000000
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         | 79 |  |  |                 << "us: RISCOP = " << std::hex << res << std::endl;
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         | 80 |  |  |     }
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         | 81 |  |  |   while ((res & RISCOP_STALL) != RISCOP_STALL);
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         | 82 |  |  |  
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         | 83 |  |  |   // Write the NPC SPR. Select the RISC_DEBUG scan chain, read the
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         | 84 |  |  |   // register, write the register and read it back.
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         | 85 |  |  |   selectChain (OR1K_SC_RISC_DEBUG);
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         | 86 |  |  |  
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         | 87 |  |  |   res = readReg (0x10);                         // NPC
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         | 88 |  |  |   std::cout << sc_core::sc_time_stamp ().to_seconds () * 1000000
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         | 89 |  |  |             << "us: Old NPC = " << std::hex << res << std::endl;
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         | 90 |  |  |  
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         | 91 |  |  |   writeReg (0x10, 0x4000100);
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         | 92 |  |  |  
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         | 93 |  |  |   res = readReg (0x10);                         // NPC
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         | 94 |  |  |   std::cout << sc_core::sc_time_stamp ().to_seconds () * 1000000
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         | 95 |  |  |             << "us: New NPC = " << std::hex << res << std::endl;
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         | 96 |  |  |  
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         | 97 |  |  |   // Unstall and check it has unstalled
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         | 98 |  |  |   selectChain (OR1K_SC_REGISTER);
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         | 99 |  |  |   writeReg (OR1K_RSC_RISCOP, 0);
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         | 100 |  |  |  
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         | 101 |  |  |   do
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         | 102 |  |  |     {
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         | 103 |  |  |       res = readReg (OR1K_RSC_RISCOP);
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         | 104 |  |  |       std::cout << sc_core::sc_time_stamp ().to_seconds () * 1000000
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         | 105 |  |  |                 << "us: RISCOP = " << std::hex << res << std::endl;
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         | 106 |  |  |     }
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         | 107 |  |  |   while ((res & RISCOP_STALL) == RISCOP_STALL);
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         | 108 |  |  |  
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         | 109 |  |  | }       // queueActions ()
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         | 110 |  |  |  
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         | 111 |  |  |  
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         | 112 |  |  | //! Reset the JTAG
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         | 113 |  |  |  
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         | 114 |  |  | //! @note Must be called from a SystemC thread, because of the use of wait()
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         | 115 |  |  |  
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         | 116 |  |  | void
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         | 117 |  |  | JtagDriverSC::reset ()
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         | 118 |  |  | {
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         | 119 |  |  |   sc_core::sc_event *actionDone = new sc_core::sc_event();
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         | 120 |  |  |   TapActionReset    *resetAction;
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         | 121 |  |  |  
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         | 122 |  |  |   // Create and queue the reset action and wait for it to complete
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         | 123 |  |  |   resetAction = new TapActionReset (actionDone);
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         | 124 |  |  |   tapActionQueue->write (resetAction);
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         | 125 |  |  |   wait (*actionDone);
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         | 126 |  |  |  
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         | 127 |  |  |   delete resetAction;
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         | 128 |  |  |   delete actionDone;
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         | 129 |  |  |  
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         | 130 |  |  | }       // reset ()
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         | 131 |  |  |  
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         | 132 |  |  |  
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         | 133 |  |  | //! Select an OpenRISC 1000 scan chain
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         | 134 |  |  |  
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         | 135 |  |  | //! Built on top of the JTAG commands to shift registers
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         | 136 |  |  | //! We only do something if the scan chain needs to be changed.
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         | 137 |  |  | //! - Shift-IR the CHAIN_SELECT instruction
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         | 138 |  |  | //! - Shift-DR the specified chain
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         | 139 |  |  | //! - Shift-IR the DEBUG instruction
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         | 140 |  |  |  
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         | 141 |  |  | //! @note Must be called from a SystemC thread, because of the use of wait()
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         | 142 |  |  |  
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         | 143 |  |  | //! @param[in] chain  The desired scan chain
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         | 144 |  |  |  
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         | 145 |  |  |  
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         | 146 |  |  | void
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         | 147 |  |  | JtagDriverSC::selectChain (int chain)
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         | 148 |  |  | {
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         | 149 |  |  |   if (chain == currentScanChain)
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         | 150 |  |  |     {
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         | 151 |  |  |       return;
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         | 152 |  |  |     }
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         | 153 |  |  |   else
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         | 154 |  |  |     {
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         | 155 |  |  |       currentScanChain = chain;
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         | 156 |  |  |     }
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         | 157 |  |  |  
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         | 158 |  |  |   sc_core::sc_event *actionDone = new sc_core::sc_event();
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         | 159 |  |  |   TapActionIRScan   *iRScan;
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         | 160 |  |  |   TapActionDRScan   *dRScan;
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         | 161 |  |  |  
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         | 162 |  |  |   // Create and queue the IR-Scan action for CHAIN_SELECT (no CRC)
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         | 163 |  |  |   iRScan = new TapActionIRScan (actionDone, CHAIN_SELECT_IR, JTAG_IR_LEN);
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         | 164 |  |  |   tapActionQueue->write (iRScan);
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         | 165 |  |  |   wait (*actionDone);
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         | 166 |  |  |  
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         | 167 |  |  |   delete iRScan;
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         | 168 |  |  |  
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         | 169 |  |  |   // Create and queue the DR-Scan action for the specified chain (which we
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         | 170 |  |  |   // know will fit into 64 bits)
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         | 171 |  |  |   uint64_t  chainReg = crc8 (chain, CHAIN_DR_LEN) << (CHAIN_DR_LEN) | chain;
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         | 172 |  |  |   dRScan = new TapActionDRScan (actionDone, chainReg, CHAIN_DR_LEN + CRC_LEN);
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         | 173 |  |  |   tapActionQueue->write (dRScan);
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         | 174 |  |  |   wait (*actionDone);
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         | 175 |  |  |  
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         | 176 |  |  |   delete dRScan;
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         | 177 |  |  |  
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         | 178 |  |  |   // Create and queue the IR-Scan action for DEBUG (no CRC)
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         | 179 |  |  |   iRScan      = new TapActionIRScan (actionDone, DEBUG_IR, JTAG_IR_LEN);
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         | 180 |  |  |   tapActionQueue->write (iRScan);
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         | 181 |  |  |   wait (*actionDone);
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         | 182 |  |  |  
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         | 183 |  |  |   delete iRScan;
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         | 184 |  |  |   delete actionDone;
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         | 185 |  |  |  
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         | 186 |  |  | }       // selectChain()
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         | 187 |  |  |  
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         | 188 |  |  |  
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         | 189 |  |  | //! Read an OpenRISC 1000 JTAG register
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         | 190 |  |  |  
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         | 191 |  |  | //! Built on top of the JTAG commands to shift registers
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         | 192 |  |  | //! - Shift-DR the specified address with R/W field unset
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         | 193 |  |  | //! - read out the data shifted out.
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         | 194 |  |  |  
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         | 195 |  |  | //! DR register fields depend on the scan chain in use. For SC_REGISTER:
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         | 196 |  |  | //! -   [4:0] Address to read from
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         | 197 |  |  | //! -     [5] 0 indicating read
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         | 198 |  |  | //! -  [37:6] Unused
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         | 199 |  |  | //! - [45:38] CRC (CRC-8-ATM)
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         | 200 |  |  |  
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         | 201 |  |  | //! For SC_RISC_DEBUG (i.e. SPRs) and SC_WISHBONE:
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         | 202 |  |  | //! -  [31:0] Address to read from
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         | 203 |  |  | //! -    [32] 0 indicating read
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         | 204 |  |  | //! - [64:33] unused
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         | 205 |  |  | //! - [72:65] CRC (CRC-8-ATM)
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         | 206 |  |  |  
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         | 207 |  |  | //! In general two Scan-DR loops are needed. The first will cause the value
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         | 208 |  |  | //! associated with the address to be loaded into the shift register, the
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         | 209 |  |  | //! second will actually shift that value out. So we use a subsidiary call to
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         | 210 |  |  | //! do the read (::readReg1()). This allows a future extension, where a block
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         | 211 |  |  | //! of registers are read efficiently by overlapping ScanDR actions.
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         | 212 |  |  |  
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         | 213 |  |  | //! We can also provide a variant of ::readReg1 () that is optimized for
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         | 214 |  |  | //! "small" value.
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         | 215 |  |  |  
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         | 216 |  |  | //! @note Must be called from a SystemC thread, because of the use of wait()
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         | 217 |  |  |  
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         | 218 |  |  | //! @param[in] addr  The address of the register
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         | 219 |  |  |  
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         | 220 |  |  | //! @return  The register value read
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         | 221 |  |  |  
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         | 222 |  |  | uint32_t
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         | 223 |  |  | JtagDriverSC::readReg (uint32_t  addr)
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         | 224 |  |  | {
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         | 225 |  |  |   bool  firstTime = true;
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         | 226 |  |  |   int   bitSizeNoCrc;           // Size of reg w/o its CRC field
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         | 227 |  |  |  
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         | 228 |  |  |   // Determine the size of register to read.
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         | 229 |  |  |   switch (currentScanChain)
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         | 230 |  |  |     {
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         | 231 |  |  |     case OR1K_SC_RISC_DEBUG:
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         | 232 |  |  |       bitSizeNoCrc  = RISC_DEBUG_DR_LEN;
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         | 233 |  |  |       break;
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         | 234 |  |  |  
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         | 235 |  |  |     case OR1K_SC_REGISTER:
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         | 236 |  |  |       bitSizeNoCrc  = REGISTER_DR_LEN;
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         | 237 |  |  |       break;
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         | 238 |  |  |  
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         | 239 |  |  |     case OR1K_SC_WISHBONE:
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         | 240 |  |  |       bitSizeNoCrc  = WISHBONE_DR_LEN;
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         | 241 |  |  |       break;
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         | 242 |  |  |     }
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         | 243 |  |  |  
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         | 244 |  |  |   // Read the register twice. Use an optimized version if the register is
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         | 245 |  |  |   // "small".
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         | 246 |  |  |   if ((bitSizeNoCrc + CRC_LEN) < 64)
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         | 247 |  |  |     {
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         | 248 |  |  |       (void)readReg1 (addr, bitSizeNoCrc);
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         | 249 |  |  |       return  readReg1 (addr, bitSizeNoCrc);
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         | 250 |  |  |     }
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         | 251 |  |  |   else
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         | 252 |  |  |     {
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         | 253 |  |  |       uint64_t *dReg = new uint64_t [(bitSizeNoCrc + CRC_LEN + 63) / 64];
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         | 254 |  |  |       (void)readReg1 (dReg, addr, bitSizeNoCrc);
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         | 255 |  |  |       uint32_t  res = readReg1 (dReg, addr, bitSizeNoCrc);
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         | 256 |  |  |       delete [] dReg;
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         | 257 |  |  |  
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         | 258 |  |  |       return  res;
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         | 259 |  |  |     }
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         | 260 |  |  | }       // readReg ()
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         | 261 |  |  |  
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         | 262 |  |  |  
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         | 263 |  |  | //! Single read of an OpenRISC 1000 JTAG register
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         | 264 |  |  |  
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         | 265 |  |  | //! Built on top of the JTAG commands to shift registers
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         | 266 |  |  | //! - Shift-DR the specified address with R/W field unset
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         | 267 |  |  | //! - read out the data shifted out.
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         | 268 |  |  |  
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         | 269 |  |  | //! This version is for "small" values represented as a uint64_t.
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         | 270 |  |  |  
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         | 271 |  |  | //! @note Must be called from a SystemC thread, because of the use of wait()
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         | 272 |  |  |  
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         | 273 |  |  | //! @param[in]     addr          The address to read
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         | 274 |  |  | //! @param[in]     bitSizeNoCrc  Size of the register excluding its CRC field
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         | 275 |  |  |  
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         | 276 |  |  | //! @return  The register value read
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         | 277 |  |  |  
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         | 278 |  |  | uint32_t
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         | 279 |  |  | JtagDriverSC::readReg1 (uint32_t   addr,
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         | 280 |  |  |                         int        bitSizeNoCrc)
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         | 281 |  |  | {
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         | 282 |  |  |   // Useful fields and sizes and the register itself
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         | 283 |  |  |   int                fullBitSize = bitSizeNoCrc + CRC_LEN;
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         | 284 |  |  |   int                dataOffset  = bitSizeNoCrc - DR_DATA_LEN;
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         | 285 |  |  |   uint64_t           dReg;
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         | 286 |  |  |  
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         | 287 |  |  |   // Allocate space for the shifted reg and a SystemC completion event
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         | 288 |  |  |   sc_core::sc_event *actionDone  = new sc_core::sc_event();
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         | 289 |  |  |  
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         | 290 |  |  |   // Loop until CRCs match
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         | 291 |  |  |   while (true)
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         | 292 |  |  |     {
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         | 293 |  |  |       // Create the data to shift in
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         | 294 |  |  |       dReg  = 0ULL;
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         | 295 |  |  |       dReg |= addr;
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         | 296 |  |  |       uint8_t crc_in = crc8 (dReg, bitSizeNoCrc);
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         | 297 |  |  |       dReg |= (uint64_t)crc_in << bitSizeNoCrc;
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         | 298 |  |  |  
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         | 299 |  |  |       // Prepare the action, queue it and wait for it to complete
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         | 300 |  |  |       TapActionDRScan *dRScan = new TapActionDRScan (actionDone, dReg,
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         | 301 |  |  |                                                      fullBitSize);
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         | 302 |  |  |       tapActionQueue->write (dRScan);
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         | 303 |  |  |       wait (*actionDone);
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         | 304 |  |  |       dReg = dRScan->getDRegOut ();
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         | 305 |  |  |       delete dRScan;
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         | 306 |  |  |  
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         | 307 |  |  |       // Check CRCs
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         | 308 |  |  |       uint8_t  crc_out  = dReg >> bitSizeNoCrc;
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         | 309 |  |  |       uint8_t  crc_calc = crc8 (dReg, bitSizeNoCrc);
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         | 310 |  |  |  
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         | 311 |  |  |       // All done if CRC matches
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         | 312 |  |  |       if (crc_out == crc_calc)
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         | 313 |  |  |         {
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         | 314 |  |  |           delete    actionDone;
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         | 315 |  |  |           return  (dReg >> dataOffset) & ((1ULL << DR_DATA_LEN) - 1);
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         | 316 |  |  |         }
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         | 317 |  |  |     }
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         | 318 |  |  | }       // readReg1 ()
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         | 319 |  |  |  
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         | 320 |  |  |  
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         | 321 |  |  | //! Single read of an OpenRISC 1000 JTAG register
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         | 322 |  |  |  
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         | 323 |  |  | //! Built on top of the JTAG commands to shift registers
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         | 324 |  |  | //! - Shift-DR the specified address with R/W field unset
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         | 325 |  |  | //! - read out the data shifted out.
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         | 326 |  |  |  
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         | 327 |  |  | //! This version is for "large" values represented as an array of uint64_t.
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         | 328 |  |  |  
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         | 329 |  |  | //! @note Must be called from a SystemC thread, because of the use of wait()
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         | 330 |  |  |  
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         | 331 |  |  | //! @param[in,out] dRegArray     The shift register to use
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         | 332 |  |  | //! @param[in]     addr          The address to read
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         | 333 |  |  | //! @param[in]     bitSizeNoCrc  Size of the register excluding its CRC field
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         | 334 |  |  |  
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         | 335 |  |  | //! @return  The register value read
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         | 336 |  |  |  
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         | 337 |  |  | uint32_t
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         | 338 |  |  | JtagDriverSC::readReg1 (uint64_t  *dRegArray,
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         | 339 |  |  |                         uint32_t   addr,
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         | 340 |  |  |                         int        bitSizeNoCrc)
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         | 341 |  |  | {
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         | 342 |  |  |   // Useful fields and sizes
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         | 343 |  |  |   int                fullBitSize = bitSizeNoCrc + CRC_LEN;
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         | 344 |  |  |   int                dataOffset  = bitSizeNoCrc - DR_DATA_LEN;
 | 
      
         | 345 |  |  |  
 | 
      
         | 346 |  |  |   // Allocate a SystemC completion event
 | 
      
         | 347 |  |  |   sc_core::sc_event *actionDone  = new sc_core::sc_event();
 | 
      
         | 348 |  |  |  
 | 
      
         | 349 |  |  |   // Loop until CRCs match
 | 
      
         | 350 |  |  |   while (true)
 | 
      
         | 351 |  |  |     {
 | 
      
         | 352 |  |  |       // Create the data to shift in
 | 
      
         | 353 |  |  |       memset (dRegArray, 0, fullBitSize / 8);
 | 
      
         | 354 |  |  |       dRegArray[0] |= addr;
 | 
      
         | 355 |  |  |       uint8_t crc_in = crc8 (dRegArray, bitSizeNoCrc);
 | 
      
         | 356 |  |  |       insertBits (crc_in, CRC_LEN, dRegArray, bitSizeNoCrc);
 | 
      
         | 357 |  |  |  
 | 
      
         | 358 |  |  |       // Prepare the action, queue it and wait for it to complete
 | 
      
         | 359 |  |  |       TapActionDRScan *dRScan = new TapActionDRScan (actionDone, dRegArray,
 | 
      
         | 360 |  |  |                                                      fullBitSize);
 | 
      
         | 361 |  |  |       tapActionQueue->write (dRScan);
 | 
      
         | 362 |  |  |       wait (*actionDone);
 | 
      
         | 363 |  |  |       dRScan->getDRegOut (dRegArray);
 | 
      
         | 364 |  |  |       delete dRScan;
 | 
      
         | 365 |  |  |  
 | 
      
         | 366 |  |  |       // Check CRCs
 | 
      
         | 367 |  |  |       uint8_t  crc_out  = extractBits (dRegArray, bitSizeNoCrc, CRC_LEN);
 | 
      
         | 368 |  |  |       uint8_t  crc_calc = crc8 (dRegArray, bitSizeNoCrc);
 | 
      
         | 369 |  |  |  
 | 
      
         | 370 |  |  |       // All done if CRC matches
 | 
      
         | 371 |  |  |       if (crc_out == crc_calc)
 | 
      
         | 372 |  |  |         {
 | 
      
         | 373 |  |  |           delete  actionDone;
 | 
      
         | 374 |  |  |           return  extractBits (dRegArray, dataOffset, DR_DATA_LEN);
 | 
      
         | 375 |  |  |         }
 | 
      
         | 376 |  |  |     }
 | 
      
         | 377 |  |  | }       // readReg1 ()
 | 
      
         | 378 |  |  |  
 | 
      
         | 379 |  |  |  
 | 
      
         | 380 |  |  | //! Write an OpenRISC 1000 JTAG register
 | 
      
         | 381 |  |  |  
 | 
      
         | 382 |  |  | //! Built on top of the JTAG commands to shift registers
 | 
      
         | 383 |  |  | //! - Shift-DR the specified address with R/W field set and data to write
 | 
      
         | 384 |  |  |  
 | 
      
         | 385 |  |  | //! DR register fields depend on the scan chain in use. For SC_REGISTER:
 | 
      
         | 386 |  |  | //! -   [4:0] Address to write to
 | 
      
         | 387 |  |  | //! -     [5] 1 indicating write
 | 
      
         | 388 |  |  | //! -  [37:6] Value to write
 | 
      
         | 389 |  |  | //! - [45:38] CRC (CRC-8-ATM)
 | 
      
         | 390 |  |  |  
 | 
      
         | 391 |  |  | //! For SC_RISC_DEBUG (i.e. SPRs) and SC_WISHBONE:
 | 
      
         | 392 |  |  | //! -  [31:0] Address to write to
 | 
      
         | 393 |  |  | //! -    [32] 1 indicating write
 | 
      
         | 394 |  |  | //! - [64:33] Value to write
 | 
      
         | 395 |  |  | //! - [72:65] CRC (CRC-8-ATM)
 | 
      
         | 396 |  |  |  
 | 
      
         | 397 |  |  | //! @note Must be called from a SystemC thread, because of the use of wait()
 | 
      
         | 398 |  |  |  
 | 
      
         | 399 |  |  | //! @param[in] addr  The address of the register
 | 
      
         | 400 |  |  | //! @param[in] data  The register data to write
 | 
      
         | 401 |  |  |  
 | 
      
         | 402 |  |  | void
 | 
      
         | 403 |  |  | JtagDriverSC::writeReg (uint32_t  addr,
 | 
      
         | 404 |  |  |                         uint32_t  data)
 | 
      
         | 405 |  |  | {
 | 
      
         | 406 |  |  |   int       bitSizeNoCrc;               // Size of reg w/o its CRC field
 | 
      
         | 407 |  |  |   uint64_t  writeBit;                   // Mask for the write enable bit
 | 
      
         | 408 |  |  |  
 | 
      
         | 409 |  |  |   // Determine the size of register to write.
 | 
      
         | 410 |  |  |   switch (currentScanChain)
 | 
      
         | 411 |  |  |     {
 | 
      
         | 412 |  |  |     case OR1K_SC_RISC_DEBUG:
 | 
      
         | 413 |  |  |       bitSizeNoCrc  = RISC_DEBUG_DR_LEN;
 | 
      
         | 414 |  |  |       writeBit      = RISC_DEBUG_RW;
 | 
      
         | 415 |  |  |       break;
 | 
      
         | 416 |  |  |  
 | 
      
         | 417 |  |  |     case OR1K_SC_REGISTER:
 | 
      
         | 418 |  |  |       bitSizeNoCrc  = REGISTER_DR_LEN;
 | 
      
         | 419 |  |  |       writeBit      = REGISTER_RW;
 | 
      
         | 420 |  |  |       break;
 | 
      
         | 421 |  |  |  
 | 
      
         | 422 |  |  |     case OR1K_SC_WISHBONE:
 | 
      
         | 423 |  |  |       bitSizeNoCrc  = WISHBONE_DR_LEN;
 | 
      
         | 424 |  |  |       writeBit      = WISHBONE_RW;
 | 
      
         | 425 |  |  |       break;
 | 
      
         | 426 |  |  |     }
 | 
      
         | 427 |  |  |  
 | 
      
         | 428 |  |  |   // Create the register in an array
 | 
      
         | 429 |  |  |   int       wordSize = (bitSizeNoCrc + CRC_LEN + 63) / 64;
 | 
      
         | 430 |  |  |   uint64_t *dReg   = new uint64_t [wordSize];
 | 
      
         | 431 |  |  |  
 | 
      
         | 432 |  |  |   // Create the data to shift in
 | 
      
         | 433 |  |  |   memset (dReg, 0, wordSize * 8);
 | 
      
         | 434 |  |  |   dReg[0] |= writeBit | addr;
 | 
      
         | 435 |  |  |   insertBits (data, DR_DATA_LEN, dReg, bitSizeNoCrc - DR_DATA_LEN);
 | 
      
         | 436 |  |  |   insertBits (crc8 (dReg, bitSizeNoCrc), CRC_LEN, dReg, bitSizeNoCrc);
 | 
      
         | 437 |  |  |  
 | 
      
         | 438 |  |  |   // Prepare the action, queue it and wait for it to complete
 | 
      
         | 439 |  |  |   sc_core::sc_event *actionDone = new sc_core::sc_event();
 | 
      
         | 440 |  |  |   TapActionDRScan   *dRScan     = new TapActionDRScan (actionDone, dReg,
 | 
      
         | 441 |  |  |                                                        bitSizeNoCrc + CRC_LEN);
 | 
      
         | 442 |  |  |  
 | 
      
         | 443 |  |  |   tapActionQueue->write (dRScan);
 | 
      
         | 444 |  |  |   wait (*actionDone);
 | 
      
         | 445 |  |  |  
 | 
      
         | 446 |  |  |   delete [] dReg;
 | 
      
         | 447 |  |  |   delete dRScan;
 | 
      
         | 448 |  |  |   delete actionDone;
 | 
      
         | 449 |  |  |  
 | 
      
         | 450 |  |  | }       // writeReg ()
 | 
      
         | 451 |  |  |  
 | 
      
         | 452 |  |  |  
 | 
      
         | 453 |  |  | //! Compute CRC-8-ATM
 | 
      
         | 454 |  |  |  
 | 
      
         | 455 |  |  | //! The data is in a uint64_t, for which we use the first size bits to compute
 | 
      
         | 456 |  |  | //! the CRC.
 | 
      
         | 457 |  |  |  
 | 
      
         | 458 |  |  | //! @Note I am using the same algorithm as the ORPSoC debug unit, but I
 | 
      
         | 459 |  |  | //!       believe its function is broken! I don't believe the data bit should
 | 
      
         | 460 |  |  | //!       feature in the computation of bits 2 & 1 of the new CRC.
 | 
      
         | 461 |  |  |  
 | 
      
         | 462 |  |  | //! @Note I've realized that this is an algorithm for LSB first, so maybe it
 | 
      
         | 463 |  |  | //!       is correct!
 | 
      
         | 464 |  |  |  
 | 
      
         | 465 |  |  | //! @param data  The data whose CRC is desired
 | 
      
         | 466 |  |  | //! @param size  The number of bits in the data
 | 
      
         | 467 |  |  |  
 | 
      
         | 468 |  |  | uint8_t
 | 
      
         | 469 |  |  | JtagDriverSC::crc8 (uint64_t  data,
 | 
      
         | 470 |  |  |                     int       size)
 | 
      
         | 471 |  |  | {
 | 
      
         | 472 |  |  |   uint8_t    crc = 0;
 | 
      
         | 473 |  |  |  
 | 
      
         | 474 |  |  |   for (int  i = 0; i < size; i++)
 | 
      
         | 475 |  |  |     {
 | 
      
         | 476 |  |  |       uint8_t  d         = data & 1;            // Latest data bit
 | 
      
         | 477 |  |  |       data             >>= 1;
 | 
      
         | 478 |  |  |  
 | 
      
         | 479 |  |  |       uint8_t  oldCrc7    = (crc >> 7) & 1;
 | 
      
         | 480 |  |  |       uint8_t  oldCrc1    = (crc >> 1) & 1;
 | 
      
         | 481 |  |  |       uint8_t  oldCrc0    = (crc >> 0) & 1;
 | 
      
         | 482 |  |  |       uint8_t  newCrc2    = d ^ oldCrc1 ^ oldCrc7;              // Why d?
 | 
      
         | 483 |  |  |       uint8_t  newCrc1    = d ^ oldCrc0 ^ oldCrc7;              // Why d?
 | 
      
         | 484 |  |  |       uint8_t  newCrc0    = d ^ oldCrc7;
 | 
      
         | 485 |  |  |  
 | 
      
         | 486 |  |  |       crc = ((crc << 1) & 0xf8) | (newCrc2 << 2) | (newCrc1 << 1) | newCrc0;
 | 
      
         | 487 |  |  |     }
 | 
      
         | 488 |  |  |  
 | 
      
         | 489 |  |  |   return crc;
 | 
      
         | 490 |  |  |  
 | 
      
         | 491 |  |  | }       // crc8 ()
 | 
      
         | 492 |  |  |  
 | 
      
         | 493 |  |  |  
 | 
      
         | 494 |  |  | //! Compute CRC-8-ATM
 | 
      
         | 495 |  |  |  
 | 
      
         | 496 |  |  | //! The data is in an array of uint64_t, for which we use the first size bits
 | 
      
         | 497 |  |  | //! to compute the CRC.
 | 
      
         | 498 |  |  |  
 | 
      
         | 499 |  |  | //! @Note I am using the same algorithm as the ORPSoC debug unit, but I
 | 
      
         | 500 |  |  | //!       believe its function is broken! I don't believe the data bit should
 | 
      
         | 501 |  |  | //!       feature in the computation of bits 2 & 1 of the new CRC.
 | 
      
         | 502 |  |  |  
 | 
      
         | 503 |  |  | //! @Note I've realized that this is an algorithm for LSB first, so maybe it
 | 
      
         | 504 |  |  | //!       is correct!
 | 
      
         | 505 |  |  |  
 | 
      
         | 506 |  |  | //! @param dataArray  The array of data whose CRC is desired
 | 
      
         | 507 |  |  | //! @param size       The number of bits in the data
 | 
      
         | 508 |  |  |  
 | 
      
         | 509 |  |  | uint8_t
 | 
      
         | 510 |  |  | JtagDriverSC::crc8 (uint64_t  dataArray[],
 | 
      
         | 511 |  |  |                     int       size)
 | 
      
         | 512 |  |  | {
 | 
      
         | 513 |  |  |   uint8_t    crc = 0;
 | 
      
         | 514 |  |  |  
 | 
      
         | 515 |  |  |   for (int  i = 0; i < size; i++)
 | 
      
         | 516 |  |  |     {
 | 
      
         | 517 |  |  |       uint8_t  d       = (dataArray[i / 64] >> (i % 64)) & 1;
 | 
      
         | 518 |  |  |       uint8_t  oldCrc7 = (crc >> 7) & 1;
 | 
      
         | 519 |  |  |       uint8_t  oldCrc1 = (crc >> 1) & 1;
 | 
      
         | 520 |  |  |       uint8_t  oldCrc0 = (crc >> 0) & 1;
 | 
      
         | 521 |  |  |       uint8_t  newCrc2 = d ^ oldCrc1 ^ oldCrc7;         // Why d?
 | 
      
         | 522 |  |  |       uint8_t  newCrc1 = d ^ oldCrc0 ^ oldCrc7;         // Why d?
 | 
      
         | 523 |  |  |       uint8_t  newCrc0 = d ^ oldCrc7;
 | 
      
         | 524 |  |  |  
 | 
      
         | 525 |  |  |       crc = ((crc << 1) & 0xf8) | (newCrc2 << 2) | (newCrc1 << 1) | newCrc0;
 | 
      
         | 526 |  |  |     }
 | 
      
         | 527 |  |  |  
 | 
      
         | 528 |  |  |   return crc;
 | 
      
         | 529 |  |  |  
 | 
      
         | 530 |  |  | }       // crc8 ()
 | 
      
         | 531 |  |  |  
 | 
      
         | 532 |  |  |  
 | 
      
         | 533 |  |  | //! Utility to insert a string of bits into array
 | 
      
         | 534 |  |  |  
 | 
      
         | 535 |  |  | //! This is a simple overwriting
 | 
      
         | 536 |  |  |  
 | 
      
         | 537 |  |  | //! @param  str       Bits to insert
 | 
      
         | 538 |  |  | //! @param  strLen    Number of bits to insert
 | 
      
         | 539 |  |  | //! @param  array     Array into which to insert
 | 
      
         | 540 |  |  | //! @param  startBit  Offset at which to insert bits
 | 
      
         | 541 |  |  |  
 | 
      
         | 542 |  |  | void
 | 
      
         | 543 |  |  | JtagDriverSC::insertBits (uint64_t  str,
 | 
      
         | 544 |  |  |                           int       strLen,
 | 
      
         | 545 |  |  |                           uint64_t *array,
 | 
      
         | 546 |  |  |                           int       startBit)
 | 
      
         | 547 |  |  | {
 | 
      
         | 548 |  |  |   int  startWord = startBit / 64;
 | 
      
         | 549 |  |  |   int  endWord   = (startBit + strLen - 1) / 64;
 | 
      
         | 550 |  |  |  
 | 
      
         | 551 |  |  |   startBit       = startBit % 64;
 | 
      
         | 552 |  |  |  
 | 
      
         | 553 |  |  |   // Deal with the startWord. Get enough bits for the mask and put them in the
 | 
      
         | 554 |  |  |   // right place
 | 
      
         | 555 |  |  |   uint64_t startMask   = ((1ULL << strLen) - 1ULL) << startBit;
 | 
      
         | 556 |  |  |  
 | 
      
         | 557 |  |  |   array[startWord] &= ~startMask;
 | 
      
         | 558 |  |  |   array[startWord] |= str << startBit;
 | 
      
         | 559 |  |  |  
 | 
      
         | 560 |  |  |   // If we were all in one word, we can give up now.
 | 
      
         | 561 |  |  |   if (startWord == endWord)
 | 
      
         | 562 |  |  |     {
 | 
      
         | 563 |  |  |       return;
 | 
      
         | 564 |  |  |     }
 | 
      
         | 565 |  |  |  
 | 
      
         | 566 |  |  |   // Deal with the endWord. Get enough bits for the mask. No need to shift
 | 
      
         | 567 |  |  |   // these up - they're always at the bottom of the word
 | 
      
         | 568 |  |  |   int  bitsToDo = (startBit + strLen) % 64;
 | 
      
         | 569 |  |  |  
 | 
      
         | 570 |  |  |   uint64_t  endMask = (1ULL << bitsToDo) - 1ULL;
 | 
      
         | 571 |  |  |  
 | 
      
         | 572 |  |  |   array[endWord] &= ~endMask;
 | 
      
         | 573 |  |  |   array[endWord] |= str >> (strLen - bitsToDo);
 | 
      
         | 574 |  |  |  
 | 
      
         | 575 |  |  | }       // insertBits()
 | 
      
         | 576 |  |  |  
 | 
      
         | 577 |  |  |  
 | 
      
         | 578 |  |  | //! Utility to extract a string of bits from an array
 | 
      
         | 579 |  |  |  
 | 
      
         | 580 |  |  | //! @param  array     Array from which to extract
 | 
      
         | 581 |  |  | //! @param  startBit  Offset at which to extract bits
 | 
      
         | 582 |  |  | //! @param  strLen    Number of bits to extract
 | 
      
         | 583 |  |  |  
 | 
      
         | 584 |  |  | //! @return  Extracted bits
 | 
      
         | 585 |  |  |  
 | 
      
         | 586 |  |  | uint64_t
 | 
      
         | 587 |  |  | JtagDriverSC::extractBits (uint64_t *array,
 | 
      
         | 588 |  |  |                            int       startBit,
 | 
      
         | 589 |  |  |                            int       strLen)
 | 
      
         | 590 |  |  | {
 | 
      
         | 591 |  |  |   int  startWord = startBit / 64;
 | 
      
         | 592 |  |  |   int  endWord   = (startBit + strLen - 1) / 64;
 | 
      
         | 593 |  |  |  
 | 
      
         | 594 |  |  |   startBit       = startBit % 64;
 | 
      
         | 595 |  |  |  
 | 
      
         | 596 |  |  |   // Deal with the startWord. Get enough bits for the mask and put them in the
 | 
      
         | 597 |  |  |   // right place
 | 
      
         | 598 |  |  |   uint64_t  startMask = ((1ULL << strLen) - 1ULL) << startBit;
 | 
      
         | 599 |  |  |   uint64_t  res       = (array[startWord] & startMask) >> startBit;
 | 
      
         | 600 |  |  |  
 | 
      
         | 601 |  |  |   // If we were all in one word, we can give up now.
 | 
      
         | 602 |  |  |   if (startWord == endWord)
 | 
      
         | 603 |  |  |     {
 | 
      
         | 604 |  |  |       return  res;
 | 
      
         | 605 |  |  |     }
 | 
      
         | 606 |  |  |  
 | 
      
         | 607 |  |  |   // Deal with the endWord. Get enough bits for the mask. No need to shift
 | 
      
         | 608 |  |  |   // these up - they're always at the bottom of the word
 | 
      
         | 609 |  |  |   int       bitsToDo = (startBit + strLen) % 64;
 | 
      
         | 610 |  |  |   uint64_t  endMask  = (1ULL << bitsToDo) - 1ULL;
 | 
      
         | 611 |  |  |  
 | 
      
         | 612 |  |  |   return  res | ((array[endWord] & endMask) << (strLen - bitsToDo));
 | 
      
         | 613 |  |  |  
 | 
      
         | 614 |  |  | }       // extractBits ()
 |