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// ----------------------------------------------------------------------------
 
// Access functions for the ORPSoC Verilator model: implementation
 
// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
 
// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
// Contributor Julius Baxter <jb@orsoc.se>
 
// This file is part of the cycle accurate model of the OpenRISC 1000 based
// system-on-chip, ORPSoC, built using Verilator.
 
// This program is free software: you can redistribute it and/or modify it
// under the terms of the GNU Lesser General Public License as published by
// the Free Software Foundation, either version 3 of the License, or (at your
// option) any later version.
 
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
// License for more details.
 
// You should have received a copy of the GNU Lesser General Public License
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
// ----------------------------------------------------------------------------
 
// $Id: OrpsocAccess.cpp 303 2009-02-16 11:20:17Z jeremy $
 
#include "OrpsocAccess.h"
 
#include "Vorpsoc_top.h"
#include "Vorpsoc_top_orpsoc_top.h"
#include "Vorpsoc_top_or1200_top.h"
#include "Vorpsoc_top_or1200_cpu.h"
#include "Vorpsoc_top_or1200_ctrl.h"
#include "Vorpsoc_top_or1200_except.h"
#include "Vorpsoc_top_or1200_sprs.h"
#include "Vorpsoc_top_or1200_rf.h"
#include "Vorpsoc_top_or1200_dpram.h"
// Need RAM instantiation has parameters after module name
// Includes for wb_ram
//#include "Vorpsoc_top_ram_wb__D20_A19_M800000.h"
//#include "Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000.h"
// Include for wb_ram_b3
#include "Vorpsoc_top_wb_ram_b3__D20_A17_M800000.h"
// Bus arbiter include - but is for old arbiter, no longer used
//#include "Vorpsoc_top_wb_conbus_top__pi1.h"
 
//! Constructor for the ORPSoC access class
 
//! Initializes the pointers to the various module instances of interest
//! within the Verilator model.
 
//! @param[in] orpsoc  The SystemC Verilated ORPSoC instance
 
OrpsocAccess::OrpsocAccess (Vorpsoc_top *orpsoc_top)
{
  // Assign processor accessor objects
  or1200_ctrl = orpsoc_top->v->or1200_top->or1200_cpu->or1200_ctrl;
  or1200_except = orpsoc_top->v->or1200_top->or1200_cpu->or1200_except;
  or1200_sprs = orpsoc_top->v->or1200_top->or1200_cpu->or1200_sprs;
  rf_a        = orpsoc_top->v->or1200_top->or1200_cpu->or1200_rf->rf_a;
  // Assign main memory accessor objects
  // For old ram_wb: ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0;
  ram_wb_sc_sw = orpsoc_top->v->wb_ram_b3_0;
 
  // Assign arbiter accessor object
  //wb_arbiter = orpsoc_top->v->wb_conbus;
 
}       // OrpsocAccess ()
 
//! Access for the ex_freeze signal
 
//! @return  The value of the or1200_ctrl.ex_freeze signal
 
bool
OrpsocAccess::getExFreeze ()
{
  return  or1200_ctrl->ex_freeze;
 
}       // getExFreeze ()
 
//! Access for the wb_freeze signal
 
//! @return  The value of the or1200_ctrl.wb_freeze signal
 
bool
OrpsocAccess::getWbFreeze ()
{
  return  or1200_ctrl->wb_freeze;
 
}       // getWbFreeze ()
 
//! Access for the except_flushpipe signal
 
//! @return  The value of the or1200_except.except_flushpipe signal
 
bool
OrpsocAccess::getExceptFlushpipe ()
{
  return  or1200_except->except_flushpipe;
 
}       // getExceptFlushpipe ()
 
//! Access for the ex_dslot signal
 
//! @return  The value of the or1200_except.ex_dslot signalfac
 
bool
OrpsocAccess::getExDslot ()
{
  return  or1200_except->ex_dslot;
 
}       // getExDslot ()
 
//! Access for the except_type value
 
//! @return  The value of the or1200_except.except_type register
 
uint32_t
OrpsocAccess::getExceptType ()
{
  return  (or1200_except->get_except_type) ();
 
}       // getExceptType ()
 
 
//! Access for the id_pc register
 
//! @return  The value of the or1200_except.id_pc register
 
uint32_t
OrpsocAccess::getIdPC ()
{
  return  (or1200_except->get_id_pc) ();
 
}       // getIdPC ()
 
//! Access for the ex_pc register
 
//! @return  The value of the or1200_except.id_ex register
 
uint32_t
OrpsocAccess::getExPC ()
{
  return  (or1200_except->get_ex_pc) ();
 
}       // getExPC ()
 
//! Access for the wb_pc register
 
//! @return  The value of the or1200_except.wb_pc register
 
uint32_t
OrpsocAccess::getWbPC ()
{
  return  (or1200_except->get_wb_pc) ();
 
}       // getWbPC ()
 
//! Access for the id_insn register
 
//! @return  The value of the or1200_ctrl.wb_insn register
 
uint32_t
OrpsocAccess::getIdInsn ()
{
  return  (or1200_ctrl->get_id_insn) ();
 
}       // getIdInsn ()
 
//! Access for the ex_insn register
 
//! @return  The value of the or1200_ctrl.ex_insn register
 
uint32_t
OrpsocAccess::getExInsn ()
{
  return  (or1200_ctrl->get_ex_insn) ();
 
}       // getExInsn ()
 
 
//! Access for the wb_insn register
 
//! @return  The value of the or1200_ctrl.wb_insn register
 
uint32_t
OrpsocAccess::getWbInsn ()
{
  return  (or1200_ctrl->get_wb_insn) ();
 
}       // getWbInsn ()
 
//! Access the Wishbone SRAM memory
 
//! @return  The value of the 32-bit memory word at addr
 
uint32_t
OrpsocAccess::get_mem32 (uint32_t addr)
{
  return  (ram_wb_sc_sw->get_mem) (addr/4);
 
}       // get_mem32 ()
 
 
//! Access a byte from the Wishbone SRAM memory
 
//! @return  The value of the memory byte at addr
 
uint8_t
OrpsocAccess::get_mem8 (uint32_t addr)
{
 
  uint32_t word;
  static uint32_t cached_word;
  static uint32_t cached_word_addr = 0xffffffff;
  int sel = addr & 0x3; // Remember which byte we want
  addr = addr / 4;
  if (addr != cached_word_addr)
    {
      cached_word_addr = addr;
      // Convert address to word number here
      word = (ram_wb_sc_sw->get_mem) (addr);
      cached_word = word;
    }
  else
    word = cached_word;
 
  switch(sel)
    {
      /* Big endian word expected */
    case 0:
      return ((word >> 24) & 0xff);
      break;
    case 1:
      return ((word >> 16) & 0xff);
      break;
    case 2:
      return ((word >> 8) & 0xff);
      break;
    case 3:
      return ((word >> 0) & 0xff);
      break;
    default:
      return 0;
    }
 
}       // get_mem8 ()
 
 
//! Write value to the Wishbone SRAM memory
 
void
OrpsocAccess::set_mem32 (uint32_t addr, uint32_t data)
{
  (ram_wb_sc_sw->set_mem) (addr/4, data);
 
}       // set_mem32 ()
 
//! Trigger the $readmemh() system call
 
void
OrpsocAccess::do_ram_readmemh (void)
{
  (ram_wb_sc_sw->do_readmemh) ();
 
}       // do_ram_readmemh ()
 
//! Access for the OR1200 GPRs
 
//! These are extracted from memory using the Verilog function
 
//! @param[in] regNum  The GPR whose value is wanted
 
//! @return            The value of the GPR
 
uint32_t
OrpsocAccess::getGpr (uint32_t  regNum)
{
  return  (rf_a->get_gpr) (regNum);
 
}       // getGpr ()
 
 
//! Access for the sr register
 
//! @return  The value of the or1200_sprs.sr register
 
uint32_t
OrpsocAccess::getSprSr ()
{
  return  (or1200_sprs->get_sr) ();
 
}       // getSprSr ()
 
//! Access for the epcr register
 
//! @return  The value of the or1200_sprs.epcr register
 
uint32_t
OrpsocAccess::getSprEpcr ()
{
  return  (or1200_sprs->get_epcr) ();
 
}       // getSprEpcr ()
 
//! Access for the eear register
 
//! @return  The value of the or1200_sprs.eear register
 
uint32_t
OrpsocAccess::getSprEear ()
{
  return  (or1200_sprs->get_eear) ();
 
}       // getSprEear ()
 
//! Access for the esr register
 
//! @return  The value of the or1200_sprs.esr register
 
uint32_t
OrpsocAccess::getSprEsr ()
{
  return  (or1200_sprs->get_esr) ();
 
}       // getSprEsr ()
 
/*
//! Access for the arbiter's grant signal
 
//! @return  The value of the wb_conmax_top.arb signal
 
uint8_t
OrpsocAccess::getWbArbGrant ()
{
  return  (wb_arbiter->get_gnt) ();
 
}       // getWbArbGrant ()
 
 
//! Arbiter master[mast_num] access functions
 
//! Access for the arbiter's master[mast_num] data in signal
 
//! @return  The value of the wb_conmax_top.m_dat_i[mast_num]
 
uint32_t
OrpsocAccess::getWbArbMastDatI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_dat_i) (mast_num);
 
}       // getWbArbMastDatI ()
 
//! Access for the arbiter's master[mast_num] data out signal
 
//! @return  The value of the wb_conmax_top.m_dat_o[mast_num]
 
uint32_t
OrpsocAccess::getWbArbMastDatO (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_dat_o) (mast_num);
 
}       // getWbArbMastDatO ()
 
//! Access for the arbiter's master[mast_num] data out
 
//! @return  The value of the wb_conmax_top.m_adr_i[mast_num]
 
uint32_t
OrpsocAccess::getWbArbMastAdrI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_adr_i) (mast_num);
 
}       // getWbArbMastAdrI ()
 
 
//! Access for the arbiter's master[mast_num] select signal
 
//! @return  The value of the wb_conmax_top.m_sel_i[mast_num]
 
uint8_t
OrpsocAccess::getWbArbMastSelI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_sel_i) (mast_num);
 
}       // getWbArbMastSelI ()
 
//! Access for the arbiter's master[mast_num] decoded slave select signal
 
//! @return  The value of the wb_conmax_top.m_ssel_dec[mast_num]
 
uint8_t
OrpsocAccess::getWbArbMastSlaveSelDecoded (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_ssel_dec) (mast_num);
 
}       // getWbArbMastSlaveSelDecoded ()
 
//! Access for the arbiter's master[mast_num] write enable signal
 
//! @return  The value of the wb_conmax_top.m_we_i[mast_num]
 
bool
OrpsocAccess::getWbArbMastWeI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_we_i) (mast_num);
 
}       // getWbArbMastWeI ()
 
//! Access for the arbiter's master[mast_num] cycle input signal
 
//! @return  The value of the wb_conmax_top.m_cyc_i[mast_num]
 
bool
OrpsocAccess::getWbArbMastCycI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_cyc_i) (mast_num);
 
}       // getWbArbMastCycI ()
 
//! Access for the arbiter's master[mast_num] strobe input signal
 
//! @return  The value of the wb_conmax_top.m_stb_i[mast_num]
 
bool
OrpsocAccess::getWbArbMastStbI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_stb_i) (mast_num);
 
}       // getWbArbMastStbI ()
 
//! Access for the arbiter's master[mast_num] ACK output signal
 
//! @return  The value of the wb_conmax_top.m_ack_o[mast_num]
 
bool
OrpsocAccess::getWbArbMastAckO (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_ack_o) (mast_num);
 
}       // getWbArbMastAckO ()
 
//! Access for the arbiter's master[mast_num] error input signal
 
//! @return  The value of the wb_conmax_top.m_err_o[mast_num]
 
bool
OrpsocAccess::getWbArbMastErrO (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_err_o) (mast_num);
 
}       // getWbArbMastErrO ()
 
*/

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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [OrpsocAccess.cpp] - Blame information for rev 396

Line No.	Rev	Author	Line
1	6	julius	`// ----------------------------------------------------------------------------`
2
3			`// Access functions for the ORPSoC Verilator model: implementation`
4
5			`// Copyright (C) 2008 Embecosm Limited <info@embecosm.com>`
6
7			`// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>`
8	44	julius	`// Contributor Julius Baxter <jb@orsoc.se>`
9	6	julius
10			`// This file is part of the cycle accurate model of the OpenRISC 1000 based`
11			`// system-on-chip, ORPSoC, built using Verilator.`
12
13			`// This program is free software: you can redistribute it and/or modify it`
14			`// under the terms of the GNU Lesser General Public License as published by`
15			`// the Free Software Foundation, either version 3 of the License, or (at your`
16			`// option) any later version.`
17
18			`// This program is distributed in the hope that it will be useful, but WITHOUT`
19			`// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
20			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public`
21			`// License for more details.`
22
23			`// You should have received a copy of the GNU Lesser General Public License`
24			`// along with this program. If not, see <http://www.gnu.org/licenses/>.`
25
26			`// ----------------------------------------------------------------------------`
27
28			`// $Id: OrpsocAccess.cpp 303 2009-02-16 11:20:17Z jeremy $`
29
30			`#include "OrpsocAccess.h"`
31
32			`#include "Vorpsoc_top.h"`
33			`#include "Vorpsoc_top_orpsoc_top.h"`
34			`#include "Vorpsoc_top_or1200_top.h"`
35			`#include "Vorpsoc_top_or1200_cpu.h"`
36			`#include "Vorpsoc_top_or1200_ctrl.h"`
37	44	julius	`#include "Vorpsoc_top_or1200_except.h"`
38			`#include "Vorpsoc_top_or1200_sprs.h"`
39	6	julius	`#include "Vorpsoc_top_or1200_rf.h"`
40			`#include "Vorpsoc_top_or1200_dpram.h"`
41	353	julius	`// Need RAM instantiation has parameters after module name`
42			`// Includes for wb_ram`
43			`//#include "Vorpsoc_top_ram_wb__D20_A19_M800000.h"`
44			`//#include "Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000.h"`
45			`// Include for wb_ram_b3`
46	363	julius	`#include "Vorpsoc_top_wb_ram_b3__D20_A17_M800000.h"`
47	353	julius	`// Bus arbiter include - but is for old arbiter, no longer used`
48			`//#include "Vorpsoc_top_wb_conbus_top__pi1.h"`
49	6	julius
50			`//! Constructor for the ORPSoC access class`
51
52			`//! Initializes the pointers to the various module instances of interest`
53			`//! within the Verilator model.`
54
55			`//! @param[in] orpsoc The SystemC Verilated ORPSoC instance`
56
57			`OrpsocAccess::OrpsocAccess (Vorpsoc_top *orpsoc_top)`
58			`{`
59	63	julius	`// Assign processor accessor objects`
60	362	julius	`or1200_ctrl = orpsoc_top->v->or1200_top->or1200_cpu->or1200_ctrl;`
61			`or1200_except = orpsoc_top->v->or1200_top->or1200_cpu->or1200_except;`
62			`or1200_sprs = orpsoc_top->v->or1200_top->or1200_cpu->or1200_sprs;`
63			`rf_a = orpsoc_top->v->or1200_top->or1200_cpu->or1200_rf->rf_a;`
64	63	julius	`// Assign main memory accessor objects`
65	353	julius	`// For old ram_wb: ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0;`
66	362	julius	`ram_wb_sc_sw = orpsoc_top->v->wb_ram_b3_0;`
67	353	julius
68	63	julius	`// Assign arbiter accessor object`
69	353	julius	`//wb_arbiter = orpsoc_top->v->wb_conbus;`
70	6	julius
71			`} // OrpsocAccess ()`
72
73	51	julius	`//! Access for the ex_freeze signal`
74	6	julius
75	51	julius	`//! @return The value of the or1200_ctrl.ex_freeze signal`
76
77			`bool`
78			`OrpsocAccess::getExFreeze ()`
79			`{`
80			`return or1200_ctrl->ex_freeze;`
81
82			`} // getExFreeze ()`
83
84	6	julius	`//! Access for the wb_freeze signal`
85
86			`//! @return The value of the or1200_ctrl.wb_freeze signal`
87
88			`bool`
89			`OrpsocAccess::getWbFreeze ()`
90			`{`
91			`return or1200_ctrl->wb_freeze;`
92
93			`} // getWbFreeze ()`
94
95	44	julius	`//! Access for the except_flushpipe signal`
96	6	julius
97	44	julius	`//! @return The value of the or1200_except.except_flushpipe signal`
98
99			`bool`
100			`OrpsocAccess::getExceptFlushpipe ()`
101			`{`
102			`return or1200_except->except_flushpipe;`
103
104			`} // getExceptFlushpipe ()`
105
106			`//! Access for the ex_dslot signal`
107
108			`//! @return The value of the or1200_except.ex_dslot signalfac`
109
110			`bool`
111			`OrpsocAccess::getExDslot ()`
112			`{`
113			`return or1200_except->ex_dslot;`
114
115			`} // getExDslot ()`
116
117	51	julius	`//! Access for the except_type value`
118
119			`//! @return The value of the or1200_except.except_type register`
120
121			`uint32_t`
122			`OrpsocAccess::getExceptType ()`
123			`{`
124			`return (or1200_except->get_except_type) ();`
125
126			`} // getExceptType ()`
127
128
129	49	julius	`//! Access for the id_pc register`
130
131			`//! @return The value of the or1200_except.id_pc register`
132
133			`uint32_t`
134			`OrpsocAccess::getIdPC ()`
135			`{`
136			`return (or1200_except->get_id_pc) ();`
137
138			`} // getIdPC ()`
139
140	51	julius	`//! Access for the ex_pc register`
141
142			`//! @return The value of the or1200_except.id_ex register`
143
144			`uint32_t`
145			`OrpsocAccess::getExPC ()`
146			`{`
147			`return (or1200_except->get_ex_pc) ();`
148
149			`} // getExPC ()`
150
151	44	julius	`//! Access for the wb_pc register`
152
153	49	julius	`//! @return The value of the or1200_except.wb_pc register`
154	44	julius
155			`uint32_t`
156			`OrpsocAccess::getWbPC ()`
157			`{`
158			`return (or1200_except->get_wb_pc) ();`
159
160			`} // getWbPC ()`
161
162	51	julius	`//! Access for the id_insn register`
163
164			`//! @return The value of the or1200_ctrl.wb_insn register`
165
166			`uint32_t`
167			`OrpsocAccess::getIdInsn ()`
168			`{`
169			`return (or1200_ctrl->get_id_insn) ();`
170
171			`} // getIdInsn ()`
172
173			`//! Access for the ex_insn register`
174
175			`//! @return The value of the or1200_ctrl.ex_insn register`
176
177			`uint32_t`
178			`OrpsocAccess::getExInsn ()`
179			`{`
180			`return (or1200_ctrl->get_ex_insn) ();`
181
182			`} // getExInsn ()`
183
184
185	6	julius	`//! Access for the wb_insn register`
186
187			`//! @return The value of the or1200_ctrl.wb_insn register`
188
189			`uint32_t`
190			`OrpsocAccess::getWbInsn ()`
191			`{`
192			`return (or1200_ctrl->get_wb_insn) ();`
193
194			`} // getWbInsn ()`
195
196	51	julius	`//! Access the Wishbone SRAM memory`
197	6	julius
198	66	julius	`//! @return The value of the 32-bit memory word at addr`
199	49	julius
200			`uint32_t`
201	66	julius	`OrpsocAccess::get_mem32 (uint32_t addr)`
202	49	julius	`{`
203	66	julius	`return (ram_wb_sc_sw->get_mem) (addr/4);`
204	49	julius
205	66	julius	`} // get_mem32 ()`
206	49	julius
207	66	julius
208			`//! Access a byte from the Wishbone SRAM memory`
209
210			`//! @return The value of the memory byte at addr`
211
212			`uint8_t`
213			`OrpsocAccess::get_mem8 (uint32_t addr)`
214			`{`
215
216			`uint32_t word;`
217			`static uint32_t cached_word;`
218			`static uint32_t cached_word_addr = 0xffffffff;`
219			`int sel = addr & 0x3; // Remember which byte we want`
220			`addr = addr / 4;`
221			`if (addr != cached_word_addr)`
222			`{`
223			`cached_word_addr = addr;`
224			`// Convert address to word number here`
225			`word = (ram_wb_sc_sw->get_mem) (addr);`
226			`cached_word = word;`
227			`}`
228			`else`
229			`word = cached_word;`
230
231			`switch(sel)`
232			`{`
233			`/* Big endian word expected */`
234			`case 0:`
235			`return ((word >> 24) & 0xff);`
236			`break;`
237			`case 1:`
238			`return ((word >> 16) & 0xff);`
239			`break;`
240			`case 2:`
241			`return ((word >> 8) & 0xff);`
242			`break;`
243			`case 3:`
244			`return ((word >> 0) & 0xff);`
245			`break;`
246			`default:`
247			`return 0;`
248			`}`
249
250			`} // get_mem8 ()`
251
252
253	51	julius	`//! Write value to the Wishbone SRAM memory`
254
255			`void`
256	66	julius	`OrpsocAccess::set_mem32 (uint32_t addr, uint32_t data)`
257	51	julius	`{`
258	66	julius	`(ram_wb_sc_sw->set_mem) (addr/4, data);`
259	51	julius
260	66	julius	`} // set_mem32 ()`
261	51	julius
262			`//! Trigger the $readmemh() system call`
263
264			`void`
265			`OrpsocAccess::do_ram_readmemh (void)`
266			`{`
267			`(ram_wb_sc_sw->do_readmemh) ();`
268
269			`} // do_ram_readmemh ()`
270
271	6	julius	`//! Access for the OR1200 GPRs`
272
273			`//! These are extracted from memory using the Verilog function`
274
275			`//! @param[in] regNum The GPR whose value is wanted`
276
277			`//! @return The value of the GPR`
278
279			`uint32_t`
280			`OrpsocAccess::getGpr (uint32_t regNum)`
281			`{`
282			`return (rf_a->get_gpr) (regNum);`
283
284			`} // getGpr ()`
285	44	julius
286
287			`//! Access for the sr register`
288
289			`//! @return The value of the or1200_sprs.sr register`
290
291			`uint32_t`
292			`OrpsocAccess::getSprSr ()`
293			`{`
294			`return (or1200_sprs->get_sr) ();`
295
296			`} // getSprSr ()`
297
298			`//! Access for the epcr register`
299
300			`//! @return The value of the or1200_sprs.epcr register`
301
302			`uint32_t`
303			`OrpsocAccess::getSprEpcr ()`
304			`{`
305			`return (or1200_sprs->get_epcr) ();`
306
307			`} // getSprEpcr ()`
308
309			`//! Access for the eear register`
310
311			`//! @return The value of the or1200_sprs.eear register`
312
313			`uint32_t`
314			`OrpsocAccess::getSprEear ()`
315			`{`
316			`return (or1200_sprs->get_eear) ();`
317
318			`} // getSprEear ()`
319
320			`//! Access for the esr register`
321
322			`//! @return The value of the or1200_sprs.esr register`
323
324			`uint32_t`
325			`OrpsocAccess::getSprEsr ()`
326			`{`
327			`return (or1200_sprs->get_esr) ();`
328
329			`} // getSprEsr ()`
330
331	353	julius	`/*`
332	63	julius	`//! Access for the arbiter's grant signal`
333
334			`//! @return The value of the wb_conmax_top.arb signal`
335
336			`uint8_t`
337			`OrpsocAccess::getWbArbGrant ()`
338			`{`
339			`return (wb_arbiter->get_gnt) ();`
340
341			`} // getWbArbGrant ()`
342
343
344			`//! Arbiter master[mast_num] access functions`
345
346			`//! Access for the arbiter's master[mast_num] data in signal`
347
348			`//! @return The value of the wb_conmax_top.m_dat_i[mast_num]`
349
350			`uint32_t`
351			`OrpsocAccess::getWbArbMastDatI (uint32_t mast_num)`
352			`{`
353			`return (wb_arbiter->get_m_dat_i) (mast_num);`
354
355			`} // getWbArbMastDatI ()`
356
357			`//! Access for the arbiter's master[mast_num] data out signal`
358
359			`//! @return The value of the wb_conmax_top.m_dat_o[mast_num]`
360
361			`uint32_t`
362			`OrpsocAccess::getWbArbMastDatO (uint32_t mast_num)`
363			`{`
364			`return (wb_arbiter->get_m_dat_o) (mast_num);`
365
366			`} // getWbArbMastDatO ()`
367
368			`//! Access for the arbiter's master[mast_num] data out`
369
370			`//! @return The value of the wb_conmax_top.m_adr_i[mast_num]`
371
372			`uint32_t`
373			`OrpsocAccess::getWbArbMastAdrI (uint32_t mast_num)`
374			`{`
375			`return (wb_arbiter->get_m_adr_i) (mast_num);`
376
377			`} // getWbArbMastAdrI ()`
378
379
380			`//! Access for the arbiter's master[mast_num] select signal`
381
382			`//! @return The value of the wb_conmax_top.m_sel_i[mast_num]`
383
384			`uint8_t`
385			`OrpsocAccess::getWbArbMastSelI (uint32_t mast_num)`
386			`{`
387			`return (wb_arbiter->get_m_sel_i) (mast_num);`
388
389			`} // getWbArbMastSelI ()`
390
391			`//! Access for the arbiter's master[mast_num] decoded slave select signal`
392
393			`//! @return The value of the wb_conmax_top.m_ssel_dec[mast_num]`
394
395			`uint8_t`
396			`OrpsocAccess::getWbArbMastSlaveSelDecoded (uint32_t mast_num)`
397			`{`
398			`return (wb_arbiter->get_m_ssel_dec) (mast_num);`
399
400			`} // getWbArbMastSlaveSelDecoded ()`
401
402			`//! Access for the arbiter's master[mast_num] write enable signal`
403
404			`//! @return The value of the wb_conmax_top.m_we_i[mast_num]`
405
406			`bool`
407			`OrpsocAccess::getWbArbMastWeI (uint32_t mast_num)`
408			`{`
409			`return (wb_arbiter->get_m_we_i) (mast_num);`
410
411			`} // getWbArbMastWeI ()`
412
413			`//! Access for the arbiter's master[mast_num] cycle input signal`
414
415			`//! @return The value of the wb_conmax_top.m_cyc_i[mast_num]`
416
417			`bool`
418			`OrpsocAccess::getWbArbMastCycI (uint32_t mast_num)`
419			`{`
420			`return (wb_arbiter->get_m_cyc_i) (mast_num);`
421
422			`} // getWbArbMastCycI ()`
423
424			`//! Access for the arbiter's master[mast_num] strobe input signal`
425
426			`//! @return The value of the wb_conmax_top.m_stb_i[mast_num]`
427
428			`bool`
429			`OrpsocAccess::getWbArbMastStbI (uint32_t mast_num)`
430			`{`
431			`return (wb_arbiter->get_m_stb_i) (mast_num);`
432
433			`} // getWbArbMastStbI ()`
434
435			`//! Access for the arbiter's master[mast_num] ACK output signal`
436
437			`//! @return The value of the wb_conmax_top.m_ack_o[mast_num]`
438
439			`bool`
440			`OrpsocAccess::getWbArbMastAckO (uint32_t mast_num)`
441			`{`
442			`return (wb_arbiter->get_m_ack_o) (mast_num);`
443
444			`} // getWbArbMastAckO ()`
445
446			`//! Access for the arbiter's master[mast_num] error input signal`
447
448			`//! @return The value of the wb_conmax_top.m_err_o[mast_num]`
449
450			`bool`
451			`OrpsocAccess::getWbArbMastErrO (uint32_t mast_num)`
452			`{`
453			`return (wb_arbiter->get_m_err_o) (mast_num);`
454
455			`} // getWbArbMastErrO ()`
456
457	353	julius	`*/`