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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [OrpsocAccess.cpp] - Blame information for rev 433

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// ----------------------------------------------------------------------------
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// Access functions for the ORPSoC Verilator model: implementation
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// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
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// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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// Contributor Julius Baxter <jb@orsoc.se>
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// This file is part of the cycle accurate model of the OpenRISC 1000 based
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// system-on-chip, ORPSoC, built using Verilator.
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// This program is free software: you can redistribute it and/or modify it
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// under the terms of the GNU Lesser General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or (at your
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// option) any later version.
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
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// License for more details.
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// You should have received a copy of the GNU Lesser General Public License
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// along with this program.  If not, see <http://www.gnu.org/licenses/>.
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// ----------------------------------------------------------------------------
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// $Id: OrpsocAccess.cpp 303 2009-02-16 11:20:17Z jeremy $
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#include "OrpsocAccess.h"
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#include "Vorpsoc_top.h"
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#include "Vorpsoc_top_orpsoc_top.h"
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#include "Vorpsoc_top_or1200_top.h"
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#include "Vorpsoc_top_or1200_cpu.h"
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#include "Vorpsoc_top_or1200_ctrl.h"
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#include "Vorpsoc_top_or1200_except.h"
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#include "Vorpsoc_top_or1200_sprs.h"
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#include "Vorpsoc_top_or1200_rf.h"
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#include "Vorpsoc_top_or1200_dpram.h"
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// Need RAM instantiation has parameters after module name
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// Includes for wb_ram
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//#include "Vorpsoc_top_ram_wb__D20_A19_M800000.h"
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//#include "Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000.h"
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// Include for wb_ram_b3
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#include "Vorpsoc_top_wb_ram_b3__D20_A17_M800000.h"
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// Bus arbiter include - but is for old arbiter, no longer used
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//#include "Vorpsoc_top_wb_conbus_top__pi1.h"
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//! Constructor for the ORPSoC access class
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//! Initializes the pointers to the various module instances of interest
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//! within the Verilator model.
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//! @param[in] orpsoc  The SystemC Verilated ORPSoC instance
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OrpsocAccess::OrpsocAccess (Vorpsoc_top *orpsoc_top)
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{
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  // Assign processor accessor objects
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  or1200_ctrl = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_ctrl;
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  or1200_except = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_except;
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  or1200_sprs = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_sprs;
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  rf_a        = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_rf->rf_a;
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  // Assign main memory accessor objects
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  // For old ram_wb: ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0;
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  ram_wb_sc_sw = orpsoc_top->v->wb_ram_b3_0;
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  // Assign arbiter accessor object
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  //wb_arbiter = orpsoc_top->v->wb_conbus;
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}       // OrpsocAccess ()
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//! Access for the ex_freeze signal
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//! @return  The value of the or1200_ctrl.ex_freeze signal
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bool
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OrpsocAccess::getExFreeze ()
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{
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  return  or1200_ctrl->ex_freeze;
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}       // getExFreeze ()
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//! Access for the wb_freeze signal
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//! @return  The value of the or1200_ctrl.wb_freeze signal
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bool
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OrpsocAccess::getWbFreeze ()
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{
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  return  or1200_ctrl->wb_freeze;
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}       // getWbFreeze ()
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//! Access for the except_flushpipe signal
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//! @return  The value of the or1200_except.except_flushpipe signal
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bool
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OrpsocAccess::getExceptFlushpipe ()
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{
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  return  or1200_except->except_flushpipe;
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}       // getExceptFlushpipe ()
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//! Access for the ex_dslot signal
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//! @return  The value of the or1200_except.ex_dslot signalfac
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bool
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OrpsocAccess::getExDslot ()
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{
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  return  or1200_except->ex_dslot;
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}       // getExDslot ()
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//! Access for the except_type value
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//! @return  The value of the or1200_except.except_type register
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uint32_t
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OrpsocAccess::getExceptType ()
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{
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  return  (or1200_except->get_except_type) ();
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}       // getExceptType ()
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//! Access for the id_pc register
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//! @return  The value of the or1200_except.id_pc register
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uint32_t
134
OrpsocAccess::getIdPC ()
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{
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  return  (or1200_except->get_id_pc) ();
137
 
138
}       // getIdPC ()
139
 
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//! Access for the ex_pc register
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//! @return  The value of the or1200_except.id_ex register
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uint32_t
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OrpsocAccess::getExPC ()
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{
147
  return  (or1200_except->get_ex_pc) ();
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}       // getExPC ()
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//! Access for the wb_pc register
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//! @return  The value of the or1200_except.wb_pc register
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155
uint32_t
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OrpsocAccess::getWbPC ()
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{
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  return  (or1200_except->get_wb_pc) ();
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160
}       // getWbPC ()
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//! Access for the id_insn register
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//! @return  The value of the or1200_ctrl.wb_insn register
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166
uint32_t
167
OrpsocAccess::getIdInsn ()
168
{
169
  return  (or1200_ctrl->get_id_insn) ();
170
 
171
}       // getIdInsn ()
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//! Access for the ex_insn register
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//! @return  The value of the or1200_ctrl.ex_insn register
176
 
177
uint32_t
178
OrpsocAccess::getExInsn ()
179
{
180
  return  (or1200_ctrl->get_ex_insn) ();
181
 
182
}       // getExInsn ()
183
 
184
 
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//! Access for the wb_insn register
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187
//! @return  The value of the or1200_ctrl.wb_insn register
188
 
189
uint32_t
190
OrpsocAccess::getWbInsn ()
191
{
192
  return  (or1200_ctrl->get_wb_insn) ();
193
 
194
}       // getWbInsn ()
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//! Access the Wishbone SRAM memory
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//! @return  The value of the 32-bit memory word at addr
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200
uint32_t
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OrpsocAccess::get_mem32 (uint32_t addr)
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{
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  return  (ram_wb_sc_sw->get_mem) (addr/4);
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}       // get_mem32 ()
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208
//! Access a byte from the Wishbone SRAM memory
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//! @return  The value of the memory byte at addr
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212
uint8_t
213
OrpsocAccess::get_mem8 (uint32_t addr)
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{
215
 
216
  uint32_t word;
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  static uint32_t cached_word;
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  static uint32_t cached_word_addr = 0xffffffff;
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  int sel = addr & 0x3; // Remember which byte we want
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  addr = addr / 4;
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  if (addr != cached_word_addr)
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    {
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      cached_word_addr = addr;
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      // Convert address to word number here
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      word = (ram_wb_sc_sw->get_mem) (addr);
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      cached_word = word;
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    }
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  else
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    word = cached_word;
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  switch(sel)
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    {
233
      /* Big endian word expected */
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    case 0:
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      return ((word >> 24) & 0xff);
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      break;
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    case 1:
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      return ((word >> 16) & 0xff);
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      break;
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    case 2:
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      return ((word >> 8) & 0xff);
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      break;
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    case 3:
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      return ((word >> 0) & 0xff);
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      break;
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    default:
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      return 0;
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    }
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250
}       // get_mem8 ()
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252
 
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//! Write value to the Wishbone SRAM memory
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void
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OrpsocAccess::set_mem32 (uint32_t addr, uint32_t data)
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{
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  (ram_wb_sc_sw->set_mem) (addr/4, data);
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}       // set_mem32 ()
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//! Trigger the $readmemh() system call
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264
void
265
OrpsocAccess::do_ram_readmemh (void)
266
{
267
  (ram_wb_sc_sw->do_readmemh) ();
268
 
269
}       // do_ram_readmemh ()
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//! Access for the OR1200 GPRs
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273
//! These are extracted from memory using the Verilog function
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//! @param[in] regNum  The GPR whose value is wanted
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277
//! @return            The value of the GPR
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279
uint32_t
280
OrpsocAccess::getGpr (uint32_t  regNum)
281
{
282
  return  (rf_a->get_gpr) (regNum);
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284
}       // getGpr ()
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287
//! Access for the sr register
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289
//! @return  The value of the or1200_sprs.sr register
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291
uint32_t
292
OrpsocAccess::getSprSr ()
293
{
294
  return  (or1200_sprs->get_sr) ();
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296
}       // getSprSr ()
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//! Access for the epcr register
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300
//! @return  The value of the or1200_sprs.epcr register
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302
uint32_t
303
OrpsocAccess::getSprEpcr ()
304
{
305
  return  (or1200_sprs->get_epcr) ();
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307
}       // getSprEpcr ()
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309
//! Access for the eear register
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311
//! @return  The value of the or1200_sprs.eear register
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313
uint32_t
314
OrpsocAccess::getSprEear ()
315
{
316
  return  (or1200_sprs->get_eear) ();
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318
}       // getSprEear ()
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//! Access for the esr register
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322
//! @return  The value of the or1200_sprs.esr register
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324
uint32_t
325
OrpsocAccess::getSprEsr ()
326
{
327
  return  (or1200_sprs->get_esr) ();
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329
}       // getSprEsr ()
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/*
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//! Access for the arbiter's grant signal
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//! @return  The value of the wb_conmax_top.arb signal
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336
uint8_t
337
OrpsocAccess::getWbArbGrant ()
338
{
339
  return  (wb_arbiter->get_gnt) ();
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341
}       // getWbArbGrant ()
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//! Arbiter master[mast_num] access functions
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//! Access for the arbiter's master[mast_num] data in signal
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348
//! @return  The value of the wb_conmax_top.m_dat_i[mast_num]
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350
uint32_t
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OrpsocAccess::getWbArbMastDatI (uint32_t mast_num)
352
{
353
  return  (wb_arbiter->get_m_dat_i) (mast_num);
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355
}       // getWbArbMastDatI ()
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//! Access for the arbiter's master[mast_num] data out signal
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359
//! @return  The value of the wb_conmax_top.m_dat_o[mast_num]
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361
uint32_t
362
OrpsocAccess::getWbArbMastDatO (uint32_t mast_num)
363
{
364
  return  (wb_arbiter->get_m_dat_o) (mast_num);
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366
}       // getWbArbMastDatO ()
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//! Access for the arbiter's master[mast_num] data out
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370
//! @return  The value of the wb_conmax_top.m_adr_i[mast_num]
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372
uint32_t
373
OrpsocAccess::getWbArbMastAdrI (uint32_t mast_num)
374
{
375
  return  (wb_arbiter->get_m_adr_i) (mast_num);
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377
}       // getWbArbMastAdrI ()
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380
//! Access for the arbiter's master[mast_num] select signal
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382
//! @return  The value of the wb_conmax_top.m_sel_i[mast_num]
383
 
384
uint8_t
385
OrpsocAccess::getWbArbMastSelI (uint32_t mast_num)
386
{
387
  return  (wb_arbiter->get_m_sel_i) (mast_num);
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389
}       // getWbArbMastSelI ()
390
 
391
//! Access for the arbiter's master[mast_num] decoded slave select signal
392
 
393
//! @return  The value of the wb_conmax_top.m_ssel_dec[mast_num]
394
 
395
uint8_t
396
OrpsocAccess::getWbArbMastSlaveSelDecoded (uint32_t mast_num)
397
{
398
  return  (wb_arbiter->get_m_ssel_dec) (mast_num);
399
 
400
}       // getWbArbMastSlaveSelDecoded ()
401
 
402
//! Access for the arbiter's master[mast_num] write enable signal
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404
//! @return  The value of the wb_conmax_top.m_we_i[mast_num]
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406
bool
407
OrpsocAccess::getWbArbMastWeI (uint32_t mast_num)
408
{
409
  return  (wb_arbiter->get_m_we_i) (mast_num);
410
 
411
}       // getWbArbMastWeI ()
412
 
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//! Access for the arbiter's master[mast_num] cycle input signal
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415
//! @return  The value of the wb_conmax_top.m_cyc_i[mast_num]
416
 
417
bool
418
OrpsocAccess::getWbArbMastCycI (uint32_t mast_num)
419
{
420
  return  (wb_arbiter->get_m_cyc_i) (mast_num);
421
 
422
}       // getWbArbMastCycI ()
423
 
424
//! Access for the arbiter's master[mast_num] strobe input signal
425
 
426
//! @return  The value of the wb_conmax_top.m_stb_i[mast_num]
427
 
428
bool
429
OrpsocAccess::getWbArbMastStbI (uint32_t mast_num)
430
{
431
  return  (wb_arbiter->get_m_stb_i) (mast_num);
432
 
433
}       // getWbArbMastStbI ()
434
 
435
//! Access for the arbiter's master[mast_num] ACK output signal
436
 
437
//! @return  The value of the wb_conmax_top.m_ack_o[mast_num]
438
 
439
bool
440
OrpsocAccess::getWbArbMastAckO (uint32_t mast_num)
441
{
442
  return  (wb_arbiter->get_m_ack_o) (mast_num);
443
 
444
}       // getWbArbMastAckO ()
445
 
446
//! Access for the arbiter's master[mast_num] error input signal
447
 
448
//! @return  The value of the wb_conmax_top.m_err_o[mast_num]
449
 
450
bool
451
OrpsocAccess::getWbArbMastErrO (uint32_t mast_num)
452
{
453
  return  (wb_arbiter->get_m_err_o) (mast_num);
454
 
455
}       // getWbArbMastErrO ()
456
 
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*/

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