OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [SprCache.cpp] - Blame information for rev 711

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 63 julius
// ----------------------------------------------------------------------------
2
 
3
// Debug Unit SPR cache: implementation
4
 
5
// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
6
 
7
// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
8
 
9
// This file is part of the GDB interface to the cycle accurate model of the
10
// OpenRISC 1000 based system-on-chip, ORPSoC, built using Verilator.
11
 
12
// This program is free software: you can redistribute it and/or modify it
13
// under the terms of the GNU Lesser General Public License as published by
14
// the Free Software Foundation, either version 3 of the License, or (at your
15
// option) any later version.
16
 
17
// This program is distributed in the hope that it will be useful, but WITHOUT
18
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
20
// License for more details.
21
 
22
// You should have received a copy of the GNU Lesser General Public License
23
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
24
 
25
// ----------------------------------------------------------------------------
26
 
27
// $Id: SprCache.cpp 331 2009-03-12 17:01:48Z jeremy $
28
 
29
#include <iostream>
30
#include <cstring>
31
 
32
#include "SprCache.h"
33
 
34
//-----------------------------------------------------------------------------
35
//! Constructor
36
 
37
//! Allocate tables and clear the cache
38
 
39
//! @param[in] _tableSize  The desire hash table size. A prime number is
40
//!                         recommended.
41
//-----------------------------------------------------------------------------
42 462 julius
SprCache::SprCache(int _tableSize):
43
tableSize(_tableSize)
44 63 julius
{
45 462 julius
        sprIsValid = new bool[tableSize];
46
        sprKeyNum = new uint16_t[tableSize];
47
        sprValue = new uint32_t[tableSize];
48 63 julius
 
49 462 julius
        clear();
50 63 julius
 
51 462 julius
}                               // SprCache ()
52 63 julius
 
53
//-----------------------------------------------------------------------------
54
//! Destructor
55
 
56
//! Free up the tables
57
//-----------------------------------------------------------------------------
58 462 julius
SprCache::~SprCache()
59 63 julius
{
60 462 julius
        delete[]sprValue;
61
        delete[]sprKeyNum;
62
        delete[]sprIsValid;
63 63 julius
 
64 462 julius
}                               // ~SprCache ()
65 63 julius
 
66
//! Empty the hash table
67
 
68
//! Only need to worry about the validity field
69
void
70 462 julius
 SprCache::clear()
71 63 julius
{
72 462 julius
        memset(sprIsValid, false, tableSize);
73 63 julius
 
74 462 julius
        // No more than 70% full
75
        maxToUse = tableSize * 7 / 10;
76 63 julius
 
77 462 julius
}                               // clear ()
78 63 julius
 
79
//-----------------------------------------------------------------------------
80
//! Write a new value into the cache
81
 
82
//! If the hash table is full silently does nothing, unless the force
83
//! parameter is set to TRUE. Under this circumstance the value WILL be
84
//! written into the hash table. This is safe, because the table is never more
85
//! than 70% full, and force is used only for NPC.
86
 
87
//! @param[in] spr    The SPR being written to
88
//! @param[in] value  The value to write
89
//! @param[in] force  If TRUE the value will be written to the hash table,
90
//!                   even if it is too full.
91
//-----------------------------------------------------------------------------
92 462 julius
void SprCache::write(uint16_t sprNum, uint32_t value, bool force)
93 63 julius
{
94 462 julius
        if (maxToUse <= 0) {
95
                return;         // Table is full
96
        }
97 63 julius
 
98 462 julius
        int hv = sprNum % tableSize;
99 63 julius
 
100 462 julius
        // We can use the slot if either it is empty, or it is full and the key
101
        // number matches.
102
        while (sprIsValid[hv] && (sprKeyNum[hv] != sprNum)) {
103
                hv = (hv + 1) % tableSize;
104
        }
105 63 julius
 
106 462 julius
        sprIsValid[hv] = true;
107
        sprKeyNum[hv] = sprNum;
108
        sprValue[hv] = value;
109
        maxToUse--;
110 63 julius
 
111 462 julius
}                               // write ()
112 63 julius
 
113
//-----------------------------------------------------------------------------
114
//! Try to read a value from the cache
115
 
116
//! The entry must be valid.
117
 
118
//! @param[in]  sprNum  The SPR being read from
119
//! @param[out] value   The value read. Will be written, even if the value is
120
//!                     not valid.
121
 
122
//! @return  True if the value was found in the hash table
123
//-----------------------------------------------------------------------------
124 462 julius
bool SprCache::read(uint16_t sprNum, uint32_t & value)
125 63 julius
{
126 462 julius
        int hv = sprNum % tableSize;
127 63 julius
 
128 462 julius
        // Look for either an empty slot (we are not there) or a matching key (we
129
        // are there)
130
        while (sprIsValid[hv] && (sprKeyNum[hv] != sprNum)) {
131
                hv = (hv + 1) % tableSize;
132
        }
133 63 julius
 
134 462 julius
        value = sprValue[hv];
135
        return sprIsValid[hv];
136 63 julius
 
137 462 julius
}                               // read ()

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.