OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [SprCache.cpp] - Blame information for rev 179

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 63 julius
// ----------------------------------------------------------------------------
2
 
3
// Debug Unit SPR cache: implementation
4
 
5
// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
6
 
7
// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
8
 
9
// This file is part of the GDB interface to the cycle accurate model of the
10
// OpenRISC 1000 based system-on-chip, ORPSoC, built using Verilator.
11
 
12
// This program is free software: you can redistribute it and/or modify it
13
// under the terms of the GNU Lesser General Public License as published by
14
// the Free Software Foundation, either version 3 of the License, or (at your
15
// option) any later version.
16
 
17
// This program is distributed in the hope that it will be useful, but WITHOUT
18
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
20
// License for more details.
21
 
22
// You should have received a copy of the GNU Lesser General Public License
23
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
24
 
25
// ----------------------------------------------------------------------------
26
 
27
// $Id: SprCache.cpp 331 2009-03-12 17:01:48Z jeremy $
28
 
29
#include <iostream>
30
#include <cstring>
31
 
32
#include "SprCache.h"
33
 
34
 
35
//-----------------------------------------------------------------------------
36
//! Constructor
37
 
38
//! Allocate tables and clear the cache
39
 
40
//! @param[in] _tableSize  The desire hash table size. A prime number is
41
//!                         recommended.
42
//-----------------------------------------------------------------------------
43
SprCache::SprCache (int _tableSize) :
44
  tableSize (_tableSize)
45
{
46
  sprIsValid = new bool [tableSize];
47
  sprKeyNum  = new uint16_t [tableSize];
48
  sprValue   = new uint32_t [tableSize];
49
 
50
  clear ();
51
 
52
}       // SprCache ()
53
 
54
 
55
//-----------------------------------------------------------------------------
56
//! Destructor
57
 
58
//! Free up the tables
59
//-----------------------------------------------------------------------------
60
SprCache::~SprCache ()
61
{
62
  delete [] sprValue;
63
  delete [] sprKeyNum;
64
  delete [] sprIsValid;
65
 
66
}       // ~SprCache ()
67
 
68
 
69
//! Empty the hash table
70
 
71
//! Only need to worry about the validity field
72
void
73
SprCache::clear ()
74
{
75
  memset (sprIsValid, false, tableSize);
76
 
77
  // No more than 70% full
78
  maxToUse = tableSize * 7 / 10;
79
 
80
}       // clear ()
81
 
82
 
83
//-----------------------------------------------------------------------------
84
//! Write a new value into the cache
85
 
86
//! If the hash table is full silently does nothing, unless the force
87
//! parameter is set to TRUE. Under this circumstance the value WILL be
88
//! written into the hash table. This is safe, because the table is never more
89
//! than 70% full, and force is used only for NPC.
90
 
91
//! @param[in] spr    The SPR being written to
92
//! @param[in] value  The value to write
93
//! @param[in] force  If TRUE the value will be written to the hash table,
94
//!                   even if it is too full.
95
//-----------------------------------------------------------------------------
96
void
97
SprCache::write (uint16_t  sprNum,
98
                 uint32_t  value,
99
                 bool      force)
100
{
101
  if (maxToUse <= 0)
102
    {
103
      return;                           // Table is full
104
    }
105
 
106
  int  hv = sprNum % tableSize;
107
 
108
  // We can use the slot if either it is empty, or it is full and the key
109
  // number matches.
110
  while (sprIsValid[hv] && (sprKeyNum[hv] != sprNum))
111
    {
112
      hv = (hv + 1) % tableSize;
113
    }
114
 
115
  sprIsValid[hv] = true;
116
  sprKeyNum[hv]  = sprNum;
117
  sprValue[hv]   = value;
118
  maxToUse--;
119
 
120
}       // write ()
121
 
122
 
123
//-----------------------------------------------------------------------------
124
//! Try to read a value from the cache
125
 
126
//! The entry must be valid.
127
 
128
//! @param[in]  sprNum  The SPR being read from
129
//! @param[out] value   The value read. Will be written, even if the value is
130
//!                     not valid.
131
 
132
//! @return  True if the value was found in the hash table
133
//-----------------------------------------------------------------------------
134
bool
135
SprCache::read (uint16_t  sprNum,
136
                uint32_t &value)
137
{
138
  int  hv = sprNum % tableSize;
139
 
140
  // Look for either an empty slot (we are not there) or a matching key (we
141
  // are there)
142
  while (sprIsValid[hv] && (sprKeyNum[hv] != sprNum))
143
    {
144
      hv = (hv + 1) % tableSize;
145
    }
146
 
147
  value = sprValue[hv];
148
  return  sprIsValid[hv];
149
 
150
}       // read ()

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.