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// ----------------------------------------------------------------------------
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// TAP DR-Scan action: implementation
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// Copyright (C) 2009 Embecosm Limited <info@embecosm.com>
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// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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// This file is part of the Embecosm cycle accurate SystemC JTAG library.
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// This program is free software: you can redistribute it and/or modify it
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// under the terms of the GNU Lesser General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or (at your
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// option) any later version.
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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// License for more details.
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// You should have received a copy of the GNU Lesser General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// The C/C++ parts of this program are commented throughout in a fashion
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// suitable for processing with Doxygen.
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// ----------------------------------------------------------------------------
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// $Id$
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#include <iostream>
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#include <stdio.h>
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#include "TapActionDRScan.h"
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#include "TapStateMachine.h"
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//! Constructor for "large" DR registers
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//! Sets up the superclass with the SystemC completion event and initializes
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//! our state as appropriate.
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//! This constructor represents large registers as an array of uint64_t, with
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//! least significant bits in the lowest numbered element, and any odd bits in
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//! the highest numbered element.
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//! However if we are presented with an array that represents a "small"
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//! (i.e. up to 64-bit) register, we will store it efficiently.
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//! @param[in] doneEvent SystemC event to be signalled when this action is
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//! complete.
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//! @param[in] _dRegInArray The register to shift in.
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//! @param[in] _dRegSize Size in bits of the register to shift in.
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julius |
TapActionDRScan::TapActionDRScan(sc_core::sc_event * _doneEvent, uint64_t * _dRegInArray, int _dRegSize):
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TapAction(_doneEvent),
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dRegBitSize(_dRegSize),
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dRegWordSize((_dRegSize + 63) / 64),
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goToPauseState(0),
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bitsBeforePause(0), bitsShifted(0), dRScanState(SHIFT_DR_PREPARING)
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{
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// Small registers are represented simply. Large registers are copied to a
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// local instance (since we destroy dRegIn when shifting it)
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julius |
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if (1 == dRegWordSize) {
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dRegIn = _dRegInArray[0];
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dRegOut = 0;
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} else {
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dRegInArray = new uint64_t[dRegWordSize];
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dRegOutArray = new uint64_t[dRegWordSize];
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// Copy in the in array and zero the out array
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for (int i = 0; i < dRegWordSize; i++) {
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dRegInArray[i] = _dRegInArray[i];
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dRegOutArray[i] = 0;
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}
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// Create a mask for the top word
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int maskBits = ((dRegBitSize - 1) % 64) + 1;
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topMask = (1ULL << maskBits) - 1ULL;
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}
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} // TapActionDRScan ()
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//! Constructor for small DR registers
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//! Sets up the superclass with the SystemC completion event and initializes
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//! our state as appropriate.
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//! This constructor represents small registers in a single uint64_t
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//! @param[in] doneEvent SystemC event to be signalled when this action is
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//! complete.
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//! @param[in] _dRegIn The register to shift in.
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//! @param[in] _dRegSize Size in bits of the register to shift in. Must be no
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//! greater than 64, or we give a rude message and set
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//! the value to 64 anyway.
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TapActionDRScan::TapActionDRScan(sc_core::sc_event * _doneEvent,
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uint64_t _dRegIn,
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int _dRegSize):TapAction(_doneEvent),
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dRegBitSize(_dRegSize),
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dRegWordSize(1),
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goToPauseState(0),
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bitsBeforePause(0), bitsShifted(0), dRScanState(SHIFT_DR_PREPARING)
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{
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// Print a rude message if we are not small
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if (dRegBitSize > 64) {
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std::cerr << "Simple DR size reduced to 64 bits" << std::endl;
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dRegBitSize = 64;
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}
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// Simple representation
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dRegIn = _dRegIn;
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dRegOut = 0;
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} // TapActionDRScan ()
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julius |
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//! Constructor for "large" DR registers using special PAUSE state
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//! Sets up the superclass with the SystemC completion event and initializes
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//! our state as appropriate.
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//! This constructor represents large registers as an array of uint64_t, with
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//! least significant bits in the lowest numbered element, and any odd bits in
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//! the highest numbered element.
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//! However if we are presented with an array that represents a "small"
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//! (i.e. up to 64-bit) register, we will store it efficiently.
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//! @param[in] doneEvent SystemC event to be signalled when this action is
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//! complete.
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//! @param[in] _dRegInArray The register to shift in.
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//! @param[in] _dRegSize Size in bits of the register to shift in.
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//! @param[in] _goToPauseState Switch determining if we go to PAUSE state after _bitsBeforePauseState and poll for TDO=0
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//! @param[in] _bitsBeforePauseState Number of bits to shift in before going to shift pause state and polling TDO, indicating transaction has completed
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TapActionDRScan::TapActionDRScan(sc_core::sc_event * _doneEvent,
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uint64_t * _dRegInArray,
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int _dRegSize,
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int _goToPauseState,
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int
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_bitsBeforePauseState):TapAction(_doneEvent),
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dRegBitSize(_dRegSize), dRegWordSize((_dRegSize + 63) / 64),
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goToPauseState(_goToPauseState), bitsBeforePause(_bitsBeforePauseState),
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pauseStateCount(0), bitsShifted(0), dRScanState(SHIFT_DR_PREPARING)
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{
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// Small registers are represented simply. Large registers are copied to a
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// local instance (since we destroy dRegIn when shifting it)
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if (1 == dRegWordSize) {
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dRegIn = _dRegInArray[0];
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dRegOut = 0;
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} else {
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dRegInArray = new uint64_t[dRegWordSize];
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dRegOutArray = new uint64_t[dRegWordSize];
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// Copy in the in array and zero the out array
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for (int i = 0; i < dRegWordSize; i++) {
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dRegInArray[i] = _dRegInArray[i];
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dRegOutArray[i] = 0;
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}
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// Create a mask for the top word
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int maskBits = ((dRegBitSize - 1) % 64) + 1;
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topMask = (1ULL << maskBits) - 1ULL;
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}
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} // TapActionDRScan ()
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//! Constructor for small DR registers using special PAUSE state
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//! Sets up the superclass with the SystemC completion event and initializes
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//! our state as appropriate.
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//! This constructor represents small registers in a single uint64_t
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//! @param[in] doneEvent SystemC event to be signalled when this action is
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//! complete.
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//! @param[in] _dRegIn The register to shift in.
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//! @param[in] _dRegSize Size in bits of the register to shift in. Must be no
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//! greater than 64, or we give a rude message and set
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//! the value to 64 anyway.
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//! @param[in] _goToPauseState Switch determining if we go to PAUSE state after _bitsBeforePauseState and poll for TDO=0
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//! @param[in] _bitsBeforePauseState Number of bits to shift in before going to shift pause state and polling TDO, indicating transaction has completed
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TapActionDRScan::TapActionDRScan(sc_core::sc_event * _doneEvent,
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uint64_t _dRegIn,
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int _dRegSize,
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int _goToPauseState,
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int
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_bitsBeforePauseState):TapAction(_doneEvent),
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dRegBitSize(_dRegSize), dRegWordSize(1), goToPauseState(_goToPauseState),
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bitsBeforePause(_bitsBeforePauseState), pauseStateCount(0), bitsShifted(0),
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dRScanState(SHIFT_DR_PREPARING)
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{
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// Print a rude message if we are not small
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if (dRegBitSize > 64) {
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std::cerr << "Simple DR size reduced to 64 bits" << std::endl;
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dRegBitSize = 64;
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}
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// Simple representation
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dRegIn = _dRegIn;
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dRegOut = 0;
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julius |
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} // TapActionDRScan ()
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//! Destructor.
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//! If we allocated them, free the large registers
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TapActionDRScan::~TapActionDRScan()
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{
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if (dRegWordSize > 1) {
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delete[]dRegInArray;
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delete[]dRegOutArray;
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}
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} // ~TapActionDRScan ()
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julius |
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//! Process the Shift-DR action
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//! This drives the DR-Scan state. We can only do this if we have the TAP
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//! state machine in a consistent state, which in turn is only possible if we
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//! have been through a reset cycle.
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//! If the state machine shows it has yet to be through a reset cycle, we
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//! drive that cycle, after issuing a warning. This functionality is provided
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//! by the parent class, TapAction::.
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//! @param[in] tapStateMachine The TAP state machine with which this action
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//! is associated.
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//! @param[out] tdi The value to drive on TDI
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//! @param[in] tdo The value currently on TDO
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//! @param[out] tms The value to drive on TMS
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//! @return True if the action is complete
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bool TapActionDRScan::process(TapStateMachine * tapStateMachine,
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bool & tdi, bool tdo, bool & tms)
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{
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// Ensure we are in a consistent state. If not then we'll have moved towards
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// it and can return with the given tms
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if (!checkResetDone(tapStateMachine, tms, true)) {
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return false;
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}
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julius |
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if (goToPauseState) {
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switch (dRScanState) {
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case SHIFT_DR_PREPARING:
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// Are we in the Shift-DR state yet?
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if (!tapStateMachine->targetState(TAP_SHIFT_DR, tms)) {
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return false; // Not there. Accept the TMS value
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} else {
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dRScanState = SHIFT_DR_SHIFTING_BEFORE_PAUSE; // Drop through
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}
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case SHIFT_DR_SHIFTING_BEFORE_PAUSE:
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// Are we still shifting stuff?
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if (bitsShifted < bitsBeforePause) {
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// We are in the Shift-DR state. Another bit about to be done, so
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// increment the count
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bitsShifted++;
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// Set the TDI value. In a routine to keep this tidy.
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tdi = shiftDRegOut();
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// Record the TDO value. This is always a cycle late, so we ignore
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// it the first time. The value shifts in from the top.
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if (bitsShifted > 1) {
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shiftDRegIn(tdo);
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}
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// TMS is 0 to keep us here UNLESS this is the last bit, in which case
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// it is 1 to move us into Exit1-DR.
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tms = (bitsShifted == bitsBeforePause);
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// Not done until we've updated
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return false;
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} else {
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// Capture the last TDO bit
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shiftDRegIn(tdo);
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// Now lower TMS to go to PAUSE_DR
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tms = false;
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dRScanState = SHIFT_DR_SHIFTING_PAUSE;
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}
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case SHIFT_DR_SHIFTING_PAUSE:
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{
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if (!tapStateMachine->targetState
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(TAP_PAUSE_DR, tms)) {
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return false; // Not there. Accept the TMS value
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}
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if (pauseStateCount++ < 3)
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return false;
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// Sit in DR_PAUSE state and cycle until TDO is low
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// tms starts false, should get set to true on the cycle
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// tdo goes low, then the next cycle we go back to SHIFT_DR
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// and we return so tms isn't set again.
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if (!tdo) {
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tms = true;
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dRScanState = SHIFT_DR_EXIT2;
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return false;
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}
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}
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case SHIFT_DR_EXIT2:
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{
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tms = false;
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shiftDRegIn(0);
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dRScanState = SHIFT_DR_SHIFTING_AFTER_PAUSE;
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return false;
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}
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case SHIFT_DR_SHIFTING_AFTER_PAUSE:
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{
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if (bitsShifted < dRegBitSize) {
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// We are in the Shift-DR state. Another bit about to be done, so
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// increment the count
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bitsShifted++;
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// Set the TDI value. In a routine to keep this tidy.
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tdi = shiftDRegOut();
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//printf("shifting after pause (%d+32=%d) %d of %d tdo=%d\n",bitsBeforePause,bitsBeforePause+32, bitsShifted, dRegBitSize,(tdo) ? 1 : 0);
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shiftDRegIn(tdo);
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// TMS is 0 to keep us here UNLESS this is the last bit, in which case
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// it is 1 to move us into Exit1-DR.
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tms = (bitsShifted == dRegBitSize);
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// Not done until we've updated
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return false;
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} else {
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// Capture the last TDO bit
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shiftDRegIn(tdo);
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dRScanState = SHIFT_DR_UPDATING; // Drop through
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}
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}
|
341 |
|
|
|
342 |
|
|
case SHIFT_DR_UPDATING:
|
343 |
|
|
|
344 |
|
|
// Are we still trying to update?
|
345 |
|
|
if (!tapStateMachine->targetState(TAP_UPDATE_DR, tms)) {
|
346 |
|
|
return false; // Not there. Accept the TMS value
|
347 |
|
|
} else {
|
348 |
|
|
return true; // All done
|
349 |
|
|
}
|
350 |
63 |
julius |
}
|
351 |
462 |
julius |
} else {
|
352 |
|
|
switch (dRScanState) {
|
353 |
|
|
case SHIFT_DR_PREPARING:
|
354 |
|
|
|
355 |
|
|
// Are we in the Shift-DR state yet?
|
356 |
|
|
if (!tapStateMachine->targetState(TAP_SHIFT_DR, tms)) {
|
357 |
|
|
return false; // Not there. Accept the TMS value
|
358 |
|
|
} else {
|
359 |
|
|
dRScanState = SHIFT_DR_SHIFTING; // Drop through
|
360 |
|
|
}
|
361 |
|
|
|
362 |
|
|
case SHIFT_DR_SHIFTING:
|
363 |
|
|
|
364 |
|
|
// Are we still shifting stuff?
|
365 |
|
|
if (bitsShifted < dRegBitSize) {
|
366 |
|
|
// We are in the Shift-DR state. Another bit about to be done, so
|
367 |
|
|
// increment the count
|
368 |
|
|
bitsShifted++;
|
369 |
|
|
|
370 |
|
|
// Set the TDI value. In a routine to keep this tidy.
|
371 |
|
|
tdi = shiftDRegOut();
|
372 |
|
|
|
373 |
|
|
// Record the TDO value. This is always a cycle late, so we ignore
|
374 |
|
|
// it the first time. The value shifts in from the top.
|
375 |
|
|
if (bitsShifted > 1) {
|
376 |
|
|
shiftDRegIn(tdo);
|
377 |
|
|
}
|
378 |
|
|
// TMS is 0 to keep us here UNLESS this is the last bit, in which case
|
379 |
|
|
// it is 1 to move us into Exit1-DR.
|
380 |
|
|
tms = (bitsShifted == dRegBitSize);
|
381 |
|
|
|
382 |
|
|
// Not done until we've updated
|
383 |
|
|
return false;
|
384 |
|
|
} else {
|
385 |
|
|
// Capture the last TDO bit
|
386 |
|
|
shiftDRegIn(tdo);
|
387 |
|
|
|
388 |
|
|
dRScanState = SHIFT_DR_UPDATING; // Drop through
|
389 |
|
|
|
390 |
|
|
}
|
391 |
|
|
|
392 |
|
|
case SHIFT_DR_UPDATING:
|
393 |
|
|
|
394 |
|
|
// Are we still trying to update?
|
395 |
|
|
if (!tapStateMachine->targetState(TAP_UPDATE_DR, tms)) {
|
396 |
|
|
return false; // Not there. Accept the TMS value
|
397 |
|
|
} else {
|
398 |
|
|
return true; // All done
|
399 |
|
|
}
|
400 |
|
|
}
|
401 |
63 |
julius |
}
|
402 |
462 |
julius |
} // process ()
|
403 |
63 |
julius |
|
404 |
|
|
//! Get the shifted out value.
|
405 |
|
|
|
406 |
|
|
//! This version works with large values.
|
407 |
|
|
|
408 |
|
|
//! @param[out] dRegArray Array for the result
|
409 |
462 |
julius |
void TapActionDRScan::getDRegOut(uint64_t dRegArray[])
|
410 |
63 |
julius |
{
|
411 |
462 |
julius |
if (1 == dRegWordSize) {
|
412 |
|
|
dRegArray[0] = dRegOut;
|
413 |
|
|
} else {
|
414 |
|
|
for (int i = 0; i < dRegWordSize; i++) {
|
415 |
|
|
dRegArray[i] = dRegOutArray[i];
|
416 |
|
|
}
|
417 |
63 |
julius |
}
|
418 |
462 |
julius |
} // getDRegOut ()
|
419 |
63 |
julius |
|
420 |
|
|
//! Get the shifted out value.
|
421 |
|
|
|
422 |
|
|
//! This version is for small values. For large values it silently returns the
|
423 |
|
|
//! bottom 64 bits only.
|
424 |
|
|
|
425 |
|
|
//! @todo Should we give an error. Or is it useful to allow efficient access
|
426 |
|
|
//! to the bottom 64 bits?
|
427 |
|
|
|
428 |
|
|
//! @return The value shifted out (or the bottom 64 bits thereof if the
|
429 |
|
|
//! register is "large").
|
430 |
462 |
julius |
uint64_t TapActionDRScan::getDRegOut()
|
431 |
63 |
julius |
{
|
432 |
462 |
julius |
if (1 == dRegWordSize) {
|
433 |
|
|
return dRegOut;
|
434 |
|
|
} else {
|
435 |
|
|
return dRegOutArray[0];
|
436 |
|
|
}
|
437 |
|
|
} // getDRegOut ()
|
438 |
63 |
julius |
|
439 |
|
|
//! Utility to shift the bottom bit out of the dReg.
|
440 |
|
|
|
441 |
|
|
//! Two flavours depending on whether we have a "small" register
|
442 |
|
|
|
443 |
|
|
//! @return The bit shifted out.
|
444 |
462 |
julius |
bool TapActionDRScan::shiftDRegOut()
|
445 |
63 |
julius |
{
|
446 |
462 |
julius |
if (1 == dRegWordSize) // "Small" register
|
447 |
63 |
julius |
{
|
448 |
462 |
julius |
bool res = dRegIn & 1;
|
449 |
|
|
dRegIn >>= 1;
|
450 |
|
|
return res;
|
451 |
|
|
} else // "Large" register
|
452 |
|
|
{
|
453 |
|
|
bool res = (dRegInArray[0] & 1) == 1;
|
454 |
63 |
julius |
|
455 |
462 |
julius |
// Shift all but the first word along
|
456 |
|
|
for (int i = 0; i < (dRegWordSize - 1); i++) {
|
457 |
|
|
dRegInArray[i] =
|
458 |
|
|
(dRegInArray[i] >> 1) | (dRegInArray[i + 1] << 63);
|
459 |
|
|
}
|
460 |
63 |
julius |
|
461 |
462 |
julius |
// Shift the first word
|
462 |
|
|
dRegInArray[dRegWordSize - 1] >>= 1;
|
463 |
63 |
julius |
|
464 |
462 |
julius |
return res;
|
465 |
|
|
}
|
466 |
|
|
} // shiftDRegOut ()
|
467 |
63 |
julius |
|
468 |
|
|
//! Utility to shift the top bit into the dReg.
|
469 |
|
|
|
470 |
|
|
//! Two flavours depending on whether we have a "small" register
|
471 |
|
|
|
472 |
|
|
//! @param bitIn The bit to shift in the top
|
473 |
462 |
julius |
void TapActionDRScan::shiftDRegIn(bool bitIn)
|
474 |
63 |
julius |
{
|
475 |
462 |
julius |
if (1 == dRegWordSize) // "Small" register
|
476 |
|
|
{
|
477 |
|
|
dRegOut >>= 1; // Move all the existing bits right
|
478 |
63 |
julius |
|
479 |
462 |
julius |
if (bitIn) // OR any new bit in
|
480 |
|
|
{
|
481 |
|
|
uint64_t tmpBit = 1ULL << (dRegBitSize - 1);
|
482 |
|
|
dRegOut |= tmpBit;
|
483 |
|
|
}
|
484 |
|
|
} else // "Large" register
|
485 |
63 |
julius |
{
|
486 |
462 |
julius |
// Shift all but the first word along
|
487 |
|
|
for (int i = 0; i < (dRegWordSize - 1); i++) {
|
488 |
|
|
dRegOutArray[i] >>= 1;
|
489 |
|
|
dRegOutArray[i] |= dRegOutArray[i + 1] << 63;
|
490 |
|
|
}
|
491 |
|
|
|
492 |
|
|
// The first word is shifted and the new bit masked in
|
493 |
|
|
dRegOutArray[dRegWordSize - 1] >>= 1;
|
494 |
|
|
dRegOutArray[dRegWordSize - 1] |=
|
495 |
|
|
bitIn ? (topMask + 1) >> 1 : 0;
|
496 |
63 |
julius |
}
|
497 |
462 |
julius |
} // shiftDRegIn ()
|