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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [include/] [cfi_flash_BankLib.h] - Blame information for rev 815

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1 655 julius
//          _/             _/_/
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//        _/_/           _/_/_/
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//      _/_/_/_/         _/_/_/
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//      _/_/_/_/_/       _/_/_/              ____________________________________________ 
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//      _/_/_/_/_/       _/_/_/             /                                           / 
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//      _/_/_/_/_/       _/_/_/            /                                 28F256P30 / 
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//      _/_/_/_/_/       _/_/_/           /                                           /  
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//      _/_/_/_/_/_/     _/_/_/          /                                   256Mbit / 
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//      _/_/_/_/_/_/     _/_/_/         /                                single die / 
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//      _/_/_/ _/_/_/    _/_/_/        /                                           / 
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//      _/_/_/  _/_/_/   _/_/_/       /                  Verilog Behavioral Model / 
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//      _/_/_/   _/_/_/  _/_/_/      /                               Version 1.3 / 
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//      _/_/_/    _/_/_/ _/_/_/     /                                           /
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//      _/_/_/     _/_/_/_/_/_/    /           Copyright (c) 2010 Numonyx B.V. / 
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//      _/_/_/      _/_/_/_/_/    /___________________________________________/ 
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//      _/_/_/       _/_/_/_/      
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//      _/_/          _/_/_/  
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// 
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//     
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//             NUMONYX              
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// ****************************************************
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//
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// Block Library :
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//
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//      define the architecture of the blocks and banks
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//
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// ****************************************************
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  `include "cfi_flash_def.h"
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  `include "cfi_flash_data.h"
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  `include "cfi_flash_UserData.h"
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  `define BLOCK_dim              259
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  `define BLOCKDIM_range        0 : `BLOCK_dim - 1
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  `define BLOCKADDR_dim         16
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  `define BLOCKADDR_range       `BLOCKADDR_dim - 1 : 0
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// *********
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//
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//  Parameter Block & Main Block
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//
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// *********
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  `define ParameterBlock_num      4
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  `define ParameterBlock_size     16 // Size of Parameter Block (Kword)
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  `define MainBlock_num           255
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  `define MainBlock_size          64 // Size of Main Block (Kword)
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module BankLib;
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integer BlockBoundaryStartAddr [`BLOCK_dim - 1 : 0];        // Block Boundary Start Address
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integer BlockBoundaryEndAddr   [`BLOCK_dim - 1 : 0];        // Block Boundary End   Address
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integer count;
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initial
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  begin
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        begin: block_building
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                for (count = 0; count <= `BLOCK_dim - 1; count = count + 1)
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                        BuildBlockBoundary(`organization, count, BlockBoundaryStartAddr[count], BlockBoundaryEndAddr[count]);
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        end
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   end
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// ******************************************************************
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// 
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// TASK BuildBlockBoundary: Build the Blocks Boundaries in two arrays
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//
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// ******************************************************************
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  task BuildBlockBoundary;
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        input   organize;
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        input   n_block;
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        output  StartAddr;
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        output  EndAddr;
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        reg [8*6:1]  organize;
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        integer      n_block;
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        integer      StartAddr;
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        integer      EndAddr;
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  begin
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        if (organize == "top") begin
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                    if (n_block == 0) EndAddr = - 1;
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                    if (n_block > `MainBlock_num  - 1 && n_block <= `MainBlock_num + `ParameterBlock_num - 1) // parameter block
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                        begin
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                             StartAddr = EndAddr + 1;
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                            EndAddr   = StartAddr +  `ParameterBlock_size  * `Kword - 1;
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                        end
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                    else   // Main block
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                         begin
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                             StartAddr = EndAddr + 1;
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                             EndAddr   = StartAddr + `MainBlock_size * `Kword - 1;
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                         end
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        end else  begin // organize = "bottom"
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                    if (n_block == 0) EndAddr = - 1;
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                    if (n_block > `ParameterBlock_num - 1)
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                        begin
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                          StartAddr = (`ParameterBlock_num * `ParameterBlock_size * `Kword ) +
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                                  (n_block - `ParameterBlock_num) * `MainBlock_size * `Kword;
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                          EndAddr   = StartAddr +  `MainBlock_size * `Kword - 1;
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                        end
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//!
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                    else  //   parameter block
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                       begin
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                           StartAddr = EndAddr + 1;
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                           EndAddr   = StartAddr + `ParameterBlock_size * `Kword - 1;
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                       end
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       end
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//!$display("n_block=%d, StartAddr =%h,  EndAddr =%h", n_block, StartAddr ,  EndAddr);
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  end
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  endtask
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  // *********************************************
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  // FUNCTION getBlock : return block from address
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  //
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  // *********************************************
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  function [`INTEGER] getBlock;                     // BLOCK_dim in binary is 9 bit size 
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  input   address;
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  reg [`ADDRBUS_dim - 1 : 0] address;
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  reg found;
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  integer count;
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  begin
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  //  $display ("function getBlock got address %h", address);
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     count = 0;
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     found = 0;
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     while ((count <= `BLOCK_dim) && (! found))
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        begin
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           if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count])) found= 1;
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           else count = count + 1;
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        end
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     if (!found) $display("%t address= %h !Error in Block Library : specified block address is out of range",$time,address);
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     getBlock= count;
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  end
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  endfunction
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  // ***************************
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  //
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  // FUNCTION getBlockAddress :
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  //    return the block address
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  //
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  // ***************************
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  function [`ADDRBUS_dim - 1 : 0] getBlockAddress;
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  input block;
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  integer block;
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  begin
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        getBlockAddress = BlockBoundaryStartAddr[block];
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  end
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  endfunction
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  // *********************************************
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  //
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  // FUNCTION isParameterBlock : 
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  //    return true if the address 
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  //    is in a parameter block
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  //
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  // *********************************************
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  function isParameterBlock;
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  input   address;
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  reg [`ADDRBUS_dim - 1 : 0] address;
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  reg prm;
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  integer count;
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  begin
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        prm = `FALSE;
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         if (`organization=="bottom") begin
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                for (count = 0; count <= `ParameterBlock_num - 1; count = count + 1) begin: cycle
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                if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))
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                                begin
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                                        prm= `TRUE;
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                                        disable cycle;
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                                 end
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                end
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         end else begin
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               for (count = `BLOCK_dim - `ParameterBlock_num + 1; count <= `BLOCK_dim - 1; count = count + 1) begin: cycle1
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                        if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))
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                                begin
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                                        prm= `TRUE;
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                                        disable cycle1;
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                                 end
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              end
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         end
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        isParameterBlock = prm;
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  end
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  endfunction
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  // *********************************************
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  //
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  // FUNCTION isMainBlock : 
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  //    return true if the address is in a main block
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  //
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  // *********************************************
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  function isMainBlock;
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  input   address;
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246
  reg [`ADDRBUS_dim - 1 : 0] address;
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  reg main;
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  integer count;
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250
  begin
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        main = `FALSE;
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254
        if (`organization=="bottom") begin
255
                for (count = `BLOCK_dim - 1; count >= `BLOCK_dim - `ParameterBlock_num + 1; count = count - 1) begin: cycle2
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                if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))
258
                                begin
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                                        main = `TRUE;
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                                        disable cycle2;
261
                                end
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263
                end
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         end else begin
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               for (count = 0; count <= `MainBlock_num - 1; count = count + 1) begin: cycle3
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                        if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))
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                                begin
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                                        main = `TRUE;
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                                        disable cycle3;
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                                end
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               end
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         end
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        isMainBlock = main;
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  end
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  endfunction
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endmodule

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