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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [include/] [cfi_flash_BankLib.h] - Blame information for rev 828

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//          _/             _/_/
//        _/_/           _/_/_/
//      _/_/_/_/         _/_/_/
//      _/_/_/_/_/       _/_/_/              ____________________________________________ 
//      _/_/_/_/_/       _/_/_/             /                                           / 
//      _/_/_/_/_/       _/_/_/            /                                 28F256P30 / 
//      _/_/_/_/_/       _/_/_/           /                                           /  
//      _/_/_/_/_/_/     _/_/_/          /                                   256Mbit / 
//      _/_/_/_/_/_/     _/_/_/         /                                single die / 
//      _/_/_/ _/_/_/    _/_/_/        /                                           / 
//      _/_/_/  _/_/_/   _/_/_/       /                  Verilog Behavioral Model / 
//      _/_/_/   _/_/_/  _/_/_/      /                               Version 1.3 / 
//      _/_/_/    _/_/_/ _/_/_/     /                                           /
//      _/_/_/     _/_/_/_/_/_/    /           Copyright (c) 2010 Numonyx B.V. / 
//      _/_/_/      _/_/_/_/_/    /___________________________________________/ 
//      _/_/_/       _/_/_/_/      
//      _/_/          _/_/_/  
// 
//     
//             NUMONYX              
 
// ****************************************************
//
// Block Library :
//
//      define the architecture of the blocks and banks
//
// ****************************************************
 
  `include "cfi_flash_def.h"
  `include "cfi_flash_data.h"
  `include "cfi_flash_UserData.h"
 
  `define BLOCK_dim              259
  `define BLOCKDIM_range        0 : `BLOCK_dim - 1
  `define BLOCKADDR_dim         16
  `define BLOCKADDR_range       `BLOCKADDR_dim - 1 : 0
 
// *********
//
//  Parameter Block & Main Block
 
//
// *********
 
  `define ParameterBlock_num      4
  `define ParameterBlock_size     16 // Size of Parameter Block (Kword)
  `define MainBlock_num           255
  `define MainBlock_size          64 // Size of Main Block (Kword)
 
 
 
module BankLib;
 
integer BlockBoundaryStartAddr [`BLOCK_dim - 1 : 0];        // Block Boundary Start Address
integer BlockBoundaryEndAddr   [`BLOCK_dim - 1 : 0];        // Block Boundary End   Address
 
integer count;
 
initial
  begin
 
        begin: block_building
                for (count = 0; count <= `BLOCK_dim - 1; count = count + 1)
                        BuildBlockBoundary(`organization, count, BlockBoundaryStartAddr[count], BlockBoundaryEndAddr[count]);
 
        end
 
   end
 
 
// ******************************************************************
// 
// TASK BuildBlockBoundary: Build the Blocks Boundaries in two arrays
//
// ******************************************************************
 
  task BuildBlockBoundary;
 
        input   organize;
        input   n_block;
        output  StartAddr;
        output  EndAddr;
 
        reg [8*6:1]  organize;
        integer      n_block;
        integer      StartAddr;
        integer      EndAddr;
 
  begin
 
        if (organize == "top") begin
 
                    if (n_block == 0) EndAddr = - 1;
 
                    if (n_block > `MainBlock_num  - 1 && n_block <= `MainBlock_num + `ParameterBlock_num - 1) // parameter block
                        begin
                             StartAddr = EndAddr + 1;
                            EndAddr   = StartAddr +  `ParameterBlock_size  * `Kword - 1;
 
                        end
 
                    else   // Main block
                         begin
                             StartAddr = EndAddr + 1;
                             EndAddr   = StartAddr + `MainBlock_size * `Kword - 1;
                         end
 
        end else  begin // organize = "bottom"
 
                    if (n_block == 0) EndAddr = - 1;
 
                    if (n_block > `ParameterBlock_num - 1)
                        begin
                          StartAddr = (`ParameterBlock_num * `ParameterBlock_size * `Kword ) +
                                  (n_block - `ParameterBlock_num) * `MainBlock_size * `Kword;
                          EndAddr   = StartAddr +  `MainBlock_size * `Kword - 1;
                        end
//!
                    else  //   parameter block
                       begin
                           StartAddr = EndAddr + 1;
                           EndAddr   = StartAddr + `ParameterBlock_size * `Kword - 1;
                       end
 
       end
//!$display("n_block=%d, StartAddr =%h,  EndAddr =%h", n_block, StartAddr ,  EndAddr);
  end
  endtask
 
 
 
  // *********************************************
  // FUNCTION getBlock : return block from address
  //
  // *********************************************
 
  function [`INTEGER] getBlock;                     // BLOCK_dim in binary is 9 bit size 
 
  input   address;
 
  reg [`ADDRBUS_dim - 1 : 0] address;
  reg found;
  integer count;
 
  begin
  //  $display ("function getBlock got address %h", address);
     count = 0;
     found = 0;
     while ((count <= `BLOCK_dim) && (! found))
        begin
 
           if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count])) found= 1;
           else count = count + 1;
 
        end
 
     if (!found) $display("%t address= %h !Error in Block Library : specified block address is out of range",$time,address);
 
     getBlock= count;
 
  end
  endfunction
 
 
  // ***************************
  //
  // FUNCTION getBlockAddress :
  //    return the block address
  //
  // ***************************
 
  function [`ADDRBUS_dim - 1 : 0] getBlockAddress;
 
  input block;
 
  integer block;
 
  begin
 
        getBlockAddress = BlockBoundaryStartAddr[block];
 
  end
  endfunction
 
 
  // *********************************************
  //
  // FUNCTION isParameterBlock : 
  //    return true if the address 
  //    is in a parameter block
  //
  // *********************************************
 
  function isParameterBlock;
 
  input   address;
 
 
  reg [`ADDRBUS_dim - 1 : 0] address;
  reg prm;
  integer count;
 
  begin
 
        prm = `FALSE;
         if (`organization=="bottom") begin
 
                for (count = 0; count <= `ParameterBlock_num - 1; count = count + 1) begin: cycle
 
                if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))
                                begin
                                        prm= `TRUE;
                                        disable cycle;
                                 end
                end
         end else begin
               for (count = `BLOCK_dim - `ParameterBlock_num + 1; count <= `BLOCK_dim - 1; count = count + 1) begin: cycle1
 
 
                        if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))
                                begin
                                        prm= `TRUE;
                                        disable cycle1;
                                 end
              end
         end
 
        isParameterBlock = prm;
 
  end
  endfunction
 
 
  // *********************************************
  //
  // FUNCTION isMainBlock : 
  //    return true if the address is in a main block
  //
  // *********************************************
 
  function isMainBlock;
 
  input   address;
 
  reg [`ADDRBUS_dim - 1 : 0] address;
  reg main;
  integer count;
 
  begin
 
        main = `FALSE;
 
        if (`organization=="bottom") begin
                for (count = `BLOCK_dim - 1; count >= `BLOCK_dim - `ParameterBlock_num + 1; count = count - 1) begin: cycle2
 
                if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))
                                begin
                                        main = `TRUE;
                                        disable cycle2;
                                end
 
                end
         end else begin
               for (count = 0; count <= `MainBlock_num - 1; count = count + 1) begin: cycle3
 
 
                        if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))
                                begin
                                        main = `TRUE;
                                        disable cycle3;
                                end
               end
         end
        isMainBlock = main;
  end
  endfunction
 
 
endmodule

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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [include/] [cfi_flash_BankLib.h] - Blame information for rev 828

Line No.	Rev	Author	Line
1	655	julius	`// _/ _/_/`
2			`// _/_/ _/_/_/`
3			`// _/_/_/_/ _/_/_/`
4			`// _/_/_/_/_/ _/_/_/ ____________________________________________`
5			`// _/_/_/_/_/ _/_/_/ / /`
6			`// _/_/_/_/_/ _/_/_/ / 28F256P30 /`
7			`// _/_/_/_/_/ _/_/_/ / /`
8			`// _/_/_/_/_/_/ _/_/_/ / 256Mbit /`
9			`// _/_/_/_/_/_/ _/_/_/ / single die /`
10			`// _/_/_/ _/_/_/ _/_/_/ / /`
11			`// _/_/_/ _/_/_/ _/_/_/ / Verilog Behavioral Model /`
12			`// _/_/_/ _/_/_/ _/_/_/ / Version 1.3 /`
13			`// _/_/_/ _/_/_/ _/_/_/ / /`
14			`// _/_/_/ _/_/_/_/_/_/ / Copyright (c) 2010 Numonyx B.V. /`
15			`// _/_/_/ _/_/_/_/_/ /___________________________________________/`
16			`// _/_/_/ _/_/_/_/`
17			`// _/_/ _/_/_/`
18			`//`
19			`//`
20			`// NUMONYX`
21
22			`// ****************************************************`
23			`//`
24			`// Block Library :`
25			`//`
26			`// define the architecture of the blocks and banks`
27			`//`
28			`// ****************************************************`
29
30			`include "cfi_flash_def.h"
31			`include "cfi_flash_data.h"
32			`include "cfi_flash_UserData.h"
33
34			`define BLOCK_dim 259
35			`define BLOCKDIM_range 0 : `BLOCK_dim - 1
36			`define BLOCKADDR_dim 16
37			`define BLOCKADDR_range `BLOCKADDR_dim - 1 : 0
38
39			`// *********`
40			`//`
41			`// Parameter Block & Main Block`
42
43			`//`
44			`// *********`
45
46			`define ParameterBlock_num 4
47			`define ParameterBlock_size 16 // Size of Parameter Block (Kword)
48			`define MainBlock_num 255
49			`define MainBlock_size 64 // Size of Main Block (Kword)
50
51
52
53			`module BankLib;`
54
55			integer BlockBoundaryStartAddr [`BLOCK_dim - 1 : 0]; // Block Boundary Start Address
56			integer BlockBoundaryEndAddr [`BLOCK_dim - 1 : 0]; // Block Boundary End Address
57
58			`integer count;`
59
60			`initial`
61			`begin`
62
63			`begin: block_building`
64			for (count = 0; count <= `BLOCK_dim - 1; count = count + 1)
65			BuildBlockBoundary(`organization, count, BlockBoundaryStartAddr[count], BlockBoundaryEndAddr[count]);
66
67			`end`
68
69			`end`
70
71
72			`// ******************************************************************`
73			`//`
74			`// TASK BuildBlockBoundary: Build the Blocks Boundaries in two arrays`
75			`//`
76			`// ******************************************************************`
77
78			`task BuildBlockBoundary;`
79
80			`input organize;`
81			`input n_block;`
82			`output StartAddr;`
83			`output EndAddr;`
84
85			`reg [8*6:1] organize;`
86			`integer n_block;`
87			`integer StartAddr;`
88			`integer EndAddr;`
89
90			`begin`
91
92			`if (organize == "top") begin`
93
94			`if (n_block == 0) EndAddr = - 1;`
95
96			if (n_block > `MainBlock_num - 1 && n_block <= `MainBlock_num + `ParameterBlock_num - 1) // parameter block
97			`begin`
98			`StartAddr = EndAddr + 1;`
99			EndAddr = StartAddr + `ParameterBlock_size * `Kword - 1;
100
101			`end`
102
103			`else // Main block`
104			`begin`
105			`StartAddr = EndAddr + 1;`
106			EndAddr = StartAddr + `MainBlock_size * `Kword - 1;
107			`end`
108
109			`end else begin // organize = "bottom"`
110
111			`if (n_block == 0) EndAddr = - 1;`
112
113			if (n_block > `ParameterBlock_num - 1)
114			`begin`
115			StartAddr = (`ParameterBlock_num * `ParameterBlock_size * `Kword ) +
116			(n_block - `ParameterBlock_num) * `MainBlock_size * `Kword;
117			EndAddr = StartAddr + `MainBlock_size * `Kword - 1;
118			`end`
119			`//!`
120			`else // parameter block`
121			`begin`
122			`StartAddr = EndAddr + 1;`
123			EndAddr = StartAddr + `ParameterBlock_size * `Kword - 1;
124			`end`
125
126			`end`
127			`//!$display("n_block=%d, StartAddr =%h, EndAddr =%h", n_block, StartAddr , EndAddr);`
128			`end`
129			`endtask`
130
131
132
133			`// *********************************************`
134			`// FUNCTION getBlock : return block from address`
135			`//`
136			`// *********************************************`
137
138			function [`INTEGER] getBlock; // BLOCK_dim in binary is 9 bit size
139
140			`input address;`
141
142			reg [`ADDRBUS_dim - 1 : 0] address;
143			`reg found;`
144			`integer count;`
145
146			`begin`
147			`// $display ("function getBlock got address %h", address);`
148			`count = 0;`
149			`found = 0;`
150			while ((count <= `BLOCK_dim) && (! found))
151			`begin`
152
153			`if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count])) found= 1;`
154			`else count = count + 1;`
155
156			`end`
157
158			`if (!found) $display("%t address= %h !Error in Block Library : specified block address is out of range",$time,address);`
159
160			`getBlock= count;`
161
162			`end`
163			`endfunction`
164
165
166			`// ***************************`
167			`//`
168			`// FUNCTION getBlockAddress :`
169			`// return the block address`
170			`//`
171			`// ***************************`
172
173			function [`ADDRBUS_dim - 1 : 0] getBlockAddress;
174
175			`input block;`
176
177			`integer block;`
178
179			`begin`
180
181			`getBlockAddress = BlockBoundaryStartAddr[block];`
182
183			`end`
184			`endfunction`
185
186
187			`// *********************************************`
188			`//`
189			`// FUNCTION isParameterBlock :`
190			`// return true if the address`
191			`// is in a parameter block`
192			`//`
193			`// *********************************************`
194
195			`function isParameterBlock;`
196
197			`input address;`
198
199
200			reg [`ADDRBUS_dim - 1 : 0] address;
201			`reg prm;`
202			`integer count;`
203
204			`begin`
205
206			prm = `FALSE;
207			if (`organization=="bottom") begin
208
209			for (count = 0; count <= `ParameterBlock_num - 1; count = count + 1) begin: cycle
210
211			`if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))`
212			`begin`
213			prm= `TRUE;
214			`disable cycle;`
215			`end`
216			`end`
217			`end else begin`
218			for (count = `BLOCK_dim - `ParameterBlock_num + 1; count <= `BLOCK_dim - 1; count = count + 1) begin: cycle1
219
220
221			`if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))`
222			`begin`
223			prm= `TRUE;
224			`disable cycle1;`
225			`end`
226			`end`
227			`end`
228
229			`isParameterBlock = prm;`
230
231			`end`
232			`endfunction`
233
234
235			`// *********************************************`
236			`//`
237			`// FUNCTION isMainBlock :`
238			`// return true if the address is in a main block`
239			`//`
240			`// *********************************************`
241
242			`function isMainBlock;`
243
244			`input address;`
245
246			reg [`ADDRBUS_dim - 1 : 0] address;
247			`reg main;`
248			`integer count;`
249
250			`begin`
251
252			main = `FALSE;
253
254			if (`organization=="bottom") begin
255			for (count = `BLOCK_dim - 1; count >= `BLOCK_dim - `ParameterBlock_num + 1; count = count - 1) begin: cycle2
256
257			`if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))`
258			`begin`
259			main = `TRUE;
260			`disable cycle2;`
261			`end`
262
263			`end`
264			`end else begin`
265			for (count = 0; count <= `MainBlock_num - 1; count = count + 1) begin: cycle3
266
267
268			`if ((BlockBoundaryStartAddr[count] <= address) && (address <= BlockBoundaryEndAddr[count]))`
269			`begin`
270			main = `TRUE;
271			`disable cycle3;`
272			`end`
273			`end`
274			`end`
275			`isMainBlock = main;`
276			`end`
277			`endfunction`
278
279
280			`endmodule`