OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [c/] [Makefile] - Blame information for rev 397

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 40 julius
######################################################################
2
####                                                              ####
3
####  VPI Makefile                                                ####
4
####                                                              ####
5
####  Description                                                 ####
6
####  Makefile for VPI libraries                                  ####
7
####                                                              ####
8
####  To Do:                                                      ####
9
####    Add compatability for other simulators (Cadence, etc.)    ####
10
####                                                              ####
11
####  Author(s):                                                  ####
12
####      - jb, jb@orsoc.se                                       ####
13
####                                                              ####
14
####                                                              ####
15
######################################################################
16
####                                                              ####
17
#### Copyright (C) 2009 Authors and OPENCORES.ORG                 ####
18
####                                                              ####
19
#### This source file may be used and distributed without         ####
20
#### restriction provided that this copyright statement is not    ####
21
#### removed from the file and that any derivative work contains  ####
22
#### the original copyright notice and the associated disclaimer. ####
23
####                                                              ####
24
#### This source file is free software; you can redistribute it   ####
25
#### and/or modify it under the terms of the GNU Lesser General   ####
26
#### Public License as published by the Free Software Foundation; ####
27
#### either version 2.1 of the License, or (at your option) any   ####
28
#### later version.                                               ####
29
####                                                              ####
30
#### This source is distributed in the hope that it will be       ####
31
#### useful, but WITHOUT ANY WARRANTY; without even the implied   ####
32
#### warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ####
33
#### PURPOSE.  See the GNU Lesser General Public License for more ####
34
#### details.                                                     ####
35
####                                                              ####
36
#### You should have received a copy of the GNU Lesser General    ####
37
#### Public License along with this source; if not, download it   ####
38
#### from http://www.opencores.org/lgpl.shtml                     ####
39
####                                                              ####
40
######################################################################
41
 
42
SOURCE_FILES= jp_vpi.c rsp-rtl_sim.c gdb.c
43
 
44
# Uncomment this line to enable debugging of all VPI code
45
 
46
#DEBUG_DEFINES=-DDEBUG -DDEBUG2 -DDEBUG_ON=1 -DDEBUG_GDB=1 -DDEBUG_CMDS=1
47
 
48 397 julius
# Due to a difference in the type for a memory array passed back to the VPI
49
# interface, we must indicate whether we're compiling the jp_vpi module for use
50
# with Modelsim or with Icarus. We do this via defines passed at compile time,
51
# -DSIMULATOR_VPI
52
 
53
# Set V=1 when calling make to enable verbose output
54
# mainly for debugging purposes.
55
ifeq ($(V), 1)
56
Q=
57
QUIET=
58
else
59
Q ?=@
60
QUIET=-quiet
61
endif
62
 
63 40 julius
all: jp_vpi
64
 
65
jp_vpi: $(SOURCE_FILES)
66 397 julius
        iverilog-vpi $(SOURCE_FILES) $(DEBUG_DEFINES) -DICARUS_VPI
67 40 julius
 
68 397 julius
SOURCE_FILES= jp_vpi.c rsp-rtl_sim.c gdb.c
69
OBJ_FILES=    jp_vpi.o rsp-rtl_sim.o gdb.o
70
 
71
MODELTECH_INC_PATH=$(MGC_PATH)/modeltech/include
72
# Modelsim VPI compile commands
73
msim_jp_vpi.sl: $(OBJ_FILES)
74
        ld -shared -E -o $@ $?
75
%.o: %.c
76
        $(Q)echo; echo "\t### Building VPI debug components for Modelsim ###"; echo;
77
        $(Q)gcc -g ${DEBUG_DEFINES} -I${MODELTECH_INC_PATH} \
78
        -l${MODELTECH_INC_PATH} \
79
        -DMODELSIM_VPI \
80
        -c $< -o $*.o
81
 
82 40 julius
clean:
83 397 julius
        $(Q)echo; echo "\t### Cleaning VPI debug directory ###"; echo;
84
        $(Q)rm -f *.o *~ jp_vpi.vpi msim_jp_vpi.sl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.