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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [c/] [Makefile] - Blame information for rev 56

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Line No. Rev Author Line
1 40 julius
######################################################################
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####                                                              ####
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####  VPI Makefile                                                ####
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####                                                              ####
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####  Description                                                 ####
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####  Makefile for VPI libraries                                  ####
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####                                                              ####
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####  To Do:                                                      ####
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####    Add compatability for other simulators (Cadence, etc.)    ####
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####                                                              ####
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####  Author(s):                                                  ####
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####      - jb, jb@orsoc.se                                       ####
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####                                                              ####
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####                                                              ####
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######################################################################
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####                                                              ####
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#### Copyright (C) 2009 Authors and OPENCORES.ORG                 ####
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####                                                              ####
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#### This source file may be used and distributed without         ####
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#### restriction provided that this copyright statement is not    ####
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#### removed from the file and that any derivative work contains  ####
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#### the original copyright notice and the associated disclaimer. ####
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####                                                              ####
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#### This source file is free software; you can redistribute it   ####
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#### and/or modify it under the terms of the GNU Lesser General   ####
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#### Public License as published by the Free Software Foundation; ####
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#### either version 2.1 of the License, or (at your option) any   ####
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#### later version.                                               ####
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####                                                              ####
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#### This source is distributed in the hope that it will be       ####
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#### useful, but WITHOUT ANY WARRANTY; without even the implied   ####
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#### warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ####
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#### PURPOSE.  See the GNU Lesser General Public License for more ####
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#### details.                                                     ####
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####                                                              ####
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#### You should have received a copy of the GNU Lesser General    ####
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#### Public License along with this source; if not, download it   ####
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#### from http://www.opencores.org/lgpl.shtml                     ####
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####                                                              ####
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######################################################################
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SOURCE_FILES= jp_vpi.c rsp-rtl_sim.c gdb.c
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# Uncomment this line to enable debugging of all VPI code
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#DEBUG_DEFINES=-DDEBUG -DDEBUG2 -DDEBUG_ON=1 -DDEBUG_GDB=1 -DDEBUG_CMDS=1
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all: jp_vpi
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jp_vpi: $(SOURCE_FILES)
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        iverilog-vpi $(SOURCE_FILES) $(DEBUG_DEFINES)
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clean:
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        rm -f *.o *~ jp_vpi.vpi

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