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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [backend/] [par/] [README] - Blame information for rev 408

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1 408 julius
Actel place and route environment
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Backend flow post-synthesis through to programming file can be performed here.
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The scripts are designed to run the Actel backend tools in batch/shell mode.
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All make commands should be run in the run/ path.
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Performing place and route:
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If the settings in bin/Makefile are what is desired, then a simple
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$ make all
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will perform all steps from synthesis through to layout. The result will be the
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.adb file located in the run/ path.
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To alter the configuration (partially seen by running 'make print-config')
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inspect bin/Makefile to see the various options. To see the script generated
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which is passed to the Actel Designer, run
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$ make create-compile-par.tcl
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while also setting all variables as desired on the command line, and inspect
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the resulting TCL file to ensure it is correct.
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When running 'make all', the constraint SDC and PDC files will be automatically
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generated by the script, and will be left in the run/ path.
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Both PDC and SDC are dependent upon the defines in the RTL Verilog file
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design_defines.v - to see what modules and options are set in design_defines.v
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run:
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$ make print-defines
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Among the printed information will be which modules where enabled, and the PDC
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and SDCs are generated based on this.
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See the main Makefile, bin/Makefile, and the rule for $(SDC_FILE) to add or
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modify timing rules.
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To print the configuration of the makefile (targeted FPGA part and family, tool
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settings, and board I/O bonfiguration) run:
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$ make print-config
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PDC files:
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The physical constraints generation system may seem overly compilcated to begin
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with, but is design to make it easy and simple to add additional board and
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module support, switch the design between boards, or modify existing
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configurations.
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The physical constraints file generation starts with defining some variables
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with pin numbers, corresponding to the actual FPGA pins, depending on the FPGA
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board. At present, the only CPU board supported is the ORSoC CPU board pin out.
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The variables assigned pin numbers are in the bin/orsoccpuboard.mkpins file.
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This file is design to be included by other files, wishing to use the ORSoC CPU
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board variables (pin numbers). The variables in the CPU board file are then
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used by other files, namely files which define uses for expansion pins on the
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CPU board. For example, the two headers, JP1 and JP6, and their associated
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variables from the ORSoC CPU board .mkpins file are used in the
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orsocexpboard.mkpins file. Support for other I/O boards could be added by
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creating a new .mkpins file, and creating a list of new, appropriate variable
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names corresponding to the pins from the CPU board (in the ORSoC CPU board's
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case, the JP1 and JP6 header pin variables.)
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Finally, the variables for each actual I/O in the design must be assigned
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something. The .mkpinassigns do this. They tie together the CPU and any I/O
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board variable assigns, making it simple and easy to assign the variables used
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in the Makefile during PDC generation, to the variables created in the .mkpins
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files. The three main parts, then, the CPU board .mkpins file, expansion board
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.mkpins file, overall board .mkpinassigns file and Makefile PDC rule are the
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components to generating a PDC.
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Of course, a .mkpinassigns file can also simply contain raw pin numbers for
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each I/O port pin, or include a single .mkpins file with just a single board
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definition. The idea is it's highly modular and configurable before doing the
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final define of each I/O port's signal.
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Every possible I/O from the design has an entry in the $(PDC_FILE) rule of the
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Actel backend PAR Makefile. Almost all are surrounded by if statements checking
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for the corresponding module's inclusion in the design.
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Set the overall I/O config .mkpinassigns file by setting BOARD_CONFIG at make
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time. The default is orsoccpuexpio.mkpinassigns. All these files should reside
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in the bin/ path.
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$ make all BOARD_CONFIG=mynew.mkpinassigns
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To test the generated PDC file, do
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$ make pdc_file BOARD_CONFIG=mynew.mkpinassigns
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