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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [backend/] [par/] [bin/] [Makefile] - Blame information for rev 544

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Line No. Rev Author Line
1 408 julius
# Script to do compilation in Actel's tools then PAR.
2
# Need windows Libero for bitgen
3
#
4
# Is easy to target to other versions of ORSoC dev board:
5
#       for old A3P1000, 25MHz board:
6
#$ make FPGA_FAMILY=ProASIC3 FPGA_PART=A3P1000 all
7
#
8
#
9
# Can also set following environment variables to have the correspondingly
10
# affect the placer:
11
# PLACE_INCREMENTAL=on
12
# ROUTE_INCREMENTAL=on
13
# PLACER_HIGH_EFFORT=on
14
#
15
# So command above would look like:
16
#$ make FPGA_FAMILY=ProASIC3 FPGA_PART=A3P1000 all PLACE_INCREMENTAL=on ROUTE_INCREMENTAL=on PLACER_HIGH_EFFORT=on
17
#
18
 
19
# Name of the directory we're currently in
20
CUR_DIR=$(shell pwd)
21
 
22 542 julius
# The root path of the whole project
23
BOARD_ROOT ?=$(CUR_DIR)/../../..
24
include $(BOARD_ROOT)/Makefile.inc
25
 
26 408 julius
VENDOR_TCL_SHELL=acttclsh
27
 
28 542 julius
DESIGN_TOP_NAME=$(DESIGN_NAME)_top
29
PROJ_ADB_FILE_NAME=$(DESIGN_NAME).adb
30 408 julius
PROJ_ADB_FILE=$(PROJ_ADB_FILE_NAME)
31
 
32
# Required EDIF file names
33 542 julius
EDIF_NAME=$(DESIGN_TOP_NAME).edn
34
PROJ_EDF_FILE=$(BOARD_SYN_DIR)/out/$(EDIF_NAME)
35 408 julius
 
36
# TCL script names
37
TCL_SCRIPT_START=start.tcl
38
TCL_SCRIPT_COMPILE=compile.tcl
39
TCL_SCRIPT_PAR=par.tcl
40
TCL_SCRIPT_CREATE_COMPILE_PAR=create-compile-par.tcl
41 439 julius
TCL_SCRIPT_CREATE_COMPILE_PAR_BITGEN=create-compile-par-bitgen.tcl
42 408 julius
TCL_SCRIPT_REPORT=report.tcl
43
TCL_SCRIPT_BITGEN=bitgen.tcl
44
# Generate these every time
45
.PHONY: $(TCL_SCRIPT_START) $(TCL_SCRIPT_COMPILE) $(TCL_SCRIPT_PAR) $(TCL_SCRIPT_BITGEN)
46
 
47
 
48
# TCL script generation parameters
49
# Potentially we want more here!
50
# All are assigned with ?= allowing them to be redfined on the command line
51
 
52
FPGA_FAMILY ?=ProASIC3E
53
FPGA_PART ?=A3PE1500
54
FPGA_PACKAGE ?=\"208 PQFP\"
55
FPGA_VOLTAGE ?=1.5
56
#FPGA_SPEED_GRADE ?=-2
57
FPGA_SPEED_GRADE ?=STD
58
FPGA_TEMP_RANGE=COM # either COM or IND
59
FPGA_VOLT_RANGE=COM # either COM or IND
60
COMP_DIR ?=parcomp
61
 
62
# Tool effort settings
63
# Set to 'on' to enable them
64
PLACE_INCREMENTAL ?= off
65
ROUTE_INCREMENTAL ?= off
66
PLACER_HIGH_EFFORT ?= off
67
 
68 542 julius
PDC_FILE ?=$(DESIGN_NAME).pdc
69
SDC_FILE ?=$(DESIGN_NAME).sdc
70 408 julius
 
71
 
72 542 julius
#DEFINES_FILE_CUTOFF=$(shell grep -n "end of included module defines" $(PROJECT_VERILOG_DEFINES) | cut -d ':' -f 1)
73
#DESIGN_DEFINES=$(shell cat $(PROJECT_VERILOG_DEFINES) | sed s://.*::g | sed s:\`:\#:g | sed 's:^[ ]*::' | awk '{print};/^\#define/{printf "_%s=%s\n",$$2,$$2}' | grep -v PERIOD | cpp -P | sed s:^_::g | sed s:=$$::g )
74 408 julius
# Rule to look at what defines are being extracted from main file
75 542 julius
#print-defines:
76
#       @echo; echo "\t### Design defines ###"; echo
77
#       @echo "\tParsing "$(PROJECT_VERILOG_DEFINES)" and exporting:"
78
#       @echo $(DESIGN_DEFINES)
79 408 julius
 
80
# Rule to print out current config of current session
81
print-config:
82
        @echo; echo "\t### PAR make configuration ###"; echo
83
        @echo "\tFPGA_FAMILY="$(FPGA_FAMILY)
84
        @echo "\tFPGA_PART="$(FPGA_PART)
85
        @echo "\tFPGA_PACKAGE="$(FPGA_PACKAGE)
86
        @echo "\tFPGA_VOLTAGE="$(FPGA_VOLTAGE)
87
        @echo "\tFPGA_SPEED_GRADE="$(FPGA_SPEED_GRADE)
88
        @echo "\tFPGA_TEMP_RANGE="$(FPGA_TEMP_RANGE)
89
        @echo "\tFPGA_VOLT_RANGE="$(FPGA_VOLT_RANGE)
90
        @echo "\tPLACE_INCREMENTAL="$(PLACE_INCREMENTAL)
91
        @echo "\tROUTE_INCREMENTAL="$(ROUTE_INCREMENTAL)
92
        @echo "\tPLACER_HIGH_EFFORT="$(PLACER_HIGH_EFFORT)
93
        @echo
94
        @echo "\tBackend pinout script:"
95
        @echo "\tBOARD_CONFIG="$(BOARD_CONFIG)
96
 
97
TIME_CMD=time -p
98
 
99
# Rule for everything from, potentially, synthesis up to PAR
100 439 julius
all: print-config print-defines create-compile-par-bitgen
101 408 julius
 
102
# Not possible to do programming file generation under Linux
103
# not with the free  tools
104
bitgen: $(TCL_SCRIPT_BITGEN)
105
        $(TIME_CMD) $(VENDOR_TCL_SHELL) $<
106
 
107
# Leave this with no pre-reqs so we can call it seperately
108
create-compile-par: sdc-file pdc-file $(PROJ_EDF_FILE) $(TCL_SCRIPT_CREATE_COMPILE_PAR)
109
        $(TIME_CMD) $(VENDOR_TCL_SHELL) $(TCL_SCRIPT_CREATE_COMPILE_PAR)
110
 
111 439 julius
create-compile-par-bitgen: sdc-file pdc-file $(PROJ_EDF_FILE) $(TCL_SCRIPT_CREATE_COMPILE_PAR_BITGEN)
112
        $(TIME_CMD) $(VENDOR_TCL_SHELL) $(TCL_SCRIPT_CREATE_COMPILE_PAR_BITGEN)
113
 
114 408 julius
par: $(TCL_SCRIPT_PAR)
115
        $(TIME_CMD) $(VENDOR_TCL_SHELL) $<
116
 
117
compile: $(TCL_SCRIPT_COMPILE)
118
        $(TIME_CMD) $(VENDOR_TCL_SHELL) $<
119
 
120
create: print-config print-defines sdc-file pdc-file $(PROJ_ADB_FILE)
121
 
122
report: $(TCL_SCRIPT_REPORT)
123
        $(TIME_CMD) $(VENDOR_TCL_SHELL) $<
124
 
125
$(PROJ_ADB_FILE): $(PROJ_EDF_FILE) $(TCL_SCRIPT_START)
126
        $(TIME_CMD) $(VENDOR_TCL_SHELL) $(TCL_SCRIPT_START)
127
 
128
$(PROJ_EDF_FILE):
129 542 julius
        $(MAKE) -C $(BOARD_SYN_DIR)/run all
130 408 julius
 
131
create-compile: create compile
132
 
133
clean:
134
        rm -rf *.rpt *.log *~ *.tcl *.lok *.tmp *.dtf $(SDC_FILE) $(PDC_FILE) *.adb
135
 
136
clean-syn:
137 542 julius
        $(MAKE) -C $(BOARD_SYN_DIR)/run distclean
138 408 julius
 
139
clean-sw:
140
        $(Q) echo; echo "\t### Cleaning simulation sw directories ###"; echo;
141 542 julius
        $(MAKE) -C $(COMMON_SW_DIR)/lib distclean
142 408 julius
 
143
 
144 449 julius
distclean: clean-sw clean-syn clean
145 408 julius
 
146
STEP_NAME=$(shell echo $(TCL_FILE) | cut -d '.' -f 1)
147
 
148
# Rule to create the different steps of compilation with the Actel Designer
149
# tool.
150
# We need to create dollar signs ($) to dereference variables in the TCL
151
# scripts, but we also don't want make or bash thinking the variables we write
152
# with $s on the front are for them.. so we separate them from the actual
153
# variable name with ending and beginning the strings again, eg: $$""varname ..
154
 
155
 
156
# Just create the project
157
$(TCL_SCRIPT_START):
158
        TCL_FILE=$@ $(MAKE) tcl-common
159
        $(Q)echo "run_designer \"Starting new project\" \"" >> $@
160
        TCL_FILE=$@ $(MAKE) dump-actel-create-project-tcl
161
        $(Q)echo "\"">> $@
162
        $(Q)echo >> $@
163
 
164
# Open and compile the project's netlist
165
$(TCL_SCRIPT_COMPILE):
166
        TCL_FILE=$@ $(MAKE) tcl-common
167
        $(Q)echo "run_designer \"Compiling\" \" " >> $@
168
        $(Q)echo "  open_design $$""proj_name.adb " >> $(TCL_FILE)
169
        TCL_FILE=$@ $(MAKE) dump-actel-compile-project-tcl
170
        $(Q)echo "\"">> $@
171
 
172
# Import SDC and do place and route
173
$(TCL_SCRIPT_PAR):
174
        TCL_FILE=$@ $(MAKE) tcl-common
175
        $(Q)echo "run_designer \"PAR\" \" " >> $@
176
        $(Q)echo "  open_design $$""proj_name.adb " >> $@
177
        TCL_FILE=$@ $(MAKE) dump-actel-par-project-tcl
178
        $(Q)echo "\"">> $@
179
 
180
# Generate programming file
181
$(TCL_SCRIPT_BITGEN):
182
        TCL_FILE=$@ $(MAKE) tcl-common
183
        $(Q)echo "run_designer \"exporting PDB file\" \" " >> $@
184
        $(Q)echo "  open_design $$""proj_name.adb " >> $@
185
        TCL_FILE=$@ $(MAKE) dump-actel-bitgen-project-tcl
186
        $(Q)echo "\"">> $@
187
 
188
# Generate reports
189
$(TCL_SCRIPT_REPORT):
190
        TCL_FILE=$@ $(MAKE) tcl-common
191
        $(Q)echo "run_designer \"Generating timing reports\" \" " >> $@
192
        $(Q)echo "  open_design $$""proj_name.adb " >> $@
193
        TCL_FILE=$@ $(MAKE) dump-actel-report-project-tcl
194
        $(Q)echo "\"">> $@
195
 
196
# Do project creation, compile and PAR in one single run of the tool
197
$(TCL_SCRIPT_CREATE_COMPILE_PAR):
198
        TCL_FILE=$@ $(MAKE) tcl-common
199
        $(Q)echo "run_designer \"Create compile and PAR design project\" \" " >> $@
200
        TCL_FILE=$@ $(MAKE) dump-actel-create-project-tcl
201
        TCL_FILE=$@ $(MAKE) dump-actel-compile-project-tcl
202
        TCL_FILE=$@ $(MAKE) dump-actel-par-project-tcl
203
        $(Q)echo "\"">> $@
204
        $(Q)echo >> $@
205
 
206 439 julius
# Do project creation, compile and PAR in one single run of the tool
207
$(TCL_SCRIPT_CREATE_COMPILE_PAR_BITGEN):
208
        TCL_FILE=$@ $(MAKE) tcl-common
209
        $(Q)echo "run_designer \"Create compile and PAR and generate programming file\" \" " >> $@
210
        TCL_FILE=$@ $(MAKE) dump-actel-create-project-tcl
211
        TCL_FILE=$@ $(MAKE) dump-actel-compile-project-tcl
212
        TCL_FILE=$@ $(MAKE) dump-actel-par-project-tcl
213
        TCL_FILE=$@ $(MAKE) dump-actel-bitgen-project-tcl
214
        $(Q)echo "\"">> $@
215
        $(Q)echo >> $@
216
 
217 408 julius
# The different texts that we dump out for the different sets of command files
218
 
219
# This is the common header, setting variables in the TCL file
220
tcl-common:
221
        $(Q)rm -f $(TCL_FILE);
222
        $(Q)echo; echo "\tGenerating "$(TCL_FILE); echo
223
        $(Q)echo "set compile_directory     "$(COMP_DIR) >> $(TCL_FILE)
224 542 julius
        $(Q)echo "set proj_name             "$(DESIGN_NAME) >> $(TCL_FILE)
225
        $(Q)echo "set top_name              "$(DESIGN_TOP_NAME) >> $(TCL_FILE)
226 408 julius
        $(Q)echo "set family                "$(FPGA_FAMILY) >> $(TCL_FILE)
227
        $(Q)echo "set part                  "$(FPGA_PART) >> $(TCL_FILE)
228
        $(Q)echo "set package               "$(FPGA_PACKAGE) >> $(TCL_FILE)
229
        $(Q)echo "set pdc_filename          "$(PDC_FILE) >> $(TCL_FILE)
230
        $(Q)echo "set sdc_filename          "$(SDC_FILE) >> $(TCL_FILE)
231
        $(Q)echo >> $(TCL_FILE)
232
        $(Q)echo "  proc run_designer {message script} {" >> $(TCL_FILE)
233
        $(Q)echo "    puts \"Designer: $$""message\"" >> $(TCL_FILE)
234
        $(Q)echo "    set f [open designer.tcl w]" >> $(TCL_FILE)
235
        $(Q)echo "    puts $$""f $$""script" >> $(TCL_FILE)
236
        $(Q)echo "    close $$""f " >> $(TCL_FILE)
237
        $(Q)echo "    puts [exec designer SCRIPT:designer.tcl LOGFILE:"$(STEP_NAME)".log]" >> $(TCL_FILE)
238
        $(Q)echo "}" >> $(TCL_FILE)
239
        $(Q)echo >> $(TCL_FILE)
240
 
241
# TCL commands to create and setup a new project in Designer
242
dump-actel-create-project-tcl:
243
        $(Q)echo "  new_design " \\ >> $(TCL_FILE)
244
        $(Q)echo "    -name $$""proj_name " \\ >> $(TCL_FILE)
245
        $(Q)echo "    -family $$""family " \\ >> $(TCL_FILE)
246
        $(Q)echo "    -path ." >> $(TCL_FILE)
247
        $(Q)echo "  set_device " \\ >> $(TCL_FILE)
248
        $(Q)echo "    -die $$""part " \\ >> $(TCL_FILE)
249
        $(Q)echo "    -package \\\"$$""package\\\" " \\ >> $(TCL_FILE)
250
        $(Q)echo "    -speed "$(FPGA_SPEED_GRADE)" " \\ >> $(TCL_FILE)
251
        $(Q)echo "    -voltage "$(FPGA_VOLTAGE)" " \\ >> $(TCL_FILE)
252
        $(Q)echo "    -iostd LVTTL " \\ >> $(TCL_FILE)
253
        $(Q)echo "    -jtag yes " \\ >> $(TCL_FILE)
254
        $(Q)echo "    -probe yes " \\ >> $(TCL_FILE)
255
        $(Q)echo "    -trst yes " \\ >> $(TCL_FILE)
256
        $(Q)echo "    -temprange "$(FPGA_TEMP_RANGE)" "  \\ >> $(TCL_FILE)
257
        $(Q)echo "    -voltrange "$(FPGA_VOLT_RANGE)" "  >> $(TCL_FILE)
258
        $(Q)echo "  import_source " \\ >> $(TCL_FILE)
259
        $(Q)echo "    -format edif " \\ >> $(TCL_FILE)
260
        $(Q)echo "    -edif_flavor GENERIC "$(PROJ_EDF_FILE)" "\\ >> $(TCL_FILE)
261
        $(Q)echo "    -format pdc " \\ >> $(TCL_FILE)
262
        $(Q)echo "    -abort_on_error yes $$""pdc_filename " \\ >> $(TCL_FILE)
263
        $(Q)echo "    -merge_physical yes " \\ >> $(TCL_FILE)
264
        $(Q)echo "    -merge_timing yes " >> $(TCL_FILE)
265
        $(Q)echo "  save_design $$""proj_name.adb " >> $(TCL_FILE)
266
 
267
# TCL commands to compile a project in Designer
268
dump-actel-compile-project-tcl:
269
        $(Q)echo "  compile " \\ >> $(TCL_FILE)
270
        $(Q)echo "    -pdc_abort_on_error on " \\ >> $(TCL_FILE)
271
        $(Q)echo "    -pdc_eco_display_unmatched_objects off " \\ >> $(TCL_FILE)
272
        $(Q)echo "    -pdc_eco_max_warnings 10000 " \\ >> $(TCL_FILE)
273
        $(Q)echo "    -demote_globals off " \\ >> $(TCL_FILE)
274
        $(Q)echo "    -demote_globals_max_fanout 12 " \\ >> $(TCL_FILE)
275
        $(Q)echo "    -promote_globals off " \\ >> $(TCL_FILE)
276
        $(Q)echo "    -promote_globals_min_fanout 200 " \\ >> $(TCL_FILE)
277
        $(Q)echo "    -promote_globals_max_limit 0 " \\ >> $(TCL_FILE)
278
        $(Q)echo "    -localclock_max_shared_instances 12 " \\ >> $(TCL_FILE)
279
        $(Q)echo "    -localclock_buffer_tree_max_fanout 12 " \\ >> $(TCL_FILE)
280
        $(Q)echo "    -combine_register off " \\ >> $(TCL_FILE)
281
        $(Q)echo "    -delete_buffer_tree off " \\ >> $(TCL_FILE)
282
        $(Q)echo "    -delete_buffer_tree_max_fanout 12 " \\ >> $(TCL_FILE)
283
        $(Q)echo "    -report_high_fanout_nets_limit 10 " >> $(TCL_FILE)
284
        $(Q)echo "  save_design $$""proj_name.adb " >> $(TCL_FILE)
285
 
286
# TCL commands to ipmort SDC and do PAR on project
287
dump-actel-par-project-tcl:
288
        $(Q)echo "  import_aux " \\ >> $(TCL_FILE)
289
        $(Q)echo "    -format sdc $$""sdc_filename     " >> $(TCL_FILE)
290
        $(Q)echo "  layout " \\ >> $(TCL_FILE)
291
        $(Q)echo "    -timing_driven " \\ >> $(TCL_FILE)
292
        $(Q)echo "    -run_placer on " \\ >> $(TCL_FILE)
293
        $(Q)echo "    -place_incremental "$(PLACE_INCREMENTAL) \\ >> $(TCL_FILE)
294
        $(Q)echo "    -run_router on " \\ >> $(TCL_FILE)
295
        $(Q)echo "    -route_incremental "$(ROUTE_INCREMENTAL) \\ >> $(TCL_FILE)
296
        $(Q)echo "    -placer_high_effort "$(PLACER_HIGH_EFFORT) >> $(TCL_FILE)
297
        $(Q)echo "  save_design $$""proj_name.adb " >> $(TCL_FILE)
298
 
299
# TCL commands to generate programming file (PDB) from project
300
dump-actel-bitgen-project-tcl:
301
        $(Q)echo "  export " \\ >> $(TCL_FILE)
302
        $(Q)echo "    -format pdb " \\ >> $(TCL_FILE)
303
        $(Q)echo "    -feature prog_fpga " \\ >> $(TCL_FILE)
304
        $(Q)echo "    $$""proj_name.pdb " >> $(TCL_FILE)
305
        $(Q)echo "  save_design $$""proj_name.adb " >> $(TCL_FILE)
306
 
307
# TCL commands to generate timing reports of project
308
dump-actel-report-project-tcl:
309
        $(Q)echo "  report " \\ >> $(TCL_FILE)
310
        $(Q)echo "  -type timer " \\ >> $(TCL_FILE)
311
        $(Q)echo "  -analysis max " \\ >> $(TCL_FILE)
312
        $(Q)echo "  -print_summary yes " \\ >> $(TCL_FILE)
313
        $(Q)echo "  -use_slack_threshold no " \\ >> $(TCL_FILE)
314
        $(Q)echo "  -print_paths yes " \\ >> $(TCL_FILE)
315
        $(Q)echo "  -max_paths 5 " \\ >> $(TCL_FILE)
316
        $(Q)echo "  -max_expanded_paths 1 " \\ >> $(TCL_FILE)
317
        $(Q)echo "  -include_user_sets no " \\ >> $(TCL_FILE)
318
        $(Q)echo "  -include_pin_to_pin yes " \\ >> $(TCL_FILE)
319
        $(Q)echo "  -select_clock_domains no " \\ >> $(TCL_FILE)
320 542 julius
        $(Q)echo "   "$(DESIGN_NAME)"-timing.rpt " >> $(TCL_FILE)
321 408 julius
        $(Q)echo "  report " \\ >> $(TCL_FILE)
322
        $(Q)echo "  -type timing_violations " \\ >> $(TCL_FILE)
323
        $(Q)echo "  -analysis max " \\ >> $(TCL_FILE)
324
        $(Q)echo "  -use_slack_threshold no " \\ >> $(TCL_FILE)
325
        $(Q)echo "  -limit_max_paths yes " \\ >> $(TCL_FILE)
326
        $(Q)echo "  -max_paths 100 " \\ >> $(TCL_FILE)
327
        $(Q)echo "  -max_expanded_paths 0 " \\ >> $(TCL_FILE)
328 542 julius
        $(Q)echo "   "$(DESIGN_NAME)"-timviol.rpt " >> $(TCL_FILE)
329 408 julius
        $(Q)echo "  report " \\ >> $(TCL_FILE)
330
        $(Q)echo "  -type timing_violations " \\ >> $(TCL_FILE)
331
        $(Q)echo "  -analysis min " \\ >> $(TCL_FILE)
332
        $(Q)echo "  -use_slack_threshold no " \\ >> $(TCL_FILE)
333
        $(Q)echo "  -limit_max_paths yes " \\ >> $(TCL_FILE)
334
        $(Q)echo "  -max_paths 100 " \\ >> $(TCL_FILE)
335
        $(Q)echo "  -max_expanded_paths 0 " \\ >> $(TCL_FILE)
336 542 julius
        $(Q)echo "  "$(DESIGN_NAME)"-timmindly.rpt " >> $(TCL_FILE)
337 408 julius
 
338
 
339
 
340
sdc-file:
341
        $(Q)for define in $(DESIGN_DEFINES); do export $$define=1; done; \
342
        $(MAKE) $(SDC_FILE)
343
 
344
 
345
#
346
# Constraint script generation
347
#
348
 
349
ETH_CLK_PERIOD_NS ?= 8.0000 # 125 MHz
350
ETH_CLK_PERIOD_HALF_NS ?= 4.0000 # 125 MHz
351
SDRAM_OUT_DELAY ?=1.5
352
SDRAM_IN_DELAY ?=0.8
353
# Whittle away at the defines until we have only the Wishbone frequency (MHz) integer
354
WB_FREQ_MHZ ?=$(shell echo $(DESIGN_DEFINES) | tr " " "\n" | grep BOARD | grep _WB | tr "_" "\n" | grep WB | cut -d 'B' -f 2)
355
XTAL_FREQ_MHZ ?=$(shell echo $(DESIGN_DEFINES) | tr " " "\n" | grep BOARD | grep _XTAL | tr "_" "\n" | grep XTAL | cut -d 'L' -f 2)
356
 
357
ifeq ($(XTAL_FREQ_MHZ), 64)
358
SYS_CLK_PERIOD_NS ?= 15.625 # 64 MHz
359
# These are for board clock with 64 MHz XTAL
360
ifeq ($(WB_FREQ_MHZ), 16)
361
WB_SDC_GENCLK_DIVIDE_BY ?=144
362
WB_SDC_GENCLK_MULTIPLY_BY ?=36
363
endif
364
ifeq ($(WB_FREQ_MHZ), 18)
365
WB_SDC_GENCLK_DIVIDE_BY ?=128
366
WB_SDC_GENCLK_MULTIPLY_BY ?=36
367
endif
368
ifeq ($(WB_FREQ_MHZ), 20)
369
WB_SDC_GENCLK_DIVIDE_BY ?=144
370
WB_SDC_GENCLK_MULTIPLY_BY ?=45
371
endif
372
endif # ifeq ($(XTAL_FREQ_MHZ), 64)
373
 
374
ifeq ($(XTAL_FREQ_MHZ), 25)
375
SYS_CLK_PERIOD_NS ?= 40.00 # 25 MHz
376
# These are for board with 25 MHz XTAL
377
ifeq ($(WB_FREQ_MHZ), 20)
378
WB_SDC_GENCLK_DIVIDE_BY ?=125
379
WB_SDC_GENCLK_MULTIPLY_BY ?=100
380
endif
381
ifeq ($(WB_FREQ_MHZ), 24)
382
WB_SDC_GENCLK_DIVIDE_BY ?=125
383
WB_SDC_GENCLK_MULTIPLY_BY ?=120
384
endif
385
endif # ifeq ($(XTAL_FREQ_MHZ), 25)
386
 
387
print-freq:
388
        $(Q)echo "XTAL Freq: "$(XTAL_FREQ_MHZ)"MHz"
389
        $(Q)echo "sys_clk_pad_i period: "$(SYS_CLK_PERIOD_NS)"ns"
390
        $(Q)echo "Multiply XTAL by "$(WB_SDC_GENCLK_MULTIPLY_BY)" and divide by "$(WB_SDC_GENCLK_DIVIDE_BY)" to get WB frequency"
391
        $(Q)echo "WB Freq: "$(WB_FREQ_MHZ)"MHz"
392
 
393
 
394
#
395
# Timing (SDC)
396
#
397
$(SDC_FILE):
398
        $(Q)echo; echo "\t### Generating SDC file ###"; echo
399
        $(Q)rm -f $@
400
        $(Q) echo "set sdc_version 1.7" >> $@
401
        $(Q) echo "########  Clock Constraints  ########" >> $@
402
        $(Q) echo "create_clock  -name { sys_clk_pad_i } -period "$(SYS_CLK_PERIOD_NS)"  { sys_clk_pad_i  } " >> $@
403
        $(Q)if [ ! -z $$JTAG_DEBUG ]; then \
404
                echo "create_clock  -name { tck_pad_i } -period 50.000  { tck_pad_i  } " >> $@; \
405
        fi
406
        $(Q)if [ ! -z $$ETH_CLK ]; then \
407
                echo "create_clock  -name { eth_clk_pad_i } -period "$(ETH_CLK_PERIOD_NS)" { eth_clk_pad_i  } " >> $@; \
408
        fi
409
        $(Q)if [ ! -z $$SMII0 ]; then \
410
                echo "create_clock  -name { smii0/smii_if0/mtx_clk_gen:Q } -period 40.000   { smii0/smii_if0/mtx_clk_gen:Q  } " >> $@; \
411
                echo "create_clock  -name { smii0/smii_if0/mrx_clk_gen:Q } -period 40.000  { smii0/smii_if0/mrx_clk_gen:Q  } " >> $@; \
412
                echo "set_output_delay  -max 3.000 -clock { eth_clk_pad_i }  [get_ports { eth0_smii_sync_pad_o eth0_smii_tx_pad_o }] " >> $@; \
413
                echo "set_output_delay  -min -1.500 -clock { eth_clk_pad_i }  [get_ports { eth0_smii_sync_pad_o eth0_smii_tx_pad_o }] " >> $@; \
414
        fi
415
        $(Q) echo "########  Specify Asynchronous paths between domains  ########" >> $@
416
        $(Q) echo "set_false_path -from [ get_clocks { clkgen0/pll0/Core:GLA }] -to [ get_clocks { clkgen0/pll0/Core:GLB }]" >> $@
417
        $(Q) echo "set_false_path -from [ get_clocks { clkgen0/pll0/Core:GLB }] -to [ get_clocks { clkgen0/pll0/Core:GLA }]" >> $@
418
        $(Q) echo "########  Input Delay Constraints  ########" >> $@
419
        $(Q) echo "set_input_delay  -max "$(SDRAM_IN_DELAY)" -clock { clkgen0/pll0/Core:GLA } { sdram_dq_pad_io[*] }" >> $@
420
        $(Q) echo "########  Output Delay Constraints  ########" >> $@
421
        $(Q) echo "set_output_delay  -max  "$(SDRAM_OUT_DELAY)"  -clock { clkgen0/pll0/Core:GLA } { sdram_dq_pad_io[*] }" >> $@
422
        $(Q) echo "set_output_delay  -max  "$(SDRAM_OUT_DELAY)"  -clock { clkgen0/pll0/Core:GLA } { sdram_ras_pad_o }" >> $@
423
        $(Q) echo "set_output_delay  -max  "$(SDRAM_OUT_DELAY)"  -clock { clkgen0/pll0/Core:GLA } { sdram_cas_pad_o }" >> $@
424
        $(Q) echo "set_output_delay  -max  "$(SDRAM_OUT_DELAY)"  -clock { clkgen0/pll0/Core:GLA } { sdram_we_pad_o }" >> $@
425
        $(Q) echo "set_output_delay  -max  "$(SDRAM_OUT_DELAY)"  -clock { clkgen0/pll0/Core:GLA } { sdram_a_pad_o[*] }" >> $@
426
        $(Q) echo "set_output_delay  -max  "$(SDRAM_OUT_DELAY)"  -clock { clkgen0/pll0/Core:GLA } { sdram_ba_pad_o[*] }" >> $@
427
        $(Q) echo "set_output_delay  -max  "$(SDRAM_OUT_DELAY)"  -clock { clkgen0/pll0/Core:GLA } { sdram_cke_pad_o }" >> $@
428
        $(Q) echo "set_output_delay  -max  "$(SDRAM_OUT_DELAY)"  -clock { clkgen0/pll0/Core:GLA } { sdram_dqm_pad_o[*] }" >> $@
429
        $(Q)echo >> $@
430
 
431
#       $(Q) echo "########  Generated Clock Constraints  ########" >> $@
432
#       $(Q) echo "create_generated_clock  -name { clkgen0/pll0/Core:GLA } -divide_by 36  -multiply_by 36  -source { clkgen0/pll0/Core:CLKA } { clkgen0/pll0/Core:GLA  } " >> $@
433
#       $(Q) echo "create_generated_clock  -name { clkgen0/pll0/Core:GLB } -divide_by "$(WB_SDC_GENCLK_DIVIDE_BY)"  -multiply_by "$(WB_SDC_GENCLK_MULTIPLY_BY)"  -source { clkgen0/pll0/Core:CLKA } { clkgen0/pll0/Core:GLB  } " >> $@
434
 
435
#
436
# Physical design constraints
437
#
438
 
439
# Pin settings, based on CPU board
440
PDC_MKPINS_PATH ?=../bin
441
PDC_MKPINASSIGNS_PATH ?=../bin
442
 
443
# Default board config
444
BOARD_CONFIG ?= orsoccpuexpio.mkpinassigns
445
 
446
include $(PDC_MKPINASSIGNS_PATH)/$(BOARD_CONFIG)
447
 
448
# PDC file generation - depending on Verilog defines file, we generate right PDC
449
 
450
pdc-file:
451
        $(Q)for define in $(DESIGN_DEFINES); do export $$define=1; done; \
452
        $(MAKE) $(PDC_FILE)
453
 
454
# To do - somehow figure out the top-level signals in the design, and then
455
# auto-generate this rule....?!
456
$(PDC_FILE): $(PROJECT_VERILOG_DEFINES)
457
        $(Q)echo; echo "\t### Generating PDC file ###"; echo
458
        $(Q)touch $@
459
        $(Q)echo "#" >> $@
460
        $(Q)echo "# IO banks setting" >> $@
461
        $(Q)echo "#" >> $@
462
        $(Q)echo "" >> $@
463
        $(Q)if [ \"$(FPGA_FAMILY)\" = \"ProASIC3E\" ]; then \
464
                echo "set_iobank Bank7 -vcci 3.30 -fixed no" >> $@; \
465
                echo "set_iobank Bank6 -vcci 3.30 -fixed no" >> $@; \
466
                echo "set_iobank Bank5 -vcci 3.30 -fixed no" >> $@; \
467
                echo "set_iobank Bank4 -vcci 3.30 -fixed no" >> $@; \
468
        fi
469
        $(Q)echo "set_iobank Bank3 -vcci 3.30 -fixed no" >> $@
470
        $(Q)echo "set_iobank Bank2 -vcci 3.30 -fixed no" >> $@
471
        $(Q)echo "set_iobank Bank1 -vcci 3.30 -fixed no" >> $@
472
        $(Q)echo "set_iobank Bank0 -vcci 3.30 -fixed no" >> $@
473
        $(Q)echo "" >> $@
474
        $(Q)echo "#" >> $@
475
        $(Q)echo "# I/O constraints" >> $@
476
        $(Q)echo "#" >> $@
477
        $(Q)echo "" >> $@
478
        $(Q)echo "set_io rst_n_pad_i "$(RST_BUS_SETTING) " -pinname "$(RST_PIN) >> $@
479
        $(Q)echo "set_io sys_clk_pad_i "$(CLK_BUS_SETTING) " -pinname "$(CLK_PIN) >> $@
480
        $(Q)if [ ! -z $$JTAG_DEBUG ]; then \
481
                echo "set_io tck_pad_i "$(JTAG_DBG_SETTINGS)" -pinname "$(JTAG_DBG_TCK_PIN) >>$@; \
482
                echo "set_io tdi_pad_i "$(JTAG_DBG_SETTINGS)" -pinname "$(JTAG_DBG_TDI_PIN) >>$@; \
483
                echo "set_io tdo_pad_o "$(JTAG_DBG_SETTINGS)" -pinname "$(JTAG_DBG_TDO_PIN) >>$@; \
484
                echo "set_io tms_pad_i "$(JTAG_DBG_SETTINGS)" -pinname "$(JTAG_DBG_TMS_PIN) >>$@; \
485
        fi
486
        $(Q)if [ ! -z $$GPIO0 ]; then \
487
                echo "set_io gpio0_io\\[0\\] " $(GPIO_BUS_SETTINGS) "  -pinname "$(GPIO0_PIN) >> $@; \
488
                echo "set_io gpio0_io\\[1\\] " $(GPIO_BUS_SETTINGS) "  -pinname "$(GPIO1_PIN) >> $@; \
489
                echo "set_io gpio0_io\\[2\\] " $(GPIO_BUS_SETTINGS) "  -pinname "$(GPIO2_PIN) >> $@; \
490
                echo "set_io gpio0_io\\[3\\] " $(GPIO_BUS_SETTINGS) "  -pinname "$(GPIO3_PIN) >> $@; \
491
                echo "set_io gpio0_io\\[4\\] " $(GPIO_BUS_SETTINGS) "  -pinname "$(GPIO4_PIN) >> $@; \
492
                echo "set_io gpio0_io\\[5\\] " $(GPIO_BUS_SETTINGS) "  -pinname "$(GPIO5_PIN) >> $@; \
493
                echo "set_io gpio0_io\\[6\\] " $(GPIO_BUS_SETTINGS) "  -pinname "$(GPIO6_PIN) >> $@; \
494
                echo "set_io gpio0_io\\[7\\] " $(GPIO_BUS_SETTINGS) "  -pinname "$(GPIO7_PIN) >> $@; \
495
        fi
496
        $(Q)if [ ! -z $$I2C0 ]; then \
497
                echo "set_io i2c0_scl_io " $(I2C_BUS_SETTINGS) " -pinname "$(I2C_0_SCL_PIN) >> $@; \
498
                echo "set_io i2c0_sda_io " $(I2C_BUS_SETTINGS) " -pinname "$(I2C_0_SDA_PIN) >> $@; \
499
        fi
500
        $(Q)if [ ! -z $$I2C1 ]; then \
501
                echo "set_io i2c1_scl_io " $(I2C_BUS_SETTINGS) " -pinname "$(I2C_1_SCL_PIN) >> $@; \
502
                echo "set_io i2c1_sda_io " $(I2C_BUS_SETTINGS) " -pinname "$(I2C_1_SDA_PIN) >> $@; \
503
        fi
504
        $(Q)if [ ! -z $$I2C2 ]; then \
505
                echo "set_io i2c2_scl_io " $(I2C_BUS_SETTINGS) " -pinname "$(I2C_2_SCL_PIN) >> $@; \
506
                echo "set_io i2c2_sda_io " $(I2C_BUS_SETTINGS) " -pinname "$(I2C_2_SDA_PIN) >> $@; \
507
        fi
508
        $(Q)if [ ! -z $$I2C3 ]; then \
509
                echo "set_io i2c3_scl_io " $(I2C_BUS_SETTINGS) " -pinname "$(I2C_3_SCL_PIN) >> $@; \
510
                echo "set_io i2c3_sda_io " $(I2C_BUS_SETTINGS) " -pinname "$(I2C_3_SDA_PIN) >> $@; \
511
        fi
512
        $(Q)if [ ! -z $$VERSATILE_SDRAM ]; then \
513
                echo "set_io sdram_a_pad_o\\[0\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A0_PIN) >> $@; \
514
                echo "set_io sdram_a_pad_o\\[1\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A1_PIN) >> $@; \
515
                echo "set_io sdram_a_pad_o\\[2\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A2_PIN) >> $@; \
516
                echo "set_io sdram_a_pad_o\\[3\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A3_PIN) >> $@; \
517
                echo "set_io sdram_a_pad_o\\[4\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A4_PIN) >> $@; \
518
                echo "set_io sdram_a_pad_o\\[5\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A5_PIN) >> $@; \
519
                echo "set_io sdram_a_pad_o\\[6\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A6_PIN) >> $@; \
520
                echo "set_io sdram_a_pad_o\\[7\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A7_PIN) >> $@; \
521
                echo "set_io sdram_a_pad_o\\[8\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A8_PIN) >> $@; \
522
                echo "set_io sdram_a_pad_o\\[9\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A9_PIN) >> $@; \
523
                echo "set_io sdram_a_pad_o\\[10\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A10_PIN) >> $@; \
524
                echo "set_io sdram_a_pad_o\\[11\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A11_PIN) >> $@; \
525
                echo "set_io sdram_a_pad_o\\[12\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A12_PIN) >> $@; \
526
                echo "set_io sdram_ba_pad_o\\[0\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A13_PIN) >> $@; \
527
                echo "set_io sdram_ba_pad_o\\[1\\] "$(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_A14_PIN) >> $@; \
528
                echo "set_io sdram_ras_pad_o " $(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_RAS_PIN) >> $@; \
529
                echo "set_io sdram_cas_pad_o " $(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_CAS_PIN) >> $@; \
530
                echo "set_io sdram_we_pad_o  " $(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_WE_PIN) >> $@; \
531
                echo "set_io sdram_cke_pad_o " $(SDRAM_CTRL_BUS_SETTINGS_NO_REG)" -pinname "$(SDRAM_CKE_PIN) >> $@; \
532
                echo "set_io sdram_cs_n_pad_o" $(SDRAM_CTRL_BUS_SETTINGS_NO_REG)" -pinname "$(SDRAM_CS_PIN) >> $@; \
533
                echo "set_io sdram_dqm_pad_o\\[0\\] " $(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_DQM0_PIN) >> $@; \
534
                echo "set_io sdram_dqm_pad_o\\[1\\] " $(SDRAM_CTRL_BUS_SETTINGS)" -pinname "$(SDRAM_DQM1_PIN) >> $@; \
535
                echo "set_io sdram_dq_pad_io\\[0\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ0_PIN) >> $@; \
536
                echo "set_io sdram_dq_pad_io\\[1\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ1_PIN) >> $@; \
537
                echo "set_io sdram_dq_pad_io\\[2\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ2_PIN) >> $@; \
538
                echo "set_io sdram_dq_pad_io\\[3\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ3_PIN) >> $@; \
539
                echo "set_io sdram_dq_pad_io\\[4\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ4_PIN) >> $@; \
540
                echo "set_io sdram_dq_pad_io\\[5\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ5_PIN) >> $@; \
541
                echo "set_io sdram_dq_pad_io\\[6\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ6_PIN) >> $@; \
542
                echo "set_io sdram_dq_pad_io\\[7\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ7_PIN) >> $@; \
543
                echo "set_io sdram_dq_pad_io\\[8\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ8_PIN) >> $@; \
544
                echo "set_io sdram_dq_pad_io\\[9\\] " $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ9_PIN) >> $@; \
545
                echo "set_io sdram_dq_pad_io\\[10\\]" $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ10_PIN) >> $@; \
546
                echo "set_io sdram_dq_pad_io\\[11\\]" $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ11_PIN) >> $@; \
547
                echo "set_io sdram_dq_pad_io\\[12\\]" $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ12_PIN) >> $@; \
548
                echo "set_io sdram_dq_pad_io\\[13\\]" $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ13_PIN) >> $@; \
549
                echo "set_io sdram_dq_pad_io\\[14\\]" $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ14_PIN) >> $@; \
550
                echo "set_io sdram_dq_pad_io\\[15\\]" $(SDRAM_DATA_BUS_SETTINGS)" -pinname "$(SDRAM_DQ15_PIN) >> $@; \
551
        fi
552
        $(Q)if [ ! -z $$SPI0 ]; then \
553
                echo "set_io spi0_miso_i "$(SPI_BUS_SETTINGS)" -pinname "$(SPI0_MISO_PIN) >> $@; \
554
                echo "set_io spi0_mosi_o "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI0_MOSI_PIN) >> $@; \
555
                echo "set_io spi0_sck_o "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI0_SCK_PIN) >> $@; \
556
                echo "set_io spi0_hold_n_o "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI0_HOLD_N_PIN) >> $@; \
557
                echo "set_io spi0_w_n_o "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI0_W_N_PIN) >> $@; \
558
        fi
559
        $(Q)if [ ! -z $$SPI0_SLAVE_SELECTS ]; then \
560
                echo "set_io spi0_ss_o\\[0\\] "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI0_SS0_PIN) >> $@; \
561
        fi
562
        $(Q)if [ ! -z $$SPI1 ]; then \
563
                echo "set_io spi1_miso_i "$(SPI_BUS_SETTINGS)" -pinname "$(SPI1_MISO_PIN) >> $@; \
564
                echo "set_io spi1_mosi_o "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI1_MOSI_PIN) >> $@; \
565
                echo "set_io spi1_sck_o "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI1_SCK_PIN)  >> $@; \
566
                if [ ! -z $$SPI1_SLAVE_SELECTS ]; then \
567
                        echo "set_io spi1_ss_o\\[0\\] "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI1_SS0_PIN) >> $@; \
568
                fi; \
569
        fi
570
        $(Q)if [ ! -z $$SPI2 ]; then \
571
                echo "set_io spi2_miso_i "$(SPI_BUS_SETTINGS)" -pinname "$(SPI2_MISO_PIN) >> $@; \
572
                echo "set_io spi2_mosi_o "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI2_MOSI_PIN) >> $@; \
573
                echo "set_io spi2_sck_o "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI2_SCK_PIN) >> $@; \
574
                if [ ! -z $$SPI2_SLAVE_SELECTS ]; then \
575
                        echo "set_io spi2_ss_o\\[0\\] "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI2_SS0_PIN) >> $@; \
576
                fi; \
577
        fi
578
        $(Q)if [ ! -z $$SPW0 ]; then \
579
                echo "set_io spw0_rx_d "$(SPW_RX_BUS_SETTINGS)" -pinname "$(SPW0_RX_D_PIN) >> $@; \
580
                echo "set_io spw0_rx_s "$(SPW_RX_BUS_SETTINGS)" -pinname "$(SPW0_RX_S_PIN) >> $@; \
581
                echo "set_io spw0_tx_d "$(SPW_TX_BUS_SETTINGS)" -pinname "$(SPW0_TX_D_PIN) >> $@; \
582
                echo "set_io spw0_tx_s "$(SPW_TX_BUS_SETTINGS)" -pinname "$(SPW0_TX_S_PIN) >> $@; \
583
        fi
584
        $(Q)if [ ! -z $$UART0 ]; then \
585
                echo "set_io uart0_srx_pad_i "$(UART_RX_BUS_SETTINGS)" -pinname "$(UART0_RX_PIN) >> $@; \
586
                echo "set_io uart0_stx_pad_o "$(UART_TX_BUS_SETTINGS)" -pinname "$(UART0_TX_PIN) >> $@; \
587
        fi
588
        $(Q)if [ ! -z $$UART1 ]; then \
589
                echo "set_io uart1_srx_pad_i "$(UART_RX_BUS_SETTINGS)" -pinname "$(UART1_RX_PIN) >> $@; \
590
                echo "set_io uart1_stx_pad_o "$(UART_TX_BUS_SETTINGS)" -pinname "$(UART1_TX_PIN) >> $@; \
591
                if [ ! -z $$UART1_PPS ]; then \
592
                        echo "set_io uart1_pps_pad_i "$(UART_RX_BUS_SETTINGS)" -pinname "$(UART1_PPS_PIN) >> $@; \
593
                fi; \
594
        fi
595
        $(Q)if [ ! -z $$UART2 ]; then \
596
                echo "set_io uart2_srx_pad_i "$(UART_RX_BUS_SETTINGS)" -pinname "$(UART2_RX_PIN) >> $@; \
597
                echo "set_io uart2_stx_pad_o "$(UART_TX_BUS_SETTINGS)" -pinname "$(UART2_TX_PIN) >> $@; \
598
                if [ ! -z $$UART2_PPS ]; then \
599
                        echo "set_io uart2_pps_pad_i "$(UART_RX_BUS_SETTINGS)" -pinname "$(UART2_PPS_PIN) >> $@; \
600
                fi; \
601
        fi
602
        $(Q)if [ ! -z $$USB0 ];  then \
603
                echo "set_io usb0fullspeed_pad_o "$(USB_TX_BUS_SETTINGS)" -pinname "$(USB0_FULLSPEED) >> $@; \
604
                echo "set_io usb0ctrl_pad_o "$(USB_TX_BUS_SETTINGS)" -pinname "$(USB0_WIRECTRLOUT) >> $@; \
605
                echo "set_io usb0dat_pad_i\\[0\\] "$(USB_RX_DATA_SETTINGS)" -pinname "$(USB0_DATAIN0) >> $@; \
606
                echo "set_io usb0dat_pad_i\\[1\\] "$(USB_RX_DATA_SETTINGS)" -pinname "$(USB0_DATAIN1) >> $@; \
607
                echo "set_io usb0dat_pad_o\\[0\\] "$(USB_TX_DATA_SETTINGS)" -pinname "$(USB0_DATAOUT0) >> $@; \
608
                echo "set_io usb0dat_pad_o\\[1\\] "$(USB_TX_DATA_SETTINGS)" -pinname "$(USB0_DATAOUT1) >> $@; \
609
        fi
610
        $(Q)if [ ! -z $$USB1 ];  then \
611
                echo "set_io usb1fullspeed_pad_o "$(USB_TX_BUS_SETTINGS)" -pinname "$(USB1_FULLSPEED) >> $@; \
612
                echo "set_io usb1ctrl_pad_o "$(USB_TX_BUS_SETTINGS)" -pinname "$(USB1_WIRECTRLOUT) >> $@; \
613
                echo "set_io usb1dat_pad_i\\[0\\] "$(USB_RX_DATA_SETTINGS)" -pinname "$(USB1_DATAIN0) >> $@; \
614
                echo "set_io usb1dat_pad_i\\[1\\] "$(USB_RX_DATA_SETTINGS)" -pinname "$(USB1_DATAIN1) >> $@; \
615
                echo "set_io usb1dat_pad_o\\[0\\] "$(USB_TX_DATA_SETTINGS)" -pinname "$(USB1_DATAOUT0) >> $@; \
616
                echo "set_io usb1dat_pad_o\\[1\\] "$(USB_TX_DATA_SETTINGS)" -pinname "$(USB1_DATAOUT1) >> $@; \
617
        fi
618
        $(Q)if [ ! -z $$ETH_CLK ]; then \
619
                echo "set_io eth_clk_pad_i "$(ETHERNET_BUS_SETTINGS)" -REGISTER No  -pinname "$(ETH_CLK_PIN)  >> $@; \
620
        fi
621
        $(Q)if [ ! -z $$ETH0 ]; then \
622
                echo "set_io eth0_md_pad_io "$(ETHERNET_BUS_SETTINGS)" -pinname "$(ETH0_MDIO_PIN)  >> $@; \
623
                echo "set_io eth0_mdc_pad_o "$(ETHERNET_BUS_SETTINGS)" "$(ETHERNET_OUT_BUS_SETTINGS)" -pinname "$(ETH0_MDC_PIN)  >> $@; \
624
                echo "set_io eth0_smii_rx_pad_i "$(ETHERNET_BUS_SETTINGS)" -REGISTER Yes  -pinname "$(ETH0_SMII_RX_PIN)  >> $@; \
625
                echo "set_io eth0_smii_sync_pad_o "$(ETHERNET_BUS_SETTINGS)" "$(ETHERNET_OUT_REG_BUS_SETTINGS)" -pinname "$(ETH0_SMII_SYNC_PIN)  >> $@; \
626
                echo "set_io eth0_smii_tx_pad_o  "$(ETHERNET_BUS_SETTINGS)" "$(ETHERNET_OUT_REG_BUS_SETTINGS)" -pinname "$(ETH0_SMII_TX_PIN)  >> $@; \
627
                if [ ! -z $$ETH0_PHY_RST ]; then \
628
                        echo "set_io eth0_rst_n_o  "$(RST_BUS_SETTING)" -pinname "$(ETH0_PHY_RSTN_PIN)  >> $@; \
629
                fi; \
630
        fi
631 544 julius
# Optimised away as it is not used: echo "set_io  sdc_card_detect_pad_i " $(SDC_BUS_IN_SETTINGS) " -pinname "$(SDC_CARD_DETECT_PIN) >> $@;
632
        $(Q)if [ ! -z $$SDC_CONTROLLER ]; then \
633
                echo "set_io  sdc_cmd_pad_io " $(SDC_BUS_IO_SETTINGS) " -pinname "$(SDC_CMD_PIN) >> $@; \
634
                echo "set_io  sdc_dat_pad_io\\[0\\] " $(SDC_BUS_IO_SETTINGS) " -pinname "$(SDC_DAT0_PIN) >> $@; \
635
                echo "set_io  sdc_dat_pad_io\\[1\\] " $(SDC_BUS_IO_SETTINGS) " -pinname "$(SDC_DAT1_PIN) >> $@; \
636
                echo "set_io  sdc_dat_pad_io\\[2\\] " $(SDC_BUS_IO_SETTINGS) " -pinname "$(SDC_DAT2_PIN) >> $@; \
637
                echo "set_io  sdc_dat_pad_io\\[3\\] " $(SDC_BUS_IO_SETTINGS) " -pinname "$(SDC_DAT3_PIN) >> $@; \
638
                echo "set_io  sdc_clk_pad_o " $(SDC_BUS_OUT_SETTINGS) " -pinname "$(SDC_CLK_PIN) >> $@; \
639
        fi
640 408 julius
        $(Q)echo "" >> $@
641
 
642
 
643
# Removed due to SPI slave selects numbering only 1
644
#                       echo "set_io spi1_ss_o\\[1\\] "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI1_SS1_PIN) >> $@;
645
#                       echo "set_io spi1_ss_o\\[2\\] "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI1_SS2_PIN) >> $@; \
646
#                       echo "set_io spi2_ss_o\\[1\\] "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI2_SS1_PIN) >> $@; \
647
#                       echo "set_io spi2_ss_o\\[2\\] "$(SPI_BUS_SETTINGS)" "$(SPI_BUS_OUT_SETTINGS)" -pinname "$(SPI2_SS2_PIN) >> $@; \
648
 

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