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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [rtl/] [verilog/] [gpio/] [README] - Blame information for rev 408

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GPIO RTL
 
This is a simple GPIO implementation. It is variable width, however widths of
multiples of 8 are advised. The first width/8 bytes control are for
reading/writing to the GPIO registers, the second set of width/8 bytes control
the direction.
 

Line No.	Rev	Author	Line
1	408	julius	`GPIO RTL`
2
3			`This is a simple GPIO implementation. It is variable width, however widths of`
4			`multiples of 8 are advised. The first width/8 bytes control are for`
5			`reading/writing to the GPIO registers, the second set of width/8 bytes control`
6			`the direction.`
7

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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [rtl/] [verilog/] [gpio/] [README] - Blame information for rev 408