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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [rtl/] [verilog/] [gpio/] [README] - Blame information for rev 425

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Line No. Rev Author Line
1 408 julius
GPIO RTL
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This is a simple GPIO implementation. It is variable width, however widths of
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multiples of 8 are advised. The first width/8 bytes control are for
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reading/writing to the GPIO registers, the second set of width/8 bytes control
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the direction.
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