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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [sw/] [drivers/] [usbhostslave/] [usbhostslave-host.c] - Blame information for rev 408

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Line No. Rev Author Line
1 408 julius
 
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/*
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 *
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 * USB usbhostslave core host functions
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 *
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 * Julius Baxter, julius@opencores.org
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 *
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 */
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#include "cpu-utils.h"
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#include "board.h"
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#include "usbhostslave-host.h"
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const int USBHOSTSLAVE_HOST_CORE_ADR[2] = { USB0_BASE, USB1_BASE };
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// ------------------------ usbInit -----------------------------
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char usb_host_init(int core)
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{
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        volatile int i;
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        // Reset the thing
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        REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HOST_SLAVE_MODE) = 0x2;
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        // Wait 10 USB cycles ( this should be plenty)
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        for (i = 0; i < 8; i++) ;
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        REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HC_INTERRUPT_MASK_REG) = 0x00;       // Disable interrupts
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        REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HC_INTERRUPT_STATUS_REG) = 0xff;     // Clear interrupt statuses
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        REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HC_TX_LINE_CONTROL_REG) = 0x00;      // low speed normal
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        REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HC_TX_SOF_ENABLE_REG) = 0x00;        // No SOF
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        REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HOST_SLAVE_MODE) = 0x01;     // Set core to HOST mode
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        // Reset RX FIFO buffer
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        REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HC_RX_FIFO_CONTROL_REG) =
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            0xff;
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        // Reset TX FIFO buffer
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        REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HC_TX_FIFO_CONTROL_REG) =
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            0xff;
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        // Return version number reg
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        return REG8(USBHOSTSLAVE_HOST_CORE_ADR[core] + RA_HOST_SLAVE_VERSION);
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}

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