OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [atlys/] [sim/] [bin/] [Makefile] - Blame information for rev 628

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 628 stekern
######################################################################
2
####                                                              ####
3
####  ORPSoCv2 Xilinx simulation Makefile                         ####
4
####                                                              ####
5
####  Description                                                 ####
6
####  ORPSoCv2 Testbenches Makefile, containing rules for         ####
7
####  configuring and running different tests on the current      ####
8
####  ORPSoC(v2) design.                                          ####
9
####                                                              ####
10
####  To do:                                                      ####
11
####                                                              ####
12
####  Author(s):                                                  ####
13
####      - Julius Baxter, julius@opencores.org                   ####
14
####                                                              ####
15
####                                                              ####
16
######################################################################
17
####                                                              ####
18
#### Copyright (C) 2009,2010,2011 Authors and OPENCORES.ORG       ####
19
####                                                              ####
20
#### This source file may be used and distributed without         ####
21
#### restriction provided that this copyright statement is not    ####
22
#### removed from the file and that any derivative work contains  ####
23
#### the original copyright notice and the associated disclaimer. ####
24
####                                                              ####
25
#### This source file is free software; you can redistribute it   ####
26
#### and/or modify it under the terms of the GNU Lesser General   ####
27
#### Public License as published by the Free Software Foundation; ####
28
#### either version 2.1 of the License, or (at your option) any   ####
29
#### later version.                                               ####
30
####                                                              ####
31
#### This source is distributed in the hope that it will be       ####
32
#### useful, but WITHOUT ANY WARRANTY; without even the implied   ####
33
#### warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ####
34
#### PURPOSE.  See the GNU Lesser General Public License for more ####
35
#### details.                                                     ####
36
####                                                              ####
37
#### You should have received a copy of the GNU Lesser General    ####
38
#### Public License along with this source; if not, download it   ####
39
#### from http://www.opencores.org/lgpl.shtml                     ####
40
####                                                              ####
41
######################################################################
42
 
43
# Name of the directory we're currently in
44
CUR_DIR=$(shell pwd)
45
 
46
BOARD_ROOT=$(CUR_DIR)/../..
47
include $(BOARD_ROOT)/Makefile.inc
48
 
49
# Simulation-specific paths and files from this one
50
include $(PROJECT_ROOT)/scripts/make/Makefile-board-benchsrc.inc
51
 
52
TEST ?= or1200-simple
53
TESTS ?= or1200-simple or1200-cbasic or1200-dctest or1200-float or1200-mmu or1200-basic or1200-except or1200-tick or1200-ticksyscall uart-simple
54
 
55
include $(PROJECT_ROOT)/scripts/make/Makefile-simulators.inc
56
 
57
# Gets turned into verilog `define
58
SIM_TYPE=RTL
59
 
60
SIMULATOR ?= $(MODELSIM)
61
 
62
# Include the test-defines.v generation rule
63
include $(PROJECT_ROOT)/scripts/make/Makefile-sim-definesgen.inc
64
 
65
#
66
# Modelsim make rules for RTL tests
67
#
68
include $(PROJECT_ROOT)/scripts/make/Makefile-board-modelsim.inc
69
 
70
#
71
# RTL test rules
72
#
73
include $(PROJECT_ROOT)/scripts/make/Makefile-rtltestrules.inc
74
 
75
#
76
# Software make rules (called recursively)
77
#
78
include $(PROJECT_ROOT)/scripts/make/Makefile-board-sw.inc
79
 
80
#
81
# Cleaning rules
82
#
83
include $(PROJECT_ROOT)/scripts/make/Makefile-board-simclean.inc

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.