OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [atlys/] [sw/] [bootrom/] [Makefile] - Blame information for rev 628

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 628 stekern
# Makefile for bootROM Verilog
2
# We will do it by building the main one, and applying our local board's
3
# settings.
4
# To rebuild after board.h is changed, a clean must be done first.
5
 
6
# Set the path to our board's root directory
7
BOARD_SW_ROOT=..
8
 
9
include $(BOARD_SW_ROOT)/Makefile.inc
10
 
11
all: bootrom.v
12
 
13
# Copy the one build in the root software path to here.
14
bootrom.v: $(SW_ROOT)/bootrom/bootrom.v
15
        $(Q)cp -v $< .
16
 
17
# Export BOARD so the Make script in the root software path knows we're to
18
# use our board.h file, not theirs.
19
export BOARD
20
 
21
$(SW_ROOT)/bootrom/bootrom.v:
22
        $(Q)$(MAKE) -C $(SW_ROOT)/bootrom bootrom.v
23
 
24
clean:
25
        $(Q)rm -f *.o *.bin *.hex *.in *.dis *.v
26
        $(Q)$(MAKE) -C $(SW_ROOT)/bootrom clean
27
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.