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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [s3adsp1800/] [sim/] [bin/] [Makefile] - Blame information for rev 628

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1 568 julius
######################################################################
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####                                                              ####
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####  ORPSoCv2 Xilinx simulation Makefile                         ####
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####                                                              ####
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####  Description                                                 ####
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####  ORPSoCv2 Testbenches Makefile, containing rules for         ####
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####  configuring and running different tests on the current      ####
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####  ORPSoC(v2) design.                                          ####
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####                                                              ####
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####  To do:                                                      ####
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####                                                              ####
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####  Author(s):                                                  ####
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####      - Julius Baxter, julius@opencores.org                   ####
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####                                                              ####
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####                                                              ####
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######################################################################
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####                                                              ####
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#### Copyright (C) 2009,2010,2011 Authors and OPENCORES.ORG       ####
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####                                                              ####
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#### This source file may be used and distributed without         ####
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#### restriction provided that this copyright statement is not    ####
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#### removed from the file and that any derivative work contains  ####
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#### the original copyright notice and the associated disclaimer. ####
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####                                                              ####
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#### This source file is free software; you can redistribute it   ####
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#### and/or modify it under the terms of the GNU Lesser General   ####
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#### Public License as published by the Free Software Foundation; ####
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#### either version 2.1 of the License, or (at your option) any   ####
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#### later version.                                               ####
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####                                                              ####
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#### This source is distributed in the hope that it will be       ####
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#### useful, but WITHOUT ANY WARRANTY; without even the implied   ####
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#### warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ####
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#### PURPOSE.  See the GNU Lesser General Public License for more ####
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#### details.                                                     ####
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####                                                              ####
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#### You should have received a copy of the GNU Lesser General    ####
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#### Public License along with this source; if not, download it   ####
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#### from http://www.opencores.org/lgpl.shtml                     ####
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####                                                              ####
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######################################################################
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# Name of the directory we're currently in
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CUR_DIR=$(shell pwd)
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BOARD_ROOT=$(CUR_DIR)/../..
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include $(BOARD_ROOT)/Makefile.inc
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# Simulation-specific paths and files from this one
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-benchsrc.inc
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TEST ?= or1200-simple
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TESTS ?= or1200-simple or1200-cbasic or1200-dctest or1200-float or1200-mmu or1200-basic or1200-except or1200-tick or1200-ticksyscall uart-simple
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include $(PROJECT_ROOT)/scripts/make/Makefile-simulators.inc
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# Gets turned into verilog `define
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SIM_TYPE=RTL
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SIMULATOR ?= $(MODELSIM)
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# Include the test-defines.v generation rule
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include $(PROJECT_ROOT)/scripts/make/Makefile-sim-definesgen.inc
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#
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# Modelsim make rules for RTL tests
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#
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-modelsim.inc
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#
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# RTL test rules
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#
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include $(PROJECT_ROOT)/scripts/make/Makefile-rtltestrules.inc
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#
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# Software make rules (called recursively)
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#
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-sw.inc
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#
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# Cleaning rules
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#
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-simclean.inc

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