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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [smii/] [README] - Blame information for rev 584

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1 408 julius
MII to SMII converter RTL
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This implements conversion between the 3-pin SMII bus and the  higher-pin count MII interface for communication between a 10/100 ethernet MAC and ethernet PHY.
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