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[/] [openrisc/] [trunk/] [orpsocv2/] [scripts/] [make/] [Makefile-board-benchsrc.inc] - Blame information for rev 868

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1 542 julius
 
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#
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# Testbench source
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#
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BOARD_BENCH_VERILOG_SRC=$(shell ls $(BOARD_BENCH_VERILOG_DIR)/*.v | grep -v $(DESIGN_NAME)_testbench )
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BOARD_BENCH_VERILOG_SRC_FILES=$(notdir $(BOARD_BENCH_VERILOG_SRC))
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# Now only take the source from the common path that we don't already have in
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# our board's
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COMMON_BENCH_VERILOG_DIR_LS=$(shell ls $(COMMON_BENCH_VERILOG_DIR)/*.v)
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COMMON_BENCH_VERILOG_SRC_FILES=$(notdir $(COMMON_BENCH_VERILOG_DIR_LS))
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COMMON_BENCH_VERILOG_SRC_FILTERED=$(filter-out $(BOARD_BENCH_VERILOG_SRC_FILES) $(DESIGN_NAME)_testbench.v,$(COMMON_BENCH_VERILOG_SRC_FILES))
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COMMON_BENCH_VERILOG_SRC=$(addprefix $(COMMON_BENCH_VERILOG_DIR)/, $(COMMON_BENCH_VERILOG_SRC_FILTERED))
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print-board-bench-src:
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        $(Q)echo "\tBoard bench verilog source"; \
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        echo $(BOARD_BENCH_VERILOG_SRC)
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print-common-bench-src:
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        $(Q)echo "\Common bench verilog source"; \
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        echo $(COMMON_BENCH_VERILOG_SRC)
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# Testbench source subdirectory detection (exclude include, we always use
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# board bench include directory!)
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BOARD_BENCH_VERILOG_SUBDIRS=$(shell cd $(BOARD_BENCH_VERILOG_DIR) && ls -d */ | grep -v include)
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COMMON_BENCH_VERILOG_SUBDIRS=$(shell cd $(COMMON_BENCH_VERILOG_DIR) && ls -d */ | grep -v include)
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# Get rid of ones we have a copy of locally
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COMMON_BENCH_VERILOG_SUBDIRS_EXCLUDE_BOARDS=$(filter-out $(BOARD_BENCH_VERILOG_SUBDIRS),$(COMMON_BENCH_VERILOG_SUBDIRS))
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# Construct list of paths we will want to include
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BENCH_VERILOG_SUBDIRS=$(addprefix $(COMMON_BENCH_VERILOG_DIR)/,$(COMMON_BENCH_VERILOG_SUBDIRS_EXCLUDE_BOARDS))
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BENCH_VERILOG_SUBDIRS += $(addprefix $(BOARD_BENCH_VERILOG_DIR)/,$(BOARD_BENCH_VERILOG_SUBDIRS))
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# Finally, add include path from local bench path
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BENCH_VERILOG_SUBDIRS += $(BOARD_BENCH_VERILOG_DIR)/include
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ifeq ($(VPI), 1)
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# Manually add the VPI bench verilog path
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COMMON_BENCH_VERILOG_SUBDIRS += vpi/verilog
41 542 julius
endif
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print-board-bench-subdirs:
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        $(Q)echo "\tBoard bench subdirectories"; \
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        echo $(BOARD_BENCH_VERILOG_SUBDIRS)
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print-common-bench-subdirs:
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        $(Q)echo "\tCommon bench subdirectories"; \
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        echo $(COMMON_BENCH_VERILOG_SUBDIRS)
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print-bench-subdirs:
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        $(Q)echo "\tBench subdirectories"; \
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        echo $(BENCH_VERILOG_SUBDIRS)

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