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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [board/] [include/] [board.h] - Blame information for rev 525

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#ifndef _BOARD_H_
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#define _BOARD_H_
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#define IN_CLK                50000000 // Hz
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//
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// Defines for each core (memory map base, OR1200 interrupt line number, etc.)
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//
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#define RAM_BASE            0x00000000
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#define UART0_BASE          0x90000000
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#define UART0_IRQ                    2
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#define UART0_BAUD_RATE         115200
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#define SPI0_BASE           0xb0000000
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#define INTGEN_BASE         0xe1000000
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#define INTGEN_IRQ                  19
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//
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// OR1200 tick timer period define
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//
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#define TICKS_PER_SEC   100
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//
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// UART driver configuration
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// 
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#define UART_NUM_CORES 1
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#define UART_BASE_ADDRESSES_CSV UART0_BASE
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#define UART_BAUD_RATES_CSV UART0_BAUD_RATE
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#endif

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