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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [int.c] - Blame information for rev 561

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Line No. Rev Author Line
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/*
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 *
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 * User interrupt handler software for OR1200
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 *
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 */
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#include "or1200-utils.h"
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#include "spr-defs.h"
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#include "int.h"
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/* Interrupt handlers table */
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struct ihnd int_handlers[MAX_INT_HANDLERS];
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/* Initialize routine */
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int int_init()
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{
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  int i;
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  for(i = 0; i < MAX_INT_HANDLERS; i++) {
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    int_handlers[i].handler = 0;
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    int_handlers[i].arg = 0;
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  }
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  return 0;
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}
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/* Add interrupt handler */
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int int_add(unsigned long irq, void (* handler)(void *), void *arg)
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{
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  if(irq >= MAX_INT_HANDLERS)
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    return -1;
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  int_handlers[irq].handler = handler;
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  int_handlers[irq].arg = arg;
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  mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << irq));
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  return 0;
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}
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/* Disable interrupt */
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int int_disable(unsigned long irq)
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{
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  if(irq >= MAX_INT_HANDLERS)
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    return -1;
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  mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << irq));
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  return 0;
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}
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/* Enable interrupt */
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int int_enable(unsigned long irq)
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{
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  if(irq >= MAX_INT_HANDLERS)
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    return -1;
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  mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << irq));
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  return 0;
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}
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/* Main interrupt handler */
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void int_main()
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{
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  unsigned long picsr = mfspr(SPR_PICSR);
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  unsigned long i = 0;
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  mtspr(SPR_PICSR, 0);
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  while(i < 32) {
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    if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) {
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      (*int_handlers[i].handler)(int_handlers[i].arg);
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#ifdef OR1200_INT_CHECK_BIT_CLEARED
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      // Ensure PICSR bit is cleared, incase it takes some time for the
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      // IRQ line going low to propagate back to PIC
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      while (mfspr(SPR_PICSR) & (0x00000001L << i))
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#endif
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              mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i));
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    }
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    i++;
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  }
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}
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