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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [simple-spi/] [simple-spi.c] - Blame information for rev 542

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Line No. Rev Author Line
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/*
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 * Simple SPI module driver
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 *
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 * Julius Baxter, julius.baxter@orsoc.se
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 *
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 */
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#include "board.h"
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#include "simple-spi.h"
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#include "cpu-utils.h"
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#ifdef SPI_NUM_CORES
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const int SPI_BASE_ADR[SPI_NUM_CORES] = {SPI_BASE_ADDRESSES_CSV};
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#else
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// For older builds - need to change them all over to newer format
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#ifdef SPI0_BASE
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const int SPI_BASE_ADR[1] = {SPI0_BASE};
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#else
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// No SPI present
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const int SPI_BASE_ADR[1] = {-1};
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#endif
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#endif
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void
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spi_core_enable(int core)
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{
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPCR)) |= SIMPLESPI_SPCR_SPE;
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}
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void
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spi_core_disable(int core)
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{
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPCR)) &= ~SIMPLESPI_SPCR_SPE;
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}
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void
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spi_core_interrupt_enable(int core)
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{
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPCR)) |= SIMPLESPI_SPCR_SPIE;
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}
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void
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spi_core_interrupt_disable(int core)
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{
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPCR)) &= ~SIMPLESPI_SPCR_SPIE;
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}
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void
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spi_core_interrupt_flag_clear(int core)
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{
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPSR)) = SIMPLESPI_SPSR_SPIF;
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}
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void
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spi_core_clock_setup(int core, char polarity, char phase, char rate,
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                          char ext_rate)
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{
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  char spcr = REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPCR));
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  if (polarity)
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    spcr |= SIMPLESPI_SPCR_CPOL;
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  else
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    spcr &= ~SIMPLESPI_SPCR_CPOL;
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  if (phase)
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    spcr |= SIMPLESPI_SPCR_CPHA;
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  else
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    spcr &= ~SIMPLESPI_SPCR_CPHA;
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  spcr = (spcr & ~SIMPLESPI_SPCR_SPR) | (rate & SIMPLESPI_SPCR_SPR);
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPCR)) = spcr;
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  char sper = REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPER));
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  sper = (sper & ~SIMPLESPI_SPER_ESPR) | (ext_rate & SIMPLESPI_SPER_ESPR);
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPER)) = sper;
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}
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void
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spi_core_set_int_count(int core, char cnt)
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{
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  char sper = REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPER));
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  sper = (sper & ~SIMPLESPI_SPER_ICNT) | cnt;
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPER)) = sper;
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}
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// No decode on slave select lines, so assert correct bit to select slave
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void
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spi_core_slave_select(int core, char slave_sel_dec)
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{
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SSPU)) = slave_sel_dec;
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}
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int
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spi_core_data_avail(int core)
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{
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  return !!!(REG8((SPI_BASE_ADR[core]+SIMPLESPI_SPSR))&SIMPLESPI_SPSR_RFEMPTY);
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}
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int
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spi_core_write_avail(int core)
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{
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  return !!!(REG8((SPI_BASE_ADR[core]+SIMPLESPI_SPSR))&SIMPLESPI_SPSR_WFFULL);
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}
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// Should call spi_core_write_avail() before calling this, we don't check
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void
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spi_core_write_data(int core, char data)
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{
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  REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPDR)) = data;
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}
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char
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spi_core_read_data(int core)
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{
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  return REG8((SPI_BASE_ADR[core] + SIMPLESPI_SPDR));
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}

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