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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [cfi_ctrl/] [board/] [cfi_ctrl-simple.c] - Blame information for rev 769

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Line No. Rev Author Line
1 655 julius
#include "board.h"
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#include "cpu-utils.h"
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#include "cfi_ctrl.h"
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#include "uart.h"
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#include "printf.h"
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#include "orpsoc-defines.h"
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int main(void)
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{
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  uart_init(DEFAULT_UART);
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  printf("cfi_ctrl-simple test");
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  /* Reset the flash */
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  cfi_ctrl_reset_flash();
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  /* wait for the controller to be done */
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  while (cfi_ctrl_busy());
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#define NUM_PAGES 8
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#define TEST_LENGTH 64
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  int i,j;
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  unsigned int page_base;
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  unsigned short check_data[TEST_LENGTH];
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  unsigned short tmp;
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  /* test for number of blocks... */
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  for(j=0;j<NUM_PAGES;j++)
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    {
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      page_base = j*(128*1024);
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      printf("Status before clear: %02x\n",cfi_ctrl_get_status()&0xff);
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      cfi_ctrl_clear_status();
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      printf("Status after clear: %02x\n",cfi_ctrl_get_status()&0xff);
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      /* Erase block  */
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      if (cfi_ctrl_erase_block(page_base))
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        {
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          //exit(0xbaaaaaad);
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          printf("Error erasing block at %08x\n",page_base);
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          printf("Aborting test\n");
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          exit(1);
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        }
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      cfi_ctrl_clear_status();
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      for (i=0;i<TEST_LENGTH;i++)
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        {
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          tmp = (unsigned short)rand();
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          //report(tmp&0xffff);
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          printf("writing data: %04x\n", tmp&0xffff);
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          cfi_ctrl_write_short(tmp,page_base+i*2);
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          check_data[i] = tmp;
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        }
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      /* Read back the data and check it */
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      cfi_ctrl_enable_data_read();
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      for (i=0;i<TEST_LENGTH;i++)
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        {
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          tmp = REG16(CFI_CTRL_BASE + page_base + (i*2));
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          if (tmp != check_data[i])
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            //exit(0xbaaaaaad);
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            printf("read data was not written data: %04x != %04x\n", tmp&0xffff,
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                   check_data[i]);
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        }
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    }
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  report(0x8000000d);
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  exit(0);
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}

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