OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [or1200/] [sim/] [or1200-ov.S] - Blame information for rev 600

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 502 julius
/*
2
        OR1200 overflow bit checking
3
 
4
        Very basic, testing
5
 
6
TODO:    Check range exception handling in delay slots
7
 
8
        Julius Baxter, ORSoC AB, julius.baxter@orsoc.se
9
 
10
*/
11
//////////////////////////////////////////////////////////////////////
12
////                                                              ////
13
//// Copyright (C) 2011 Authors and OPENCORES.ORG                 ////
14
////                                                              ////
15
//// This source file may be used and distributed without         ////
16
//// restriction provided that this copyright statement is not    ////
17
//// removed from the file and that any derivative work contains  ////
18
//// the original copyright notice and the associated disclaimer. ////
19
////                                                              ////
20
//// This source file is free software; you can redistribute it   ////
21
//// and/or modify it under the terms of the GNU Lesser General   ////
22
//// Public License as published by the Free Software Foundation; ////
23
//// either version 2.1 of the License, or (at your option) any   ////
24
//// later version.                                               ////
25
////                                                              ////
26
//// This source is distributed in the hope that it will be       ////
27
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
28
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
29
//// PURPOSE.  See the GNU Lesser General Public License for more ////
30
//// details.                                                     ////
31
////                                                              ////
32
//// You should have received a copy of the GNU Lesser General    ////
33
//// Public License along with this source; if not, download it   ////
34
//// from http://www.opencores.org/lgpl.shtml                     ////
35
////                                                              ////
36
//////////////////////////////////////////////////////////////////////
37
 
38
 
39
#include "spr-defs.h"
40
#include "board.h"
41
#include "or1200-defines.h"
42
 
43
 
44
/* =================================================== [ exceptions ] === */
45
        .section .vectors, "ax"
46
 
47
 
48
/* ---[ 0x100: RESET exception ]----------------------------------------- */
49
        .org 0x100
50
        l.movhi r0, 0
51
        /* Clear status register */
52
        l.ori r1, r0, SPR_SR_SM
53
        l.mtspr r0, r1, SPR_SR
54
        /* Clear timer  */
55
        l.mtspr r0, r0, SPR_TTMR
56
 
57
        /* Jump to program initialisation code */
58
        .global _start
59
        l.movhi r4, hi(_start)
60
        l.ori r4, r4, lo(_start)
61
        l.jr    r4
62
        l.nop
63
 
64
        .org 0x600
65
        l.nop 0x1
66
 
67
 
68
/* ---[ 0x700: Illegal instruction exception ]-------------------------- */
69
        .org 0x700
70
#ifndef OR1200_IMPL_ADDC
71
        // No problem - instruction not supported
72
        l.movhi r3, hi(0x8000000d)
73
        l.ori   r3, r3, lo(0x8000000d)
74
        l.nop   0x2
75
        l.ori   r3, r0, 0
76
#else
77
        l.ori   r3, r0, 1
78
#endif
79
        l.nop   0x1
80
 
81
#define INCREMENT_EXCEPTION_COUNTER     l.addi r11, r11, 0x1
82
#define CHECK_EXCEPTION_COUNTER         \
83
        l.sfne  r11, r12        ;       \
84
        l.bf    _fail           ;       \
85
        l.nop                   ;
86
#define EXPECT_RANGE_EXCEPT             \
87
        l.addi  r12, r12, 1     ;       \
88
        CHECK_EXCEPTION_COUNTER
89
 
90
/* ---[ 0xb00: Range exception ]---------------------------------------- */
91
        .org 0xb00
92
        l.sw    0(r0), r3       ;// Save r3 - don't disrupt it during exceptions
93
        l.ori   r3, r0, 0xaaee
94
        l.nop   0x2
95
        // TODO - get instruction and decode to ensure it was an instruction
96
        // which is capable of causing a range exception. Remember delay slot!
97
        INCREMENT_EXCEPTION_COUNTER
98
 
99
        // Clear OV in ESR
100
        l.mfspr r3,r0,SPR_ESR_BASE      ;// Get ESR
101
        l.nop   2
102
        l.xori  r3, r3,SPR_SR_OV        ;// Clear OV bit
103
        l.mtspr r0,r3,SPR_ESR_BASE      ;// Get EPC
104
 
105
        l.mfspr r3,r0,SPR_EPCR_BASE     ;// Get EPC
106
        l.nop   2
107
        l.addi  r3, r3, 0x4             ;// Increment
108
        l.mtspr r0,r3,SPR_EPCR_BASE     ;// Get EPC
109
        // For now, increment EPCR so we step over instruction and continue
110
 
111
        l.lwz   r3, 0(r0)
112
        l.rfe
113
 
114
/* =================================================== [ text ] === */
115
        .section .text
116
 
117
/* =================================================== [ start ] === */
118
 
119
        .global _start
120
_start:
121
        // Clear all regs
122
        l.movhi r1, 0
123
        l.movhi r2, 0
124
        l.movhi r3, 0
125
        l.movhi r4, 0
126
        l.movhi r5, 0
127
        l.movhi r6, 0
128
        l.movhi r7, 0
129
        l.movhi r8, 0
130
        l.movhi r9, 0
131
        l.movhi r10, 0
132
        l.movhi r11, 0
133
        l.movhi r12, 0
134
        l.movhi r13, 0
135
        l.movhi r14, 0
136
        l.movhi r15, 0
137
        l.movhi r16, 0
138
        l.movhi r17, 0
139
        l.movhi r18, 0
140
        l.movhi r19, 0
141
        l.movhi r20, 0
142
        l.movhi r21, 0
143
        l.movhi r22, 0
144
        l.movhi r23, 0
145
        l.movhi r24, 0
146
        l.movhi r25, 0
147
        l.movhi r26, 0
148
        l.movhi r27, 0
149
        l.movhi r28, 0
150
        l.movhi r29, 0
151
        l.movhi r30, 0
152
        l.movhi r31, 0
153
 
154
#ifdef OR1200_IMPL_OV
155
        // Kick off test
156
        l.jal   _main
157
#else
158
        // Not supported, exit test
159
        l.j     _finish
160
#endif
161
        l.nop
162
 
163
 
164
/* =================================================== [ main ] === */
165
 
166
 
167
#define CHECK_OV_CLEAR                  \
168
        l.mfspr r20, r0, SPR_SR ;       \
169
        l.andi  r21, r20, SPR_SR_OV ;   \
170
        l.sfne  r21, r0           ;     \
171
        l.bf    _fail             ;     \
172
        l.nop
173
 
174
#define CHECK_OV_SET                    \
175
        l.mfspr r20, r0, SPR_SR ;       \
176
        l.andi  r21, r20, SPR_SR_OV ;   \
177
        l.sfnei r21, SPR_SR_OV    ;     \
178
        l.bf    _fail             ;     \
179
        l.addi  r12, r12, 0x1     ;     // Increment expected counter
180
 
181
        .global _main
182
_main:
183
 
184
        // Set up some values, check the OV bit is cleared
185
        CHECK_OV_CLEAR
186
 
187
        l.movhi r4, 0x7fff
188
        l.ori   r4, r4, 0xefff
189
 
190
        l.ori   r5, r0, 0xffff
191
 
192
        l.add   r3, r5, r4      ;// Should set overflow
193
        l.nop   0x2
194
        CHECK_OV_SET
195
 
196
        l.add   r3, r0, r0      ;// Should clear overflow
197
        l.nop   0x2
198
        CHECK_OV_CLEAR
199
 
200
        l.addi  r3, r4, 0x7fff  ;// Should set overflow
201
        l.nop   0x2
202
        CHECK_OV_SET
203
 
204
        l.add   r3, r0, r0      ;// Should clear overflow
205
        l.nop   0x2
206
        CHECK_OV_CLEAR
207
 
208
        // Now test negative numbers
209
 
210
        l.movhi r4, 0x8000
211
        l.ori   r4, r4, 0x0000
212
 
213
        l.movhi r5, 0xffff
214
        l.ori   r5, r5, 0xffff
215
 
216
        l.add   r3, r4, r5      // Biggest and smallest negative number
217
        l.nop   0x2
218
        CHECK_OV_SET
219
 
220
        l.add   r3, r0, r0      ;// Should clear overflow
221
        l.nop   0x2
222
        CHECK_OV_CLEAR
223
 
224
        l.addi  r3, r4, 0xffff  // Biggest and smallest negative number
225
        l.nop   0x2
226
        CHECK_OV_SET
227
 
228
        l.add   r3, r0, r0      ;// Should clear overflow
229
        l.nop   0x2
230
        CHECK_OV_CLEAR
231
 
232
        l.add   r3, r4, r0      // Biggest negative number, and zero
233
        l.nop   0x2
234
        CHECK_OV_CLEAR
235
 
236
        l.add   r3, r0, r0      ;// Should clear overflow
237
        l.nop   0x2
238
        CHECK_OV_CLEAR
239
 
240
        l.movhi r5, 0xffff
241
        l.ori   r5, r5, 0xfffe
242
 
243
        l.add   r3, r4, r5      // Biggest and second smallest negative number
244
        l.nop   0x2
245
        CHECK_OV_SET
246
 
247
        l.add   r3, r0, r0      ;// Should clear overflow
248
        l.nop   0x2
249
        CHECK_OV_CLEAR
250
 
251
#ifdef OR1200_IMPL_SUB
252
 
253
        // report indicator that we're at l.sub section 0x55555555
254
        l.movhi r3, 0x5555
255
        l.ori   r3, r3, 0x5555
256
        l.nop   0x2
257
 
258
        // Quick subtract check
259
        // Check largest negative number -1 tripping overflow
260
        l.ori   r5, r0, 1               ; // +1
261
        l.sub   r3, r4, r5              ; // -2147483647 - 1
262
        l.nop   0x2
263
        CHECK_OV_SET
264
 
265
        l.add   r3, r0, r0      ;// Should clear overflow
266
        l.nop   0x2
267
        CHECK_OV_CLEAR
268
#endif
269
 
270
        l.movhi r4, 0x8000
271
        l.ori   r4, r4, 0x0437
272
 
273
        l.movhi r5, 0xffff
274
        l.ori   r5, r5, 0xfbc7
275
 
276
        l.add   r3, r4, r5      // Very big negative number, another one big
277
                                // enough to cause overflow hopefully
278
        l.nop   0x2
279
        CHECK_OV_SET
280
 
281
        l.add   r3, r0, r0      ;// Should clear overflow
282
        l.nop   0x2
283
        CHECK_OV_CLEAR
284
 
285
        l.movhi r5, 0xffff
286
        l.ori   r5, r5, 0xfff7
287
 
288
        l.add   r3, r4, r5      // Two negative numbers but shouldn't overflow
289
        l.nop   0x2
290
        CHECK_OV_CLEAR
291
 
292
#ifdef OR1200_DIV_IMPLEMENTED
293
 
294
        // report indicator that we're at l.div section 0xdddddddd
295
        l.movhi r3, 0xdddd
296
        l.ori   r3, r3, 0xdddd
297
        l.nop   0x2
298
 
299
        // Test divide by zero
300
        l.div   r3, r5, r0
301
        l.nop   0x2
302
 
303
        l.sfne  r3, r0          ;// Check result was 0
304
        l.bf    _fail
305
 
306
        CHECK_OV_SET
307
 
308
        l.add   r3, r5, r0      ;// Should clear overflow
309
        l.nop   0x2
310
 
311
        CHECK_OV_CLEAR
312
 
313
        // Test divide by zero
314
        l.divu  r3, r0, r0
315
        l.nop   0x2
316
        CHECK_OV_SET
317
 
318
        l.sfne  r3, r0          ;// Check result was 0
319
        l.bf    _fail
320
 
321
        l.add   r3, r0, r0      ;// Should clear overflow
322
        l.nop   0x2
323
        CHECK_OV_CLEAR
324
 
325
#endif
326
 
327
#ifdef OR1200_MULT_IMPLEMENTED
328
 
329
        // report indicator that we're at l.multiply section 0x11111111
330
        l.movhi r3, 0x1111
331
        l.ori   r3, r3, 0x1111
332
        l.nop   0x2
333
 
334
        // Check multiplying two large numbers, which will cause overflow,
335
        // trigger the flag appropriately
336
 
337
        // First signed multiply.
338
        l.movhi r4, 0xd555      ;//-(((2^32)-1)/3 + 2)
339
        l.ori   r4, r4, 0x5552
340
        l.ori   r5, r0, 2
341
        l.ori   r6, r0, 3
342
 
343
        // First multiply big negative number by 2 - shouldn't overflow
344
        l.mul   r3, r4, r5
345
        l.nop   0x2
346
        CHECK_OV_CLEAR
347
 
348
        // Now multiply by 3 - should just overflow negative
349
        l.mul   r3, r4, r6
350
        l.nop   0x2
351
        CHECK_OV_SET
352
 
353
        l.add   r3, r0, r0      ;// Should clear overflow
354
        l.nop   0x2
355
        CHECK_OV_CLEAR
356
 
357
        // Now some big positive values
358
        l.movhi r4, 0x2aaa      ;//((2^32)-1)/3 + 2
359
        l.ori   r4, r4, 0xaaae
360
        l.ori   r5, r0, 2
361
        l.ori   r6, r0, 3
362
 
363
        // First multiply big number by 2 - shouldn't overflow
364
        l.mul   r3, r4, r5
365
        l.nop   0x2
366
        CHECK_OV_CLEAR
367
 
368
        // Now multiply by 3 - should only just overflow
369
        l.mul   r3, r4, r6
370
        l.nop   0x2
371
        CHECK_OV_SET
372
 
373
        l.add   r3, r0, r0      ;// Should clear overflow
374
        l.nop   0x2
375
        CHECK_OV_CLEAR
376
 
377
        // First multiply big number by 2 - shouldn't overflow
378
        l.muli  r3, r4, 0x2
379
        l.nop   0x2
380
        CHECK_OV_CLEAR
381
 
382
        // Now multiply by 3 - should just overflow negative
383
        l.muli  r3, r4, 0x3
384
        l.nop   0x2
385
        CHECK_OV_SET
386
 
387
        l.add   r3, r0, r0      ;// Should clear overflow
388
        l.nop   0x2
389
        CHECK_OV_CLEAR
390
 
391
 
392
        // Now check overflow on  unsigned multiply
393
 
394
        // Some stimulus to make a 32-bit multiply overflow
395
        l.movhi r4, 0x5555      ;//((2^32))/3 + 2
396
        l.ori   r4, r4, 0x5557
397
        l.ori   r5, r0, 2
398
        l.ori   r6, r0, 3
399
 
400
        // First multiply big negative number by 2 - shouldn't overflow
401
        l.mulu  r3, r4, r5
402
        l.nop   0x2
403
        CHECK_OV_CLEAR
404
 
405
        // Now multiply by 3 - should just overflow negative
406
        l.mulu  r3, r4, r6
407
        l.nop   0x2
408
        CHECK_OV_SET
409
 
410
        l.add   r3, r0, r0      ;// Should clear overflow
411
        l.nop   0x2
412
        CHECK_OV_CLEAR
413
 
414
#endif
415
 
416
        /////////////////////////////////////////////////////////////
417
        //                                                         //
418
        // Range Exception Tests                                   //
419
        //                                                         //
420
        /////////////////////////////////////////////////////////////
421
#ifdef OR1200_IMPL_OVE
422
        // report indicator that we're at exception section 0xeeeeeeee
423
        l.movhi r3, 0xeeee
424
        l.ori   r3, r3, 0xeeee
425
        l.nop   0x2
426
 
427
        // First enable OV exception in SR
428
 
429
        l.mfspr r20, r0, SPR_SR
430
        l.ori   r21, r20, SPR_SR_OVE
431
        l.mtspr r0, r21, SPR_SR
432
 
433
        // Check it's set
434
        l.mfspr r20, r0, SPR_SR
435
        l.andi  r21, r20, SPR_SR_OVE
436
        l.sfnei r21, SPR_SR_OVE
437
        l.bf    _fail
438
        l.nop
439
 
440
        // now set r11 to r12 to know how many tests we've done so far
441
        l.or    r11, r12, r12
442
 
443
        l.movhi r4, 0x7fff
444
        l.ori   r4, r4, 0xefff
445
 
446
        l.ori   r5, r0, 0xffff
447
 
448
        l.add   r3, r5, r4      ;// Should set overflow
449
        l.nop   0x2
450
        EXPECT_RANGE_EXCEPT
451
 
452
        l.add   r3, r0, r0      ;// Should clear overflow
453
        l.nop   0x2
454
        CHECK_EXCEPTION_COUNTER
455
 
456
 
457
        l.addi  r3, r4, 0x7fff  ;// Should set overflow
458
        l.nop   0x2
459
        EXPECT_RANGE_EXCEPT
460
 
461
 
462
        l.add   r3, r0, r0      ;// Should clear overflow
463
        l.nop   0x2
464
        CHECK_EXCEPTION_COUNTER
465
 
466
 
467
        // Now test negative numbers
468
 
469
        l.movhi r4, 0x8000
470
        l.ori   r4, r4, 0x0000
471
 
472
        l.movhi r5, 0xffff
473
        l.ori   r5, r5, 0xffff
474
 
475
        l.add   r3, r4, r5      // Biggest and smallest negative number
476
        l.nop   0x2
477
        EXPECT_RANGE_EXCEPT
478
 
479
 
480
        l.add   r3, r0, r0      ;// Should clear overflow
481
        l.nop   0x2
482
        CHECK_EXCEPTION_COUNTER
483
 
484
        l.addi  r3, r4, 0xffff  // Biggest and smallest negative number
485
        l.nop   0x2
486
        EXPECT_RANGE_EXCEPT
487
 
488
 
489
        l.add   r3, r0, r0      ;// Should clear overflow
490
        l.nop   0x2
491
        CHECK_EXCEPTION_COUNTER
492
 
493
        l.add   r3, r4, r0      // Biggest negative number, and zero
494
        l.nop   0x2
495
        CHECK_EXCEPTION_COUNTER
496
 
497
 
498
        l.add   r3, r0, r0      ;// Should clear overflow
499
        l.nop   0x2
500
        CHECK_EXCEPTION_COUNTER
501
 
502
 
503
        l.movhi r5, 0xffff
504
        l.ori   r5, r5, 0xfffe
505
 
506
        l.add   r3, r4, r5      // Biggest and second smallest negative number
507
        l.nop   0x2
508
        EXPECT_RANGE_EXCEPT
509
 
510
 
511
        l.add   r3, r0, r0      ;// Should clear overflow
512
        l.nop   0x2
513
        CHECK_EXCEPTION_COUNTER
514
 
515
#ifdef OR1200_IMPL_SUB
516
 
517
        // report indicator that we're at l.sub section 0x55555555
518
        l.movhi r3, 0x5555
519
        l.ori   r3, r3, 0x5555
520
        l.nop   0x2
521
 
522
        // Quick subtract check
523
        // Check largest negative number -1 tripping overflow
524
        l.ori   r5, r0, 1               ; // +1
525
        l.sub   r3, r4, r5              ; // -2147483647 - 1
526
        l.nop   0x2
527
        EXPECT_RANGE_EXCEPT
528
 
529
 
530
        l.sub   r3, r0, r0      ;// Should clear overflow
531
        l.nop   0x2
532
        CHECK_EXCEPTION_COUNTER
533
 
534
#endif
535
 
536
        l.movhi r4, 0x8000
537
        l.ori   r4, r4, 0x0437
538
 
539
        l.movhi r5, 0xffff
540
        l.ori   r5, r5, 0xfbc7
541
 
542
        l.add   r3, r4, r5      // Very big negative number, another one big
543
                                // enough to cause overflow hopefully
544
        l.nop   0x2
545
        EXPECT_RANGE_EXCEPT
546
 
547
 
548
        l.add   r3, r0, r0      ;// Should clear overflow
549
        l.nop   0x2
550
        CHECK_EXCEPTION_COUNTER
551
 
552
        l.movhi r5, 0xffff
553
        l.ori   r5, r5, 0xfff7
554
 
555
        l.add   r3, r4, r5      // Two negative numbers but shouldn't overflow
556
        l.nop   0x2
557
        CHECK_EXCEPTION_COUNTER
558
 
559
#ifdef OR1200_DIV_IMPLEMENTED
560
 
561
        // report indicator that we're at l.div section 0xdddddddd
562
        l.movhi r3, 0xdddd
563
        l.ori   r3, r3, 0xdddd
564
        l.nop   0x2
565
 
566
        // Test divide by zero
567
        l.div   r3, r5, r0
568
        l.nop   0x2
569
 
570
        l.sfne  r3, r0          ;// Check result was 0
571
        l.bf    _fail
572
 
573
        EXPECT_RANGE_EXCEPT
574
 
575
 
576
        l.add   r3, r5, r0      ;// Should clear overflow
577
        l.nop   0x2
578
 
579
        CHECK_EXCEPTION_COUNTER
580
 
581
        // Test divide by zero
582
        l.divu  r3, r0, r0
583
        l.nop   0x2
584
        EXPECT_RANGE_EXCEPT
585
 
586
 
587
        l.sfne  r3, r0          ;// Check result was 0
588
        l.bf    _fail
589
 
590
        l.add   r3, r0, r0      ;// Should clear overflow
591
        l.nop   0x2
592
        CHECK_EXCEPTION_COUNTER
593
 
594
#endif
595
 
596
#ifdef OR1200_MULT_IMPLEMENTED
597
 
598
        // report indicator that we're at l.multiply section 0x11111111
599
        l.movhi r3, 0x1111
600
        l.ori   r3, r3, 0x1111
601
        l.nop   0x2
602
 
603
        // Check multiplying two large numbers, which will cause overflow,
604
        // trigger the flag appropriately
605
 
606
        // First signed multiply.
607
        l.movhi r4, 0xd555      ;//-(((2^32)-1)/3 + 2)
608
        l.ori   r4, r4, 0x5552
609
        l.ori   r5, r0, 2
610
        l.ori   r6, r0, 3
611
 
612
        // First multiply big negative number by 2 - shouldn't overflow
613
        l.mul   r3, r4, r5
614
        l.nop   0x2
615
        CHECK_EXCEPTION_COUNTER
616
 
617
        // Now multiply by 3 - should just overflow negative
618
        l.mul   r3, r4, r6
619
        l.nop   0x2
620
        EXPECT_RANGE_EXCEPT
621
 
622
        l.add   r3, r0, r0      ;// Should clear overflow
623
        l.nop   0x2
624
        CHECK_EXCEPTION_COUNTER
625
 
626
        // Now some big positive values
627
        l.movhi r4, 0x2aaa      ;//((2^32)-1)/3 + 2
628
        l.ori   r4, r4, 0xaaae
629
        l.ori   r5, r0, 2
630
        l.ori   r6, r0, 3
631
 
632
        // First multiply big number by 2 - shouldn't overflow
633
        l.mul   r3, r4, r5
634
        l.nop   0x2
635
        CHECK_EXCEPTION_COUNTER
636
 
637
        // Now multiply by 3 - should only just overflow
638
        l.mul   r3, r4, r6
639
        l.nop   0x2
640
        EXPECT_RANGE_EXCEPT
641
 
642
        l.add   r3, r0, r0      ;// Should clear overflow
643
        l.nop   0x2
644
        CHECK_EXCEPTION_COUNTER
645
 
646
        // First multiply big number by 2 - shouldn't overflow
647
        l.muli  r3, r4, 0x2
648
        l.nop   0x2
649
        CHECK_EXCEPTION_COUNTER
650
 
651
        // Now multiply by 3 - should just overflow negative
652
        l.muli  r3, r4, 0x3
653
        l.nop   0x2
654
        EXPECT_RANGE_EXCEPT
655
 
656
        l.add   r3, r0, r0      ;// Should clear overflow
657
        l.nop   0x2
658
        CHECK_EXCEPTION_COUNTER
659
 
660
 
661
        // Now check overflow on  unsigned multiply
662
 
663
        // Some stimulus to make a 32-bit multiply overflow
664
        l.movhi r4, 0x5555      ;//((2^32))/3 + 2
665
        l.ori   r4, r4, 0x5557
666
        l.ori   r5, r0, 2
667
        l.ori   r6, r0, 3
668
 
669
        // First multiply big negative number by 2 - shouldn't overflow
670
        l.mulu  r3, r4, r5
671
        l.nop   0x2
672
        CHECK_EXCEPTION_COUNTER
673
 
674
        // Now multiply by 3 - should just overflow negative
675
        l.mulu  r3, r4, r6
676
        l.nop   0x2
677
        EXPECT_RANGE_EXCEPT
678
 
679
        l.add   r3, r0, r0      ;// Should clear overflow
680
        l.nop   0x2
681
        CHECK_EXCEPTION_COUNTER
682
 
683
#endif
684
 
685
#endif
686
 
687
 
688
_finish:
689
        l.movhi r3, hi(0x8000000d)
690
        l.ori   r3, r3, lo(0x8000000d)
691
        l.nop   0x2
692
        l.ori   r3, r0, 0
693
        l.nop   0x1
694
 
695
_fail:
696
        l.or    r3, r12, r0     ;// Fail and report test number we were up to
697
        l.nop   0x1

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.