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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [sdram/] [sim/] [sdram-bankrows.c] - Blame information for rev 403

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Line No. Rev Author Line
1 349 julius
/*
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 * SDRAM row/bank test
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 *
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 * Tests accessing different rows on different banks
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 *
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*/
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8 393 julius
#include "cpu-utils.h"
9 349 julius
#include "board.h"
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#include "sdram.h"
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#define NUM_SDRAM_BANKS 4
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#define SDRAM_BANK_SIZE (SDRAM_SIZE / NUM_SDRAM_BANKS)
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#define SDRAM_BANK_START(bank) ((SDRAM_BANK_SIZE*bank) + SDRAM_BASE)
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#define SDRAM_BANK_LAST_WORD(bank) ((SDRAM_BANK_START((bank+1)))-4)
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#define SDRAM_BANK_MIDDLE_WORD(bank) ((SDRAM_BANK_START((bank)))+(SDRAM_BANK_SIZE/2))
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int main()
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{
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  REG32(SDRAM_BANK_LAST_WORD(0))   = 0x00001111;
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  REG32(SDRAM_BANK_MIDDLE_WORD(1)) = 0x22223333;
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  REG32(SDRAM_BANK_LAST_WORD(1))   = 0x44445555;
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  REG32(SDRAM_BANK_MIDDLE_WORD(2)) = 0x66667777;
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  REG32(SDRAM_BANK_LAST_WORD(2))   = 0x88889999;
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  REG32(SDRAM_BANK_MIDDLE_WORD(3)) = 0xaaaabbbb;
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  REG32(SDRAM_BANK_LAST_WORD(3))   = 0xccccdddd;
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  unsigned long read_result = 0;
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  read_result += REG32(SDRAM_BANK_LAST_WORD(0));
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  read_result += REG32(SDRAM_BANK_MIDDLE_WORD(1));
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  read_result += REG32(SDRAM_BANK_LAST_WORD(1));
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  read_result += REG32(SDRAM_BANK_MIDDLE_WORD(2));
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  read_result += REG32(SDRAM_BANK_LAST_WORD(2));
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  read_result += REG32(SDRAM_BANK_MIDDLE_WORD(3));
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  read_result += REG32(SDRAM_BANK_LAST_WORD(3));
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  report(read_result);
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  // read_result should be 0xCCCD4441
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  exit((read_result^0x4ccd444c)); /* should result in 8000000d */
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}

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