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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [uart/] [sim/] [uart-interrupt.c] - Blame information for rev 397

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Line No. Rev Author Line
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/*
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 * UART interrupt test
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 *
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 * Tests UART and interrupt routines servicing them.
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 *
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 * Relies on testbench having uart0's lines in loopback (rx = tx)
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 *
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 * Julius Baxter, julius.baxter@orsoc.se
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 *
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*/
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#include "cpu-utils.h"
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#include "spr-defs.h"
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#include "board.h"
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#include "uart.h"
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#include "int.h"
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#include "orpsoc-defines.h"
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#ifndef UART0
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# error
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# error UART0 missing and is required for UART interrupt (loopback) test
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# error
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#endif
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struct uart_tx_ctrl
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{
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  char *bufptr;
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  int busy;
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};
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volatile struct uart_tx_ctrl uart0_tx_ctrl;
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void uart_int_handler(void* corenum);
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void uart_int_handler(void* corenum)
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{
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  int core = *((int*)corenum);
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  if (core)report(core);
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  char iir = uart_get_iir(core);
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  if ( (iir & UART_IIR_RLSI)  == UART_IIR_RLSI)
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    uart_get_lsr(core); // Should clear this interrupt
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  else if ( (iir & UART_IIR_RDI) == UART_IIR_RDI )
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    {
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      // Was potentially also a timeout. Do we care?
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      // Data received. Pull all from the FIFO buffer, here we just report it
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      // and throw it away
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      char rxchar;
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      while (uart_check_for_char(core))
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        {
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          rxchar = uart_getc(core);
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          report(0xff & rxchar);
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          if (rxchar == 0x2a) // Exit simulation when RX char is '*'
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            exit(0x8000000d);
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        }
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    }
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  else if ( (iir & UART_IIR_THRI) ==  UART_IIR_THRI)
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    {
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      // Only trigered if we've set something to be transmitted
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      // and enabled the interrupt.
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      // Put next thing to be transmitted into buffer, check if it's
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      // the last, if so, disable interrupts.
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      if (uart0_tx_ctrl.bufptr[0] == 0) // EOL, disable interrupt after this char
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        {
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          uart_txint_disable(core);
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          uart0_tx_ctrl.busy = 0;
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        }
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      else // Transmit this byte
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        {
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          uart_putc_noblock(core, uart0_tx_ctrl.bufptr[0]);
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          uart0_tx_ctrl.bufptr++;
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        }
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    }
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  else if ( (iir & UART_IIR_MSI) == UART_IIR_MSI )
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    {
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      // Just read the modem status register to clear this
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      uart_get_msr(core);
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    }
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}
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void uart0_tx_buffer(char* buf)
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{
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  while (uart0_tx_ctrl.busy); // Wait until we can transmit more
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  uart0_tx_ctrl.bufptr = buf;
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  uart0_tx_ctrl.busy = 1;
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  uart_txint_enable(0);
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}
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int main()
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{
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  int uart0_core = 0;
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  int uart1_core = 1;
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  uart0_tx_ctrl.busy = 0;
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  /* Set up interrupt handler */
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  int_init();
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  /* Install UART core 0 interrupt handler */
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  int_add(UART0_IRQ, uart_int_handler,(void*) &uart0_core);
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  /* Install UART core 1 interrupt handler */
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  //int_add(UART1_IRQ, uart_int_handler,(void*) &uart1_core);
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  /* Enable interrupts in supervisor register */
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  mtspr (SPR_SR, mfspr (SPR_SR) | SPR_SR_IEE);
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  uart_init(uart0_core);
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  //uart_init(uart1_core);
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  //uart_rxint_enable(uart1_core);
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  uart_rxint_enable(uart0_core);
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  char* teststring = "\n\tHello world from UART 0\n\0";
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  uart0_tx_buffer(teststring);
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  // Do other things while we transmit
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  float f1, f2, f3; int i;
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  f1 = 0.2382; f2 = 4342.65; f3=0;
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  for(i=0;i<32;i++) f3 += f1*f3 + f2;
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  report(f3);
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  report(0x4aaaaa1f);
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  char* done_calculating = "\tDone with the number crunching!\n\0";
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  uart0_tx_buffer(done_calculating);
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  // Character '*', which will be received in the interrupt handler and cause
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  // the simulation to exit.
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  char* finish = "*\n\0";
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  uart0_tx_buffer(finish);
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  while(1); // will exit in the rx interrupt routine
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}

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